Based of increased number of boards with their shipping options,
there is new board naming convention.
Along with that, A20-OLinuXino-MICRO has new revision(rev.J),
which introduce new PHY chip (LAN8710) and eMMC option. The new
dts file is based on the already existing one for lime2-emmc.
Stefan Mavrodiev (3):
ARM: dts: sun7i: Fix A20-OLinuXino-MICRO dts for use with LAN8710
ARM: dts: sun7i: Add dts file for A20-OLinuXino-MICRO-exGB
ARM: dts: sun7i: Rename sun7i-a20-olinuxino-lime2-emmc
arch/arm/boot/dts/Makefile | 3 +-
...emmc.dts => sun7i-a20-olinuxino-lime2-exgb.dts} | 4 +-
.../boot/dts/sun7i-a20-olinuxino-micro-exgb.dts | 81 ++++++++++++++++++++++
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 +-
4 files changed, 91 insertions(+), 4 deletions(-)
rename arch/arm/boot/dts/{sun7i-a20-olinuxino-lime2-emmc.dts => sun7i-a20-olinuxino-lime2-exgb.dts} (96%)
create mode 100644 arch/arm/boot/dts/sun7i-a20-olinuxino-micro-exgb.dts
--
2.11.0
>From revision J the board uses new phy chip LAN8710. Compared
with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
not to work. To fix this, PA17 must be configured output-low.
This patch is compatible with earlier board revisions, since this
pin wasn't connected to phy.
Signed-off-by: Stefan Mavrodiev <[email protected]>
---
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index 0b7403e4d687..578c761b551a 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -102,7 +102,7 @@
&gmac {
pinctrl-names = "default";
- pinctrl-0 = <&gmac_pins_mii_a>;
+ pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr_pin>;
phy = <&phy1>;
phy-mode = "mii";
status = "okay";
@@ -229,6 +229,11 @@
};
&pio {
+ gmac_txerr_pin: gmac_txerr_pin@0 {
+ pins = "PA17";
+ function = "gpio_out"
+ };
+
mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {
pins = "PH11";
function = "gpio_in";
--
2.11.0
A20-OLinuXino-MICRO has option with onboard eMMC chip. For
now it's only shipped with 4BG chip, but in the future this
may change.
Currently the board is called "A20-OLinuXino-MICRO-e4GB".
The dts is named "-exGB" to represent all eMMC configurations -
e4GB, e8GB, etc.
Signed-off-by: Stefan Mavrodiev <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/sun7i-a20-olinuxino-micro-exgb.dts | 81 ++++++++++++++++++++++
2 files changed, 82 insertions(+)
create mode 100644 arch/arm/boot/dts/sun7i-a20-olinuxino-micro-exgb.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4b17f35dc9a7..90cbfc57948e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -880,6 +880,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-olinuxino-lime2.dtb \
sun7i-a20-olinuxino-lime2-emmc.dtb \
sun7i-a20-olinuxino-micro.dtb \
+ sun7i-a20-olinuxino-micro-exgb.dtb \
sun7i-a20-orangepi.dtb \
sun7i-a20-orangepi-mini.dtb \
sun7i-a20-pcduino3.dtb \
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-exgb.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-exgb.dts
new file mode 100644
index 000000000000..2c592748e474
--- /dev/null
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-exgb.dts
@@ -0,0 +1,81 @@
+/*
+ * Copyright 2017 Olimex Ltd.
+ *
+ * Stefan Mavrodiev <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "sun7i-a20-olinuxino-micro.dts"
+
+/ {
+ model = "Olimex A20-OLinuXino-MICRO-exGB";
+ compatible = "olimex,a20-olinuxino-micro-exgb", "allwinner,sun7i-a20";
+
+ mmc2_pwrseq: pwrseq {
+ pinctrl-0 = <&mmc2_pins_nrst>;
+ pinctrl-names = "default";
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pio {
+ mmc2_pins_nrst: mmc2-rst-pin {
+ pins = "PC16";
+ function = "gpio_out";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ non-removable;
+ mmc-pwrseq = <&mmc2_pwrseq>;
+ status = "okay";
+
+ emmc: emmc@0 {
+ reg = <0>;
+ compatible = "mmc-card";
+ broken-hpi;
+ };
+};
--
2.11.0
Rename dts file for A20-OLinuXino-LIME2-eMMC to match Olimex Ltd.
naming convention.
<board-name>-exGB - option with <x>GB eMMC chip
<board-name>-nxGB - option with <x>GB NAND chip
<board-name>-sxMB - option with <x>MB SPI FLASH chip
For example:
A20-OLinuXino-LIME2-e4GB - 4GB eMMC
A20-OLinuXIno-LIME2-n4GB - 4GB NAND
A20-OLinuXIno-LIME2-n8GB - 8GB NAND
Signed-off-by: Stefan Mavrodiev <[email protected]>
---
arch/arm/boot/dts/Makefile | 2 +-
...20-olinuxino-lime2-emmc.dts => sun7i-a20-olinuxino-lime2-exgb.dts} | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
rename arch/arm/boot/dts/{sun7i-a20-olinuxino-lime2-emmc.dts => sun7i-a20-olinuxino-lime2-exgb.dts} (96%)
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 90cbfc57948e..d37e93175fbf 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -878,7 +878,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-olimex-som-evb.dtb \
sun7i-a20-olinuxino-lime.dtb \
sun7i-a20-olinuxino-lime2.dtb \
- sun7i-a20-olinuxino-lime2-emmc.dtb \
+ sun7i-a20-olinuxino-lime2-exgb.dtb \
sun7i-a20-olinuxino-micro.dtb \
sun7i-a20-olinuxino-micro-exgb.dtb \
sun7i-a20-orangepi.dtb \
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-exgb.dts
similarity index 96%
rename from arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
rename to arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-exgb.dts
index 81f376f2a44d..38d95eaaa224 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-emmc.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2-exgb.dts
@@ -44,8 +44,8 @@
#include "sun7i-a20-olinuxino-lime2.dts"
/ {
- model = "Olimex A20-OLinuXino-LIME2-eMMC";
- compatible = "olimex,a20-olinuxino-lime2-emmc", "allwinner,sun7i-a20";
+ model = "Olimex A20-OLinuXino-LIME2-exGB";
+ compatible = "olimex,a20-olinuxino-lime2-exgb", "allwinner,sun7i-a20";
mmc2_pwrseq: pwrseq {
pinctrl-0 = <&mmc2_pins_nrst>;
--
2.11.0
Hi,
On Tue, Aug 22, 2017 at 02:43:13PM +0300, Stefan Mavrodiev wrote:
> Rename dts file for A20-OLinuXino-LIME2-eMMC to match Olimex Ltd.
> naming convention.
>
> <board-name>-exGB - option with <x>GB eMMC chip
> <board-name>-nxGB - option with <x>GB NAND chip
> <board-name>-sxMB - option with <x>MB SPI FLASH chip
>
> For example:
> A20-OLinuXino-LIME2-e4GB - 4GB eMMC
> A20-OLinuXIno-LIME2-n4GB - 4GB NAND
> A20-OLinuXIno-LIME2-n8GB - 8GB NAND
I'm not going to merge this patch, because it basically breaks all the
bootloaders scripts, distros or build systems out there. We have a
name, let's stick with that.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
On Tue, Aug 22, 2017 at 02:43:12PM +0300, Stefan Mavrodiev wrote:
> A20-OLinuXino-MICRO has option with onboard eMMC chip. For
> now it's only shipped with 4BG chip, but in the future this
> may change.
>
> Currently the board is called "A20-OLinuXino-MICRO-e4GB".
> The dts is named "-exGB" to represent all eMMC configurations -
> e4GB, e8GB, etc.
>
> Signed-off-by: Stefan Mavrodiev <[email protected]>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> .../boot/dts/sun7i-a20-olinuxino-micro-exgb.dts | 81 ++++++++++++++++++++++
> 2 files changed, 82 insertions(+)
> create mode 100644 arch/arm/boot/dts/sun7i-a20-olinuxino-micro-exgb.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 4b17f35dc9a7..90cbfc57948e 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -880,6 +880,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
> sun7i-a20-olinuxino-lime2.dtb \
> sun7i-a20-olinuxino-lime2-emmc.dtb \
> sun7i-a20-olinuxino-micro.dtb \
> + sun7i-a20-olinuxino-micro-exgb.dtb \
Apart from the discussion that happened on the 3rd patch, I'm really
not fond of that name. I'd rather have an emmc suffix. It's trivial
enough so that everyone can understand it, and it covers pretty much
everything that is covered by exgb (ie, it's an emmc of various
capacities).
> sun7i-a20-orangepi.dtb \
> sun7i-a20-orangepi-mini.dtb \
> sun7i-a20-pcduino3.dtb \
> diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-exgb.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-exgb.dts
> new file mode 100644
> index 000000000000..2c592748e474
> --- /dev/null
> +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-exgb.dts
> @@ -0,0 +1,81 @@
> +/*
> + * Copyright 2017 Olimex Ltd.
> + *
> + * Stefan Mavrodiev <[email protected]>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include "sun7i-a20-olinuxino-micro.dts"
> +
> +/ {
> + model = "Olimex A20-OLinuXino-MICRO-exGB";
> + compatible = "olimex,a20-olinuxino-micro-exgb", "allwinner,sun7i-a20";
> +
> + mmc2_pwrseq: pwrseq {
> + pinctrl-0 = <&mmc2_pins_nrst>;
> + pinctrl-names = "default";
You don't need the pinctrl node for a gpio, and we're trying to remove
them from our DTs. A huge number of them are still here, but let's not
add more of them :)
> + compatible = "mmc-pwrseq-emmc";
> + reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&pio {
> + mmc2_pins_nrst: mmc2-rst-pin {
> + pins = "PC16";
> + function = "gpio_out";
> + };
> +};
> +
> +&mmc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc2_pins_a>;
> + vmmc-supply = <®_vcc3v3>;
> + vqmmc-supply = <®_vcc3v3>;
You don't need both vmmc and vqmmc set to the same regulator.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
On Tue, Aug 22, 2017 at 02:43:11PM +0300, Stefan Mavrodiev wrote:
> From revision J the board uses new phy chip LAN8710. Compared
> with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
> not to work. To fix this, PA17 must be configured output-low.
>
> This patch is compatible with earlier board revisions, since this
> pin wasn't connected to phy.
>
> Signed-off-by: Stefan Mavrodiev <[email protected]>
>
> ---
> arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> index 0b7403e4d687..578c761b551a 100644
> --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> @@ -102,7 +102,7 @@
>
> &gmac {
> pinctrl-names = "default";
> - pinctrl-0 = <&gmac_pins_mii_a>;
> + pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr_pin>;
> phy = <&phy1>;
> phy-mode = "mii";
> status = "okay";
> @@ -229,6 +229,11 @@
> };
>
> &pio {
> + gmac_txerr_pin: gmac_txerr_pin@0 {
> + pins = "PA17";
> + function = "gpio_out"
> + };
> +
You're not enforcing any level doing this. If you're using that pin as
TXERR, why not mux it to the gmac function and let the GMAC control it?
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com