>From rev.J of A20-OLinuXino-MICRO, the board has new PHY chip
(LAN8710) which replace RTL8201. Also there is option for 4GB
eMMC chip.
Changes in v2:
* Remove pinctrl request for eMMC reset pin
* Dump the idea of renaming boards with emmc
* Using txerr as gmac function
Stefan Mavrodiev (2):
ARM: dts: sun7i: Fix A20-OLinuXino-MICRO dts for LAN8710
ARM: dts: sun7i: Add dts file for A20-OLinuXino-MICRO-eMMC
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/sun7i-a20-olinuxino-micro-emmc.dts | 70 ++++++++++++++++++++++
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++-
3 files changed, 77 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
--
2.7.4
>From revision J the board uses new phy chip LAN8710. Compared
with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
not to work. To fix this PA17 is muxed with GMAC function. This
makes the pin output-low.
This patch is compatible with earlier board revisions, since this
pin wasn't connected to phy.
Signed-off-by: Stefan Mavrodiev <[email protected]>
---
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index 0b7403e..cb1b081 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -102,7 +102,7 @@
&gmac {
pinctrl-names = "default";
- pinctrl-0 = <&gmac_pins_mii_a>;
+ pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr>;
phy = <&phy1>;
phy-mode = "mii";
status = "okay";
@@ -229,6 +229,11 @@
};
&pio {
+ gmac_txerr: gmac_txerr@0 {
+ pins = "PA17";
+ function = "gmac";
+ };
+
mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {
pins = "PH11";
function = "gpio_in";
--
2.7.4
A20-OLinuXino-MICRO has option with onboard eMMC chip. For
now it's only shipped with 4BG chip, but in the future this
may change.
Signed-off-by: Stefan Mavrodiev <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/sun7i-a20-olinuxino-micro-emmc.dts | 70 ++++++++++++++++++++++
2 files changed, 71 insertions(+)
create mode 100644 arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4b17f35..e1d1e93 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -880,6 +880,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-olinuxino-lime2.dtb \
sun7i-a20-olinuxino-lime2-emmc.dtb \
sun7i-a20-olinuxino-micro.dtb \
+ sun7i-a20-olinuxino-micro-emmc.dtb \
sun7i-a20-orangepi.dtb \
sun7i-a20-orangepi-mini.dtb \
sun7i-a20-pcduino3.dtb \
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
new file mode 100644
index 0000000..d99e7b1
--- /dev/null
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
@@ -0,0 +1,70 @@
+ /*
+ * Copyright 2017 Olimex Ltd.
+ * Stefan Mavrodiev <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "sun7i-a20-olinuxino-micro.dts"
+
+/ {
+ model = "Olimex A20-OLinuXino-MICRO-eMMC";
+ compatible = "olimex,a20-olinuxino-micro-emmc", "allwinner,sun7i-a20";
+
+ mmc2_pwrseq: pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ non-removable;
+ mmc-pwrseq = <&mmc2_pwrseq>;
+ status = "okay";
+
+ emmc: emmc@0 {
+ reg = <0>;
+ compatible = "mmc-card";
+ broken-hpi;
+ };
+};
--
2.7.4
Hi,
On Mon, Aug 28, 2017 at 09:32:42AM +0300, Stefan Mavrodiev wrote:
> From revision J the board uses new phy chip LAN8710. Compared
> with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
> not to work. To fix this PA17 is muxed with GMAC function. This
> makes the pin output-low.
>
> This patch is compatible with earlier board revisions, since this
> pin wasn't connected to phy.
>
> Signed-off-by: Stefan Mavrodiev <[email protected]>
> ---
> arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> index 0b7403e..cb1b081 100644
> --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> @@ -102,7 +102,7 @@
>
> &gmac {
> pinctrl-names = "default";
> - pinctrl-0 = <&gmac_pins_mii_a>;
> + pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr>;
> phy = <&phy1>;
> phy-mode = "mii";
> status = "okay";
> @@ -229,6 +229,11 @@
> };
>
> &pio {
> + gmac_txerr: gmac_txerr@0 {
> + pins = "PA17";
> + function = "gmac";
> + };
> +
The patch looks fine, I still have one question though.
Can a PHY operate without this signal? My real question is, would it
make sense to mux that pin for all the users, or is it an optional
signal that each board designer can choose to use or not?
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
Hi,
On Mon, Aug 28, 2017 at 09:32:43AM +0300, Stefan Mavrodiev wrote:
> A20-OLinuXino-MICRO has option with onboard eMMC chip. For
> now it's only shipped with 4BG chip, but in the future this
> may change.
>
> Signed-off-by: Stefan Mavrodiev <[email protected]>
Queued for 4.15, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
On 08/30/2017 05:37 PM, Maxime Ripard wrote:
> Hi,
>
> On Mon, Aug 28, 2017 at 09:32:42AM +0300, Stefan Mavrodiev wrote:
>> From revision J the board uses new phy chip LAN8710. Compared
>> with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
>> not to work. To fix this PA17 is muxed with GMAC function. This
>> makes the pin output-low.
>>
>> This patch is compatible with earlier board revisions, since this
>> pin wasn't connected to phy.
>>
>> Signed-off-by: Stefan Mavrodiev <[email protected]>
>> ---
>> arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>> index 0b7403e..cb1b081 100644
>> --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>> +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>> @@ -102,7 +102,7 @@
>>
>> &gmac {
>> pinctrl-names = "default";
>> - pinctrl-0 = <&gmac_pins_mii_a>;
>> + pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr>;
>> phy = <&phy1>;
>> phy-mode = "mii";
>> status = "okay";
>> @@ -229,6 +229,11 @@
>> };
>>
>> &pio {
>> + gmac_txerr: gmac_txerr@0 {
>> + pins = "PA17";
>> + function = "gmac";
>> + };
>> +
> The patch looks fine, I still have one question though.
>
> Can a PHY operate without this signal? My real question is, would it
> make sense to mux that pin for all the users, or is it an optional
> signal that each board designer can choose to use or not?
>
> Thanks!
> Maxime
>
This phy (LAN8710) cannot work without this pin. Part of the problem is in that we've replaced
without paying attention to this signal.
RTL8201 has no TXERR pin. The pin PA17 is used as reset signal and therefore is pulled up with
resistor. However on old revisions this option (there is jumper pad between SOC and PHY).
As I said, LAN8710 cannot work without this signal. In the datasheet is written:
...
The controller drives TXER high when a transmit error is detected.
...
In the current variant of the dts, all data is threated as error.
So to answer you question. This is feature only on our board and highly depends on the chosen PHY.
I don't think this should be muxed for all users.
Best regards,
Stefan Mavrodiev,
Olimex Ltd.
On Thu, Aug 31, 2017 at 08:20:18AM +0300, Stefan Mavrodiev wrote:
> > > From revision J the board uses new phy chip LAN8710. Compared
> > > with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
> > > not to work. To fix this PA17 is muxed with GMAC function. This
> > > makes the pin output-low.
> > >
> > > This patch is compatible with earlier board revisions, since this
> > > pin wasn't connected to phy.
> > >
> > > Signed-off-by: Stefan Mavrodiev <[email protected]>
> > > ---
> > > arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
> > > 1 file changed, 6 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> > > index 0b7403e..cb1b081 100644
> > > --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> > > +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> > > @@ -102,7 +102,7 @@
> > > &gmac {
> > > pinctrl-names = "default";
> > > - pinctrl-0 = <&gmac_pins_mii_a>;
> > > + pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr>;
> > > phy = <&phy1>;
> > > phy-mode = "mii";
> > > status = "okay";
> > > @@ -229,6 +229,11 @@
> > > };
> > > &pio {
> > > + gmac_txerr: gmac_txerr@0 {
> > > + pins = "PA17";
> > > + function = "gmac";
> > > + };
> > > +
> > The patch looks fine, I still have one question though.
> >
> > Can a PHY operate without this signal? My real question is, would it
> > make sense to mux that pin for all the users, or is it an optional
> > signal that each board designer can choose to use or not?
> >
> > Thanks!
> > Maxime
>
> This phy (LAN8710) cannot work without this pin. Part of the problem
> is in that we've replaced without paying attention to this signal.
>
> RTL8201 has no TXERR pin. The pin PA17 is used as reset signal and
> therefore is pulled up with resistor. However on old revisions this
> option (there is jumper pad between SOC and PHY).
>
> As I said, LAN8710 cannot work without this signal. In the datasheet
> is written:
>
> ...
> The controller drives TXER high when a transmit error is detected.
> ...
>
> In the current variant of the dts, all data is threated as error.
Sorry if my question was unclear, I meant to ask for all PHYs
connected to an A20. I got that you were needing it for that
particular one :)
> So to answer you question. This is feature only on our board and
> highly depends on the chosen PHY. I don't think this should be
> muxed for all users.
Ok, I guess it answers it. Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
On Mon, Aug 28, 2017 at 09:32:42AM +0300, Stefan Mavrodiev wrote:
> From revision J the board uses new phy chip LAN8710. Compared
> with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
> not to work. To fix this PA17 is muxed with GMAC function. This
> makes the pin output-low.
>
> This patch is compatible with earlier board revisions, since this
> pin wasn't connected to phy.
>
> Signed-off-by: Stefan Mavrodiev <[email protected]>
Applied for 4.15, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
Hi Stefan,
On 31 August 2017 at 15:20, Stefan Mavrodiev <[email protected]> wrote:
> On 08/30/2017 05:37 PM, Maxime Ripard wrote:
>>
>> Hi,
>>
>> On Mon, Aug 28, 2017 at 09:32:42AM +0300, Stefan Mavrodiev wrote:
>>>
>>> From revision J the board uses new phy chip LAN8710. Compared
>>> with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
>>> not to work. To fix this PA17 is muxed with GMAC function. This
>>> makes the pin output-low.
>>>
>>> This patch is compatible with earlier board revisions, since this
>>> pin wasn't connected to phy.
>>>
>>> Signed-off-by: Stefan Mavrodiev <[email protected]>
>>> ---
>>> arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
>>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>>> b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>>> index 0b7403e..cb1b081 100644
>>> --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>>> +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>>> @@ -102,7 +102,7 @@
>>> &gmac {
>>> pinctrl-names = "default";
>>> - pinctrl-0 = <&gmac_pins_mii_a>;
>>> + pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr>;
>>> phy = <&phy1>;
>>> phy-mode = "mii";
>>> status = "okay";
>>> @@ -229,6 +229,11 @@
>>> };
>>> &pio {
>>> + gmac_txerr: gmac_txerr@0 {
>>> + pins = "PA17";
>>> + function = "gmac";
>>> + };
>>> +
>>
>> The patch looks fine, I still have one question though.
>>
>> Can a PHY operate without this signal? My real question is, would it
>> make sense to mux that pin for all the users, or is it an optional
>> signal that each board designer can choose to use or not?
>>
>> Thanks!
>> Maxime
>>
> This phy (LAN8710) cannot work without this pin. Part of the problem is in
> that we've replaced
> without paying attention to this signal.
>
> RTL8201 has no TXERR pin. The pin PA17 is used as reset signal and therefore
> is pulled up with
> resistor. However on old revisions this option (there is jumper pad between
> SOC and PHY).
>
> As I said, LAN8710 cannot work without this signal. In the datasheet is
> written:
> ...
> The controller drives TXER high when a transmit error is detected.
> ...
>
> In the current variant of the dts, all data is threated as error.
>
> So to answer you question. This is feature only on our board and highly
> depends on the chosen PHY.
> I don't think this should be muxed for all users.
>
>
>
> Best regards,
> Stefan Mavrodiev,
> Olimex Ltd.
Will you be submitting a patch for U-Boot as well?
Regards,
Jonathan