LinuxLists.cc - [PATCH v2 00/12] ARM: dts: sunxi: Fix DT build warnings

2017-09-22 18:42:58

Subject: [PATCH v2 00/12] ARM: dts: sunxi: Fix DT build warnings

Hello

The goal of this patch series is to have a clean DT build with W=1.

Regards

Changes since v1:
- moved i2c2 unit address change from patch #2 in patch #1

Corentin Labbe (12):
ARM: dts: sunxi: h3/h5: Fix simple-bus unit address format error
ARM: dts: sunxi: h3/h5: Fix i2c2 register address
ARM: dts: sunxi: h3/h5: Fix node with unit name and no reg property
ARM: dts: nanopi: Fix node with unit name and no reg property
ARM: dts: orangepi2: Fix node with unit name and no reg property
ARM: dts: sun8i: orangepi-lite: Fix node with unit name and no reg
property
ARM: dts: sun8i: orangepi one: Fix node with unit name and no reg
property
ARM: dts: sun8i: orangepipc: Fix node with unit name and no reg
property
ARM: dts: sun8i: orangepi-plus: Fix node with unit name and no reg
property
arm64: allwinner: a64: Fix simple-bus unit address format error
arm64: allwinner: a64: Fix node with unit name and no reg property
ARM: dts: sun8i: a83t: Fix simple-bus unit address format error

arch/arm/boot/dts/sun8i-a83t.dtsi | 6 +-
arch/arm/boot/dts/sun8i-h3-nanopi.dtsi | 8 +--
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 +--
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 6 +-
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 6 +-
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 6 +-
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 2 +-
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 88 +++++++++++++--------------
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 24 ++++----
9 files changed, 77 insertions(+), 77 deletions(-)

--
2.13.5

2017-09-22 18:43:05

by Corentin Labbe

[permalink] [raw]

Subject: [PATCH v2 01/12] ARM: dts: sunxi: h3/h5: Fix simple-bus unit address format error

This patch remove leading 0 of unit address and so remove
lots of warning when building DT with W=1.

Signed-off-by: Corentin Labbe <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 74 +++++++++++++++++++-------------------
1 file changed, 37 insertions(+), 37 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index a8e9b8f378ba..b37ed3461229 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -91,7 +91,7 @@
reg = <0x01c00000 0x1000>;
};

- dma: dma-controller@01c02000 {
+ dma: dma-controller@1c02000 {
compatible = "allwinner,sun8i-h3-dma";
reg = <0x01c02000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
@@ -100,7 +100,7 @@
#dma-cells = <1>;
};

- mmc0: mmc@01c0f000 {
+ mmc0: mmc@1c0f000 {
/* compatible and clocks are in per SoC .dtsi file */
reg = <0x01c0f000 0x1000>;
resets = <&ccu RST_BUS_MMC0>;
@@ -111,7 +111,7 @@
#size-cells = <0>;
};

- mmc1: mmc@01c10000 {
+ mmc1: mmc@1c10000 {
/* compatible and clocks are in per SoC .dtsi file */
reg = <0x01c10000 0x1000>;
resets = <&ccu RST_BUS_MMC1>;
@@ -122,7 +122,7 @@
#size-cells = <0>;
};

- mmc2: mmc@01c11000 {
+ mmc2: mmc@1c11000 {
/* compatible and clocks are in per SoC .dtsi file */
reg = <0x01c11000 0x1000>;
resets = <&ccu RST_BUS_MMC2>;
@@ -133,7 +133,7 @@
#size-cells = <0>;
};

- usb_otg: usb@01c19000 {
+ usb_otg: usb@1c19000 {
compatible = "allwinner,sun8i-h3-musb";
reg = <0x01c19000 0x400>;
clocks = <&ccu CLK_BUS_OTG>;
@@ -158,7 +158,7 @@
status = "disabled";
};

- usbphy: phy@01c19400 {
+ usbphy: phy@1c19400 {
compatible = "allwinner,sun8i-h3-usb-phy";
reg = <0x01c19400 0x2c>,
<0x01c1a800 0x4>,
@@ -190,7 +190,7 @@
#phy-cells = <1>;
};

- ehci0: usb@01c1a000 {
+ ehci0: usb@1c1a000 {
compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
reg = <0x01c1a000 0x100>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
@@ -199,7 +199,7 @@
status = "disabled";
};

- ohci0: usb@01c1a400 {
+ ohci0: usb@1c1a400 {
compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
reg = <0x01c1a400 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
@@ -209,7 +209,7 @@
status = "disabled";
};

- ehci1: usb@01c1b000 {
+ ehci1: usb@1c1b000 {
compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
reg = <0x01c1b000 0x100>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
@@ -220,7 +220,7 @@
status = "disabled";
};

- ohci1: usb@01c1b400 {
+ ohci1: usb@1c1b400 {
compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
reg = <0x01c1b400 0x100>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
@@ -232,7 +232,7 @@
status = "disabled";
};

- ehci2: usb@01c1c000 {
+ ehci2: usb@1c1c000 {
compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
reg = <0x01c1c000 0x100>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
@@ -243,7 +243,7 @@
status = "disabled";
};

- ohci2: usb@01c1c400 {
+ ohci2: usb@1c1c400 {
compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
reg = <0x01c1c400 0x100>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
@@ -255,7 +255,7 @@
status = "disabled";
};

- ehci3: usb@01c1d000 {
+ ehci3: usb@1c1d000 {
compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
reg = <0x01c1d000 0x100>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
@@ -266,7 +266,7 @@
status = "disabled";
};

- ohci3: usb@01c1d400 {
+ ohci3: usb@1c1d400 {
compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
reg = <0x01c1d400 0x100>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
@@ -278,7 +278,7 @@
status = "disabled";
};

- ccu: clock@01c20000 {
+ ccu: clock@1c20000 {
/* compatible is in per SoC .dtsi file */
reg = <0x01c20000 0x400>;
clocks = <&osc24M>, <&osc32k>;
@@ -287,7 +287,7 @@
#reset-cells = <1>;
};

- pio: pinctrl@01c20800 {
+ pio: pinctrl@1c20800 {
/* compatible is in per SoC .dtsi file */
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
@@ -400,7 +400,7 @@
};
};

- timer@01c20c00 {
+ timer@1c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0xa0>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
@@ -453,7 +453,7 @@
};
};

- spi0: spi@01c68000 {
+ spi0: spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
@@ -469,7 +469,7 @@
#size-cells = <0>;
};

- spi1: spi@01c69000 {
+ spi1: spi@1c69000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c69000 0x1000>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
@@ -485,13 +485,13 @@
#size-cells = <0>;
};

- wdt0: watchdog@01c20ca0 {
+ wdt0: watchdog@1c20ca0 {
compatible = "allwinner,sun6i-a31-wdt";
reg = <0x01c20ca0 0x20>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
};

- spdif: spdif@01c21000 {
+ spdif: spdif@1c21000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun8i-h3-spdif";
reg = <0x01c21000 0x400>;
@@ -504,7 +504,7 @@
status = "disabled";
};

- pwm: pwm@01c21400 {
+ pwm: pwm@1c21400 {
compatible = "allwinner,sun8i-h3-pwm";
reg = <0x01c21400 0x8>;
clocks = <&osc24M>;
@@ -512,7 +512,7 @@
status = "disabled";
};

- i2s0: i2s@01c22000 {
+ i2s0: i2s@1c22000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun8i-h3-i2s";
reg = <0x01c22000 0x400>;
@@ -525,7 +525,7 @@
status = "disabled";
};

- i2s1: i2s@01c22400 {
+ i2s1: i2s@1c22400 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun8i-h3-i2s";
reg = <0x01c22400 0x400>;
@@ -538,7 +538,7 @@
status = "disabled";
};

- codec: codec@01c22c00 {
+ codec: codec@1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun8i-h3-codec";
reg = <0x01c22c00 0x400>;
@@ -552,7 +552,7 @@
status = "disabled";
};

- uart0: serial@01c28000 {
+ uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
@@ -565,7 +565,7 @@
status = "disabled";
};

- uart1: serial@01c28400 {
+ uart1: serial@1c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
@@ -578,7 +578,7 @@
status = "disabled";
};

- uart2: serial@01c28800 {
+ uart2: serial@1c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x400>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
@@ -591,7 +591,7 @@
status = "disabled";
};

- uart3: serial@01c28c00 {
+ uart3: serial@1c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
@@ -604,7 +604,7 @@
status = "disabled";
};

- i2c0: i2c@01c2ac00 {
+ i2c0: i2c@1c2ac00 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
@@ -617,7 +617,7 @@
#size-cells = <0>;
};

- i2c1: i2c@01c2b000 {
+ i2c1: i2c@1c2b000 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
@@ -630,7 +630,7 @@
#size-cells = <0>;
};

- i2c2: i2c@01c2b400 {
+ i2c2: i2c@1c2b400 {
compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
@@ -643,7 +643,7 @@
#size-cells = <0>;
};

- gic: interrupt-controller@01c81000 {
+ gic: interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x01c81000 0x1000>,
<0x01c82000 0x2000>,
@@ -654,7 +654,7 @@
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};

- rtc: rtc@01f00000 {
+ rtc: rtc@1f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
@@ -671,12 +671,12 @@
#reset-cells = <1>;
};

- codec_analog: codec-analog@01f015c0 {
+ codec_analog: codec-analog@1f015c0 {
compatible = "allwinner,sun8i-h3-codec-analog";
reg = <0x01f015c0 0x4>;
};

- ir: ir@01f02000 {
+ ir: ir@1f02000 {
compatible = "allwinner,sun5i-a13-ir";
clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
clock-names = "apb", "ir";
@@ -686,7 +686,7 @@
status = "disabled";
};

- r_pio: pinctrl@01f02c00 {
+ r_pio: pinctrl@1f02c00 {
compatible = "allwinner,sun8i-h3-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
--
2.13.5

2017-09-22 18:43:12

by Corentin Labbe

[permalink] [raw]

Subject: [PATCH v2 10/12] arm64: allwinner: a64: Fix simple-bus unit address format error

2017-09-22 18:43:39

by Corentin Labbe

[permalink] [raw]

Subject: [PATCH v2 12/12] ARM: dts: sun8i: a83t: Fix simple-bus unit address format error

This patch remove leading 0 of unit address and so remove
lots of warning when building DT with W=1.

Signed-off-by: Corentin Labbe <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 7f99ef37f61f..dd6a393725c6 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -248,7 +248,7 @@
status = "disabled";
};

- usb_otg: usb@01c19000 {
+ usb_otg: usb@1c19000 {
compatible = "allwinner,sun8i-a83t-musb",
"allwinner,sun8i-a33-musb";
reg = <0x01c19000 0x0400>;
@@ -436,7 +436,7 @@
status = "disabled";
};

- uart0: serial@01c28000 {
+ uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
@@ -447,7 +447,7 @@
status = "disabled";
};

- uart1: serial@01c28400 {
+ uart1: serial@1c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
--
2.13.5

2017-09-22 18:43:09

by Corentin Labbe

[permalink] [raw]

Subject: [PATCH v2 08/12] ARM: dts: sun8i: orangepipc: Fix node with unit name and no reg property

2017-09-22 18:44:02

by Corentin Labbe

[permalink] [raw]

Subject: [PATCH v2 11/12] arm64: allwinner: a64: Fix node with unit name and no reg property

This patch fix the warning "xxx has a unit name, but no reg property" by
removing "@0" from such node

Signed-off-by: Corentin Labbe <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 662e8b7981b5..b02a8476b0c8 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -347,7 +347,7 @@
function = "spi1";
};

- uart0_pins_a: uart0@0 {
+ uart0_pins_a: uart0 {
pins = "PB8", "PB9";
function = "uart0";
};
@@ -571,7 +571,7 @@
interrupt-controller;
#interrupt-cells = <3>;

- r_rsb_pins: rsb@0 {
+ r_rsb_pins: rsb {
pins = "PL0", "PL1";
function = "s_rsb";
};
--
2.13.5

2017-09-22 18:44:36

by Corentin Labbe

[permalink] [raw]

Subject: [PATCH v2 09/12] ARM: dts: sun8i: orangepi-plus: Fix node with unit name and no reg property

2017-09-22 18:44:52

by Corentin Labbe

[permalink] [raw]

Subject: [PATCH v2 07/12] ARM: dts: sun8i: orangepi one: Fix node with unit name and no reg property

2017-09-22 18:45:14

by Corentin Labbe

[permalink] [raw]

Subject: [PATCH v2 06/12] ARM: dts: sun8i: orangepi-lite: Fix node with unit name and no reg property

2017-09-22 18:43:02

by Corentin Labbe

[permalink] [raw]

Subject: [PATCH v2 02/12] ARM: dts: sunxi: h3/h5: Fix i2c2 register address

The unit address and register address does not match.
This patch fix the register address with the good one.

Acked-by: Maxime Ripard <[email protected]>
Signed-off-by: Corentin Labbe <[email protected]>
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index b37ed3461229..289f2cd06dfe 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -632,7 +632,7 @@

i2c2: i2c@1c2b400 {
compatible = "allwinner,sun6i-a31-i2c";
- reg = <0x01c2b000 0x400>;
+ reg = <0x01c2b400 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C2>;
resets = <&ccu RST_BUS_I2C2>;
--
2.13.5

2017-09-22 18:45:28

by Corentin Labbe

[permalink] [raw]

Subject: [PATCH v2 05/12] ARM: dts: orangepi2: Fix node with unit name and no reg property

This patch fix the warning "xxx has a unit name, but no reg property" by
removing "@0" from such node.

Signed-off-by: Corentin Labbe <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 17cdeae19c6f..b20be95b49d5 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -160,24 +160,24 @@
};

&pio {
- leds_opc: led_pins@0 {
+ leds_opc: led_pins {
pins = "PA15";
function = "gpio_out";
};
};

&r_pio {
- leds_r_opc: led_pins@0 {
+ leds_r_opc: led_pins {
pins = "PL10";
function = "gpio_out";
};

- sw_r_opc: key_pins@0 {
+ sw_r_opc: key_pins {
pins = "PL3", "PL4";
function = "gpio_in";
};

- wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin@0 {
+ wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin {
pins = "PL7";
function = "gpio_out";
};
--
2.13.5

2017-09-22 18:45:58

by Corentin Labbe

[permalink] [raw]

Subject: [PATCH v2 03/12] ARM: dts: sunxi: h3/h5: Fix node with unit name and no reg property

This patch fix the warning "xxx has a unit name, but no reg property" by
removing "@0" from such node.

Signed-off-by: Corentin Labbe <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 289f2cd06dfe..2e4bae988acd 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -322,7 +322,7 @@
function = "i2c2";
};

- mmc0_pins_a: mmc0@0 {
+ mmc0_pins_a: mmc0 {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
function = "mmc0";
@@ -330,13 +330,13 @@
bias-pull-up;
};

- mmc0_cd_pin: mmc0_cd_pin@0 {
+ mmc0_cd_pin: mmc0_cd_pin {
pins = "PF6";
function = "gpio_in";
bias-pull-up;
};

- mmc1_pins_a: mmc1@0 {
+ mmc1_pins_a: mmc1 {
pins = "PG0", "PG1", "PG2", "PG3",
"PG4", "PG5";
function = "mmc1";
@@ -354,7 +354,7 @@
bias-pull-up;
};

- spdif_tx_pins_a: spdif@0 {
+ spdif_tx_pins_a: spdif {
pins = "PA17";
function = "spdif";
};
@@ -369,7 +369,7 @@
function = "spi1";
};

- uart0_pins_a: uart0@0 {
+ uart0_pins_a: uart0 {
pins = "PA4", "PA5";
function = "uart0";
};
@@ -697,7 +697,7 @@
interrupt-controller;
#interrupt-cells = <3>;

- ir_pins_a: ir@0 {
+ ir_pins_a: ir {
pins = "PL11";
function = "s_cir_rx";
};
--
2.13.5

2017-09-22 18:45:55

by Corentin Labbe

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Subject: [PATCH v2 04/12] ARM: dts: nanopi: Fix node with unit name and no reg property

This patch fix the warning "xxx has a unit name, but no reg property" by
removing "@0" from such node.

Signed-off-by: Corentin Labbe <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
---
arch/arm/boot/dts/sun8i-h3-nanopi.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
index c6decee41a27..7646e331bd29 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
@@ -81,7 +81,7 @@
pinctrl-names = "default";
pinctrl-0 = <&sw_r_npi>;

- k1@0 {
+ k1 {
label = "k1";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
@@ -108,19 +108,19 @@
};

&pio {
- leds_npi: led_pins@0 {
+ leds_npi: led_pins {
pins = "PA10";
function = "gpio_out";
};
};

&r_pio {
- leds_r_npi: led_pins@0 {
+ leds_r_npi: led_pins {
pins = "PL10";
function = "gpio_out";
};

- sw_r_npi: key_pins@0 {
+ sw_r_npi: key_pins {
pins = "PL3";
function = "gpio_in";
};
--
2.13.5

2017-09-23 02:29:55

by Chen-Yu Tsai

[permalink] [raw]

Subject: Re: [PATCH v2 11/12] arm64: allwinner: a64: Fix node with unit name and no reg property

On Sat, Sep 23, 2017 at 2:40 AM, Corentin Labbe
<[email protected]> wrote:
> This patch fix the warning "xxx has a unit name, but no reg property" by
> removing "@0" from such node
>
> Signed-off-by: Corentin Labbe <[email protected]>
> Acked-by: Maxime Ripard <[email protected]>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 662e8b7981b5..b02a8476b0c8 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -347,7 +347,7 @@
> function = "spi1";
> };
>
> - uart0_pins_a: uart0@0 {
> + uart0_pins_a: uart0 {

Same here. This should be uart0_pb_pins.

> pins = "PB8", "PB9";
> function = "uart0";
> };
> @@ -571,7 +571,7 @@
> interrupt-controller;
> #interrupt-cells = <3>;
>
> - r_rsb_pins: rsb@0 {
> + r_rsb_pins: rsb {

And this rsb_pins.

ChenYu

> pins = "PL0", "PL1";
> function = "s_rsb";
> };
> --
> 2.13.5
>

2017-09-23 01:51:21

by Chen-Yu Tsai

[permalink] [raw]

Subject: Re: [PATCH v2 03/12] ARM: dts: sunxi: h3/h5: Fix node with unit name and no reg property

On Sat, Sep 23, 2017 at 2:40 AM, Corentin Labbe
<[email protected]> wrote:
> This patch fix the warning "xxx has a unit name, but no reg property" by
> removing "@0" from such node.
>
> Signed-off-by: Corentin Labbe <[email protected]>
> Acked-by: Maxime Ripard <[email protected]>
> ---
> arch/arm/boot/dts/sunxi-h3-h5.dtsi | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> index 289f2cd06dfe..2e4bae988acd 100644
> --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> @@ -322,7 +322,7 @@
> function = "i2c2";
> };
>
> - mmc0_pins_a: mmc0@0 {
> + mmc0_pins_a: mmc0 {

All pinmux nodes should have the suffix "_pins" or "_pin".

In the case where there are multiple choices, the node name should convey
what or which pingroup the choice is. In this case the name should be
"mmc0_pf_pins".

> pins = "PF0", "PF1", "PF2", "PF3",
> "PF4", "PF5";
> function = "mmc0";
> @@ -330,13 +330,13 @@
> bias-pull-up;
> };
>
> - mmc0_cd_pin: mmc0_cd_pin@0 {
> + mmc0_cd_pin: mmc0_cd_pin {
> pins = "PF6";
> function = "gpio_in";
> bias-pull-up;
> };
>
> - mmc1_pins_a: mmc1@0 {
> + mmc1_pins_a: mmc1 {

mmc1_pins

> pins = "PG0", "PG1", "PG2", "PG3",
> "PG4", "PG5";
> function = "mmc1";
> @@ -354,7 +354,7 @@
> bias-pull-up;
> };
>
> - spdif_tx_pins_a: spdif@0 {
> + spdif_tx_pins_a: spdif {

spdif_pin

> pins = "PA17";
> function = "spdif";
> };
> @@ -369,7 +369,7 @@
> function = "spi1";
> };
>
> - uart0_pins_a: uart0@0 {
> + uart0_pins_a: uart0 {

uart0_pb_pins

> pins = "PA4", "PA5";
> function = "uart0";
> };
> @@ -697,7 +697,7 @@
> interrupt-controller;
> #interrupt-cells = <3>;
>
> - ir_pins_a: ir@0 {
> + ir_pins_a: ir {

ir_pin

ChenYu

> pins = "PL11";
> function = "s_cir_rx";
> };
> --
> 2.13.5
>