Use reset controller driver instead of platform quirk for AXS10x boards
to reset DW ethernet controller HW.
Eugeniy Paltsev (2):
ARC: [plat-axs10x]: DTS: Add reset controller node to manage ethernet
reset
ARC: [plat-axs10x]: Remove platform quirk to reset ethernet IP
arch/arc/boot/dts/axs10x_mb.dtsi | 8 ++++++++
arch/arc/plat-axs10x/axs10x.c | 7 -------
2 files changed, 8 insertions(+), 7 deletions(-)
--
2.9.3
From 1583959364057731542@xxx Mon Nov 13 13:56:03 +0000 2017
X-GM-THRID: 1583959364057731542
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DW ethernet controller on axs10x hangs sometimes after SW reset, so
add reset node to make possible to reset DW ethernet controller HW.
Signed-off-by: Eugeniy Paltsev <[email protected]>
---
arch/arc/boot/dts/axs10x_mb.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index e114000..74d070c 100644
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -16,6 +16,12 @@
ranges = <0x00000000 0x0 0xe0000000 0x10000000>;
interrupt-parent = <&mb_intc>;
+ creg_rst: reset-controller@11220 {
+ compatible = "snps,axs10x-reset";
+ #reset-cells = <1>;
+ reg = <0x11220 0x4>;
+ };
+
i2sclk: i2sclk@100a0 {
compatible = "snps,axs10x-i2s-pll-clock";
reg = <0x100a0 0x10>;
@@ -73,6 +79,8 @@
clocks = <&apbclk>;
clock-names = "stmmaceth";
max-speed = <100>;
+ resets = <&creg_rst 5>;
+ reset-names = "stmmaceth";
};
ehci@0x40000 {
--
2.9.3
From 1583576028856379882@xxx Thu Nov 09 08:23:06 +0000 2017
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Remove platform quirk to reset ethernet IP as AXS10x reset driver
(reset-axs10x.c) was applied.
Signed-off-by: Eugeniy Paltsev <[email protected]>
---
arch/arc/plat-axs10x/axs10x.c | 7 -------
1 file changed, 7 deletions(-)
diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index cf14ebc..f1ac679 100644
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -111,13 +111,6 @@ static void __init axs10x_early_init(void)
axs10x_enable_gpio_intc_wire();
- /*
- * Reset ethernet IP core.
- * TODO: get rid of this quirk after axs10x reset driver (or simple
- * reset driver) will be available in upstream.
- */
- iowrite32((1 << 5), (void __iomem *) CREG_MB_SW_RESET);
-
scnprintf(mb, 32, "MainBoard v%d", mb_rev);
axs10x_print_board_ver(CREG_MB_VER, mb);
}
--
2.9.3
From 1583055578872278495@xxx Fri Nov 03 14:30:47 +0000 2017
X-GM-THRID: 1582241984334359464
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