This series is based on v4.15-rc1 and [1].
Mediatek projects will use mediate-cpufreq.c as cpufreq driver,
so add mediatek related projects into black list of cpufreq_dt.c
mt8173 and mt2712 both support 2 clusters, and the main difference
is that mt2712 currently only support fixed voltage.
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2017-November/544072.html
Andrew-sh Cheng (4):
cpufreq: mediatek: add mt2712 into compatible list
cpufreq: mediatek: Add mediatek related projects into blacklist
arm64: dts: mediatek: add mt8173 cpufreq related device nodes
arm64: dts: mediatek: add mt2712 cpufreq related device nodes
arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 27 +++++++++
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 57 ++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++++++
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 90 +++++++++++++++++++++++++++++
drivers/cpufreq/cpufreq-dt-platdev.c | 8 +++
drivers/cpufreq/mediatek-cpufreq.c | 1 +
6 files changed, 201 insertions(+)
--
2.6.4
Support mt2712 in mediatek-cpufreq.c
Signed-off-by: Andrew-sh Cheng <[email protected]>
---
drivers/cpufreq/mediatek-cpufreq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c
index 18c4bd9..62aec5c 100644
--- a/drivers/cpufreq/mediatek-cpufreq.c
+++ b/drivers/cpufreq/mediatek-cpufreq.c
@@ -574,6 +574,7 @@ static struct platform_driver mtk_cpufreq_platdrv = {
/* List of machines supported by this driver */
static const struct of_device_id mtk_cpufreq_machines[] __initconst = {
{ .compatible = "mediatek,mt2701", },
+ { .compatible = "mediatek,mt2712", },
{ .compatible = "mediatek,mt7622", },
{ .compatible = "mediatek,mt7623", },
{ .compatible = "mediatek,mt817x", },
--
2.6.4
mediatek projects will use mediate-cpufreq.c as cpufreq driver,
instead of using cpufreq_dt.c
Add mediatek related projects into cpufreq-dt blacklist
Signed-off-by: Andrew-sh Cheng <[email protected]>
---
drivers/cpufreq/cpufreq-dt-platdev.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index ecc56e2..3b585e4 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -108,6 +108,14 @@ static const struct of_device_id blacklist[] __initconst = {
{ .compatible = "marvell,armadaxp", },
+ { .compatible = "mediatek,mt2701", },
+ { .compatible = "mediatek,mt2712", },
+ { .compatible = "mediatek,mt7622", },
+ { .compatible = "mediatek,mt7623", },
+ { .compatible = "mediatek,mt817x", },
+ { .compatible = "mediatek,mt8173", },
+ { .compatible = "mediatek,mt8176", },
+
{ .compatible = "nvidia,tegra124", },
{ .compatible = "st,stih407", },
--
2.6.4
Add opp v2 information,
and also add clocks, regulators and opp information into cpu nodes
Signed-off-by: Andrew-sh Cheng <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++++++
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 90 +++++++++++++++++++++++++++++
2 files changed, 108 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
index 1c3634f..369dfcd 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
@@ -74,6 +74,24 @@
status = "okay";
};
+&cpu0 {
+ proc-supply = <&mt6397_vpca15_reg>;
+};
+
+&cpu1 {
+ proc-supply = <&mt6397_vpca15_reg>;
+};
+
+&cpu2 {
+ proc-supply = <&da9211_vcpu_reg>;
+ sram-supply = <&mt6397_vsramca7_reg>;
+};
+
+&cpu3 {
+ proc-supply = <&da9211_vcpu_reg>;
+ sram-supply = <&mt6397_vsramca7_reg>;
+};
+
&dpi0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 26396ef..31bc593 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -51,6 +51,80 @@
mdp_wrot1 = &mdp_wrot1;
};
+ cluster0_opp: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+ opp-507000000 {
+ opp-hz = /bits/ 64 <507000000>;
+ opp-microvolt = <859000>;
+ };
+ opp-702000000 {
+ opp-hz = /bits/ 64 <702000000>;
+ opp-microvolt = <908000>;
+ };
+ opp-1001000000 {
+ opp-hz = /bits/ 64 <1001000000>;
+ opp-microvolt = <983000>;
+ };
+ opp-1105000000 {
+ opp-hz = /bits/ 64 <1105000000>;
+ opp-microvolt = <1009000>;
+ };
+ opp-1209000000 {
+ opp-hz = /bits/ 64 <1209000000>;
+ opp-microvolt = <1034000>;
+ };
+ opp-1300000000 {
+ opp-hz = /bits/ 64 <1300000000>;
+ opp-microvolt = <1057000>;
+ };
+ opp-1508000000 {
+ opp-hz = /bits/ 64 <1508000000>;
+ opp-microvolt = <1109000>;
+ };
+ opp-1703000000 {
+ opp-hz = /bits/ 64 <1703000000>;
+ opp-microvolt = <1125000>;
+ };
+ };
+
+ cluster1_opp: opp_table1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+ opp-507000000 {
+ opp-hz = /bits/ 64 <507000000>;
+ opp-microvolt = <828000>;
+ };
+ opp-702000000 {
+ opp-hz = /bits/ 64 <702000000>;
+ opp-microvolt = <867000>;
+ };
+ opp-1001000000 {
+ opp-hz = /bits/ 64 <1001000000>;
+ opp-microvolt = <927000>;
+ };
+ opp-1209000000 {
+ opp-hz = /bits/ 64 <1209000000>;
+ opp-microvolt = <968000>;
+ };
+ opp-1404000000 {
+ opp-hz = /bits/ 64 <1404000000>;
+ opp-microvolt = <1007000>;
+ };
+ opp-1612000000 {
+ opp-hz = /bits/ 64 <1612000000>;
+ opp-microvolt = <1049000>;
+ };
+ opp-1807000000 {
+ opp-hz = /bits/ 64 <1807000000>;
+ opp-microvolt = <1089000>;
+ };
+ opp-2106000000 {
+ opp-hz = /bits/ 64 <2106000000>;
+ opp-microvolt = <1125000>;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -81,6 +155,10 @@
reg = <0x000>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&infracfg CLK_INFRA_CA53SEL>,
+ <&apmixedsys CLK_APMIXED_MAINPLL>;
+ clock-names = "cpu", "intermediate";
+ operating-points-v2 = <&cluster0_opp>;
};
cpu1: cpu@1 {
@@ -89,6 +167,10 @@
reg = <0x001>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&infracfg CLK_INFRA_CA53SEL>,
+ <&apmixedsys CLK_APMIXED_MAINPLL>;
+ clock-names = "cpu", "intermediate";
+ operating-points-v2 = <&cluster0_opp>;
};
cpu2: cpu@100 {
@@ -97,6 +179,10 @@
reg = <0x100>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&infracfg CLK_INFRA_CA57SEL>,
+ <&apmixedsys CLK_APMIXED_MAINPLL>;
+ clock-names = "cpu", "intermediate";
+ operating-points-v2 = <&cluster1_opp>;
};
cpu3: cpu@101 {
@@ -105,6 +191,10 @@
reg = <0x101>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
+ clocks = <&infracfg CLK_INFRA_CA57SEL>,
+ <&apmixedsys CLK_APMIXED_MAINPLL>;
+ clock-names = "cpu", "intermediate";
+ operating-points-v2 = <&cluster1_opp>;
};
idle-states {
--
2.6.4
Add opp v2 information,
and also add clocks, regulators and opp information into cpu nodes
Signed-off-by: Andrew-sh Cheng <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 27 ++++++++++++++
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 57 +++++++++++++++++++++++++++++
2 files changed, 84 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts
index 14163b9..d47f3c7 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts
@@ -26,6 +26,33 @@
linux,initrd-start = <0x45000000>;
linux,initrd-end = <0x4a000000>;
};
+
+ cpus_fixed_vproc0: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vproc_buck0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ };
+
+ cpus_fixed_vproc1: fixedregulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vproc_buck1";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ };
+
+};
+
+&cpu0 {
+ proc-supply = <&cpus_fixed_vproc0>;
+};
+
+&cpu1 {
+ proc-supply = <&cpus_fixed_vproc0>;
+};
+
+&cpu2 {
+ proc-supply = <&cpus_fixed_vproc1>;
};
&uart0 {
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 61dd763..fdf66f4 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -16,6 +16,48 @@
#address-cells = <2>;
#size-cells = <2>;
+ cluster0_opp: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+ opp00 {
+ opp-hz = /bits/ 64 <598000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <702000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <793000000>;
+ opp-microvolt = <1000000>;
+ };
+ };
+
+ cluster1_opp: opp_table1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+ opp00 {
+ opp-hz = /bits/ 64 <598000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <702000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <793000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <897000000>;
+ opp-microvolt = <1000000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1001000000>;
+ opp-microvolt = <1000000>;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -41,6 +83,11 @@
device_type = "cpu";
compatible = "arm,cortex-a35";
reg = <0x000>;
+ clocks = <&mcucfg CLK_MCU_MP0_SEL>,
+ <&topckgen CLK_TOP_F_MP0_PLL1>;
+ clock-names = "cpu", "intermediate";
+ proc-supply = <&cpus_fixed_vproc0>;
+ operating-points-v2 = <&cluster0_opp>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
@@ -49,6 +96,11 @@
compatible = "arm,cortex-a35";
reg = <0x001>;
enable-method = "psci";
+ clocks = <&mcucfg CLK_MCU_MP0_SEL>,
+ <&topckgen CLK_TOP_F_MP0_PLL1>;
+ clock-names = "cpu", "intermediate";
+ proc-supply = <&cpus_fixed_vproc0>;
+ operating-points-v2 = <&cluster0_opp>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
@@ -57,6 +109,11 @@
compatible = "arm,cortex-a72";
reg = <0x200>;
enable-method = "psci";
+ clocks = <&mcucfg CLK_MCU_MP2_SEL>,
+ <&topckgen CLK_TOP_F_BIG_PLL1>;
+ clock-names = "cpu", "intermediate";
+ proc-supply = <&cpus_fixed_vproc1>;
+ operating-points-v2 = <&cluster1_opp>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
--
2.6.4
On 08-12-17, 14:07, Andrew-sh Cheng wrote:
> Support mt2712 in mediatek-cpufreq.c
>
> Signed-off-by: Andrew-sh Cheng <[email protected]>
> ---
> drivers/cpufreq/mediatek-cpufreq.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c
> index 18c4bd9..62aec5c 100644
> --- a/drivers/cpufreq/mediatek-cpufreq.c
> +++ b/drivers/cpufreq/mediatek-cpufreq.c
> @@ -574,6 +574,7 @@ static struct platform_driver mtk_cpufreq_platdrv = {
> /* List of machines supported by this driver */
> static const struct of_device_id mtk_cpufreq_machines[] __initconst = {
> { .compatible = "mediatek,mt2701", },
> + { .compatible = "mediatek,mt2712", },
> { .compatible = "mediatek,mt7622", },
> { .compatible = "mediatek,mt7623", },
> { .compatible = "mediatek,mt817x", },
Acked-by: Viresh Kumar <[email protected]>
--
viresh
On 08-12-17, 14:07, Andrew-sh Cheng wrote:
> mediatek projects will use mediate-cpufreq.c as cpufreq driver,
> instead of using cpufreq_dt.c
> Add mediatek related projects into cpufreq-dt blacklist
>
> Signed-off-by: Andrew-sh Cheng <[email protected]>
> ---
> drivers/cpufreq/cpufreq-dt-platdev.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
> index ecc56e2..3b585e4 100644
> --- a/drivers/cpufreq/cpufreq-dt-platdev.c
> +++ b/drivers/cpufreq/cpufreq-dt-platdev.c
> @@ -108,6 +108,14 @@ static const struct of_device_id blacklist[] __initconst = {
>
> { .compatible = "marvell,armadaxp", },
>
> + { .compatible = "mediatek,mt2701", },
> + { .compatible = "mediatek,mt2712", },
> + { .compatible = "mediatek,mt7622", },
> + { .compatible = "mediatek,mt7623", },
> + { .compatible = "mediatek,mt817x", },
> + { .compatible = "mediatek,mt8173", },
> + { .compatible = "mediatek,mt8176", },
> +
> { .compatible = "nvidia,tegra124", },
>
> { .compatible = "st,stih407", },
Acked-by: Viresh Kumar <[email protected]>
--
viresh
On 08-12-17, 14:07, Andrew-sh Cheng wrote:
> Add opp v2 information,
> and also add clocks, regulators and opp information into cpu nodes
>
> Signed-off-by: Andrew-sh Cheng <[email protected]>
> ---
> arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++++++
> arch/arm64/boot/dts/mediatek/mt8173.dtsi | 90 +++++++++++++++++++++++++++++
> 2 files changed, 108 insertions(+)
Acked-by: Viresh Kumar <[email protected]>
--
viresh
On 08-12-17, 14:07, Andrew-sh Cheng wrote:
> Add opp v2 information,
> and also add clocks, regulators and opp information into cpu nodes
>
> Signed-off-by: Andrew-sh Cheng <[email protected]>
> ---
> arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 27 ++++++++++++++
> arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 57 +++++++++++++++++++++++++++++
> 2 files changed, 84 insertions(+)
Acked-by: Viresh Kumar <[email protected]>
--
viresh
On Monday, December 11, 2017 8:57:19 AM CET Viresh Kumar wrote:
> On 08-12-17, 14:07, Andrew-sh Cheng wrote:
> > Add opp v2 information,
> > and also add clocks, regulators and opp information into cpu nodes
> >
> > Signed-off-by: Andrew-sh Cheng <[email protected]>
> > ---
> > arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 27 ++++++++++++++
> > arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 57 +++++++++++++++++++++++++++++
> > 2 files changed, 84 insertions(+)
>
> Acked-by: Viresh Kumar <[email protected]>
Of course, DT bindings require ACKs from DT maintainers to be applied.
On 12-12-17, 02:17, Rafael J. Wysocki wrote:
> On Monday, December 11, 2017 8:57:19 AM CET Viresh Kumar wrote:
> > On 08-12-17, 14:07, Andrew-sh Cheng wrote:
> > > Add opp v2 information,
> > > and also add clocks, regulators and opp information into cpu nodes
> > >
> > > Signed-off-by: Andrew-sh Cheng <[email protected]>
> > > ---
> > > arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 27 ++++++++++++++
> > > arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 57 +++++++++++++++++++++++++++++
> > > 2 files changed, 84 insertions(+)
> >
> > Acked-by: Viresh Kumar <[email protected]>
>
> Of course, DT bindings require ACKs from DT maintainers to be applied.
I didn't knew that we need Acks from DT maintainers for dts files as well? Yeah,
its very much required while defining new bindings for sure.
--
viresh
Hi,
On 12/12/2017 08:26 AM, Viresh Kumar wrote:
> On 12-12-17, 02:17, Rafael J. Wysocki wrote:
>> On Monday, December 11, 2017 8:57:19 AM CET Viresh Kumar wrote:
>>> On 08-12-17, 14:07, Andrew-sh Cheng wrote:
>>>> Add opp v2 information,
>>>> and also add clocks, regulators and opp information into cpu nodes
>>>>
>>>> Signed-off-by: Andrew-sh Cheng <[email protected]>
>>>> ---
>>>> arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 27 ++++++++++++++
>>>> arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 57 +++++++++++++++++++++++++++++
>>>> 2 files changed, 84 insertions(+)
>>>
>>> Acked-by: Viresh Kumar <[email protected]>
>>
>> Of course, DT bindings require ACKs from DT maintainers to be applied.
>
> I didn't knew that we need Acks from DT maintainers for dts files as well? Yeah,
> its very much required while defining new bindings for sure.
>
I will take the dts parts through the Mediatek SoC tree, so you don't have to
worry about them.
Please let me know when you take patch 1 and 2.
Regards,
Matthias
On Tuesday, December 12, 2017 10:34:42 AM CET Matthias Brugger wrote:
> Hi,
>
> On 12/12/2017 08:26 AM, Viresh Kumar wrote:
> > On 12-12-17, 02:17, Rafael J. Wysocki wrote:
> >> On Monday, December 11, 2017 8:57:19 AM CET Viresh Kumar wrote:
> >>> On 08-12-17, 14:07, Andrew-sh Cheng wrote:
> >>>> Add opp v2 information,
> >>>> and also add clocks, regulators and opp information into cpu nodes
> >>>>
> >>>> Signed-off-by: Andrew-sh Cheng <[email protected]>
> >>>> ---
> >>>> arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 27 ++++++++++++++
> >>>> arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 57 +++++++++++++++++++++++++++++
> >>>> 2 files changed, 84 insertions(+)
> >>>
> >>> Acked-by: Viresh Kumar <[email protected]>
> >>
> >> Of course, DT bindings require ACKs from DT maintainers to be applied.
> >
> > I didn't knew that we need Acks from DT maintainers for dts files as well? Yeah,
> > its very much required while defining new bindings for sure.
> >
>
> I will take the dts parts through the Mediatek SoC tree, so you don't have to
> worry about them.
>
> Please let me know when you take patch 1 and 2.
Applied now, thanks!
Do you need the branch containing them to be exposed?
Thanks,
Rafael
On 12/17/2017 07:05 PM, Rafael J. Wysocki wrote:
> On Tuesday, December 12, 2017 10:34:42 AM CET Matthias Brugger wrote:
>> Hi,
>>
>> On 12/12/2017 08:26 AM, Viresh Kumar wrote:
>>> On 12-12-17, 02:17, Rafael J. Wysocki wrote:
>>>> On Monday, December 11, 2017 8:57:19 AM CET Viresh Kumar wrote:
>>>>> On 08-12-17, 14:07, Andrew-sh Cheng wrote:
>>>>>> Add opp v2 information,
>>>>>> and also add clocks, regulators and opp information into cpu nodes
>>>>>>
>>>>>> Signed-off-by: Andrew-sh Cheng <[email protected]>
>>>>>> ---
>>>>>> arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 27 ++++++++++++++
>>>>>> arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 57 +++++++++++++++++++++++++++++
>>>>>> 2 files changed, 84 insertions(+)
>>>>>
>>>>> Acked-by: Viresh Kumar <[email protected]>
>>>>
>>>> Of course, DT bindings require ACKs from DT maintainers to be applied.
>>>
>>> I didn't knew that we need Acks from DT maintainers for dts files as well? Yeah,
>>> its very much required while defining new bindings for sure.
>>>
>>
>> I will take the dts parts through the Mediatek SoC tree, so you don't have to
>> worry about them.
>>
>> Please let me know when you take patch 1 and 2.
>
> Applied now, thanks!
>
> Do you need the branch containing them to be exposed?
>
No, that's not necessary.
I pushed the two patches to v4.15-next/dts64 now.
Hi, Rafael and Viresh
Can you kindly guide me how to let the patch also be applied to 4.14 and
4.15 tree? Do I need to submit another patches for them?
These trees really need them. Otherwise, multi_v7_defconfig setup will
cause an occasional hang or unexpected behaviors on related boards as
[1] kernelci reported :-(
Sean
[1]
https://kernelci.org/boot/mt7623n-bananapi-bpi-r2/
On Mon, 2017-12-11 at 13:25 +0530, Viresh Kumar wrote:
> On 08-12-17, 14:07, Andrew-sh Cheng wrote:
> > mediatek projects will use mediate-cpufreq.c as cpufreq driver,
> > instead of using cpufreq_dt.c
> > Add mediatek related projects into cpufreq-dt blacklist
> >
> > Signed-off-by: Andrew-sh Cheng <[email protected]>
> > ---
> > drivers/cpufreq/cpufreq-dt-platdev.c | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
> > index ecc56e2..3b585e4 100644
> > --- a/drivers/cpufreq/cpufreq-dt-platdev.c
> > +++ b/drivers/cpufreq/cpufreq-dt-platdev.c
> > @@ -108,6 +108,14 @@ static const struct of_device_id blacklist[] __initconst = {
> >
> > { .compatible = "marvell,armadaxp", },
> >
> > + { .compatible = "mediatek,mt2701", },
> > + { .compatible = "mediatek,mt2712", },
> > + { .compatible = "mediatek,mt7622", },
> > + { .compatible = "mediatek,mt7623", },
> > + { .compatible = "mediatek,mt817x", },
> > + { .compatible = "mediatek,mt8173", },
> > + { .compatible = "mediatek,mt8176", },
> > +
> > { .compatible = "nvidia,tegra124", },
> >
> > { .compatible = "st,stih407", },
>
> Acked-by: Viresh Kumar <[email protected]>
>
On 22-01-18, 16:39, Sean Wang wrote:
> Hi, Rafael and Viresh
>
> Can you kindly guide me how to let the patch also be applied to 4.14 and
> 4.15 tree? Do I need to submit another patches for them?
>
> These trees really need them. Otherwise, multi_v7_defconfig setup will
> cause an occasional hang or unexpected behaviors on related boards as
> [1] kernelci reported :-(
You need to send them for stable kernels, just follow the following doc on how
to send patches for stable kernels.
Documentation/process/stable-kernel-rules.rst
--
viresh