2018-05-15 22:05:26

by Maciej W. Rozycki

[permalink] [raw]

Subject: [PATCH] MIPS: ptrace: Make FPU context layout comments match reality

---

Correct comments across ptrace(2) handlers about an FPU register context
layout discrepancy between MIPS I and later ISAs, which was fixed with
`linux-mips.org' (LMO) commit 42533948caac ("Major pile of FP emulator
changes."), the fix corrected with LMO commit 849fa7a50dff ("R3k FPU
ptrace() handling fixes."), and then broken and fixed over and over
again, until last time fixed with commit 80cbfad79096 ("MIPS: Correct
MIPS I FP context layout").

NB running the GDB test suite for the relevant ABI/ISA and watching out
for regressions is advisable when poking around ptrace(2).

Signed-off-by: Maciej W. Rozycki <[email protected]>
---
arch/mips/kernel/ptrace.c | 4 ++--
arch/mips/kernel/ptrace32.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)

linux-mips-ptrace-r2300-switch-comment.diff
Index: linux/arch/mips/kernel/ptrace.c
===================================================================
--- linux.orig/arch/mips/kernel/ptrace.c 2018-05-10 21:24:39.000000000 +0100
+++ linux/arch/mips/kernel/ptrace.c 2018-05-12 13:28:01.156433000 +0100
@@ -1063,7 +1063,7 @@ long arch_ptrace(struct task_struct *chi
/*
* The odd registers are actually the high
* order bits of the values stored in the even
- * registers - unless we're using r2k_switch.S.
+ * registers.
*/
tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
addr & 1);
@@ -1158,7 +1158,7 @@ long arch_ptrace(struct task_struct *chi
/*
* The odd registers are actually the high
* order bits of the values stored in the even
- * registers - unless we're using r2k_switch.S.
+ * registers.
*/
set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
addr & 1, data);
Index: linux-mipsswbrd038/arch/mips/kernel/ptrace32.c
===================================================================
--- linux-mipsswbrd038.orig/arch/mips/kernel/ptrace32.c 2018-05-10 20:52:25.000000000 +0100
+++ linux-mipsswbrd038/arch/mips/kernel/ptrace32.c 2018-05-12 13:28:18.503568000 +0100
@@ -103,7 +103,7 @@ long compat_arch_ptrace(struct task_stru
/*
* The odd registers are actually the high
* order bits of the values stored in the even
- * registers - unless we're using r2k_switch.S.
+ * registers.
*/
tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
addr & 1);
@@ -216,7 +216,7 @@ long compat_arch_ptrace(struct task_stru
/*
* The odd registers are actually the high
* order bits of the values stored in the even
- * registers - unless we're using r2k_switch.S.
+ * registers.
*/
set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
addr & 1, data);

2018-05-31 21:35:12

by James Hogan

[permalink] [raw]

Subject: Re: [PATCH] MIPS: ptrace: Make FPU context layout comments match reality

---

On Tue, May 15, 2018 at 11:03:09PM +0100, Maciej W. Rozycki wrote:
> Correct comments across ptrace(2) handlers about an FPU register context
> layout discrepancy between MIPS I and later ISAs, which was fixed with
> `linux-mips.org' (LMO) commit 42533948caac ("Major pile of FP emulator
> changes."), the fix corrected with LMO commit 849fa7a50dff ("R3k FPU
> ptrace() handling fixes."), and then broken and fixed over and over
> again, until last time fixed with commit 80cbfad79096 ("MIPS: Correct
> MIPS I FP context layout").
>
> NB running the GDB test suite for the relevant ABI/ISA and watching out
> for regressions is advisable when poking around ptrace(2).
>
> Signed-off-by: Maciej W. Rozycki <[email protected]>

Thanks, applied for 4.18.

Cheers
James

---

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