2018-06-18 21:53:21

by Doug Anderson

Subject: [PATCH v2 1/2] arm64: dts: sdm845: Add rpmh-rsc node

This adds the rpmh-rsc node to sdm845 based on the examples in the
bindings.

Signed-off-by: Douglas Anderson <[email protected]>
---

Changes in v2:
- Fixed ordering of tcs-config as per Lina.

arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index cd308b84bed7..43a182fb42c9 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -7,6 +7,7 @@

#include <dt-bindings/clock/qcom,gcc-sdm845.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/qcom,rpmh-rsc.h>

/ {
interrupt-parent = <&intc>;
@@ -984,6 +985,24 @@
#mbox-cells = <1>;
};

+ apps_rsc: rsc@179c0000 {
+ label = "apps_rsc";
+ compatible = "qcom,rpmh-rsc";
+ reg = <0x179c0000 0x10000>,
+ <0x179d0000 0x10000>,
+ <0x179e0000 0x10000>;
+ reg-names = "drv-0", "drv-1", "drv-2";
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ qcom,tcs-offset = <0xd00>;
+ qcom,drv-id = <2>;
+ qcom,tcs-config = <ACTIVE_TCS 2>,
+ <SLEEP_TCS 3>,
+ <WAKE_TCS 3>,
+ <CONTROL_TCS 1>;
+ };
+
intc: interrupt-controller@17a00000 {
compatible = "arm,gic-v3";
#address-cells = <1>;
--
2.18.0.rc1.244.gcf134e6275-goog

2018-06-18 21:52:27

by Doug Anderson

Subject: [PATCH v2 2/2] arm64: dts: sdm845: Add rpmh-clk node

This adds the rpmh-clk node to sdm845 based on the examples in the
bindings.

Signed-off-by: Douglas Anderson <[email protected]>
---
NOTE: to apply this patch cleanly, apply it atop:
arm64: dts: qcom: sdm845: Add I2C, SPI, and UART9 nodes
https://patchwork.kernel.org/patch/10462691/

Changes in v2: None

arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 43a182fb42c9..00722b533a92 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -6,6 +6,7 @@
*/

#include <dt-bindings/clock/qcom,gcc-sdm845.h>
+#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>

@@ -1001,6 +1002,11 @@
<SLEEP_TCS 3>,
<WAKE_TCS 3>,
<CONTROL_TCS 1>;
+
+ rpmhcc: clock-controller {
+ compatible = "qcom,sdm845-rpmh-clk";
+ #clock-cells = <1>;
+ };
};

intc: interrupt-controller@17a00000 {
--
2.18.0.rc1.244.gcf134e6275-goog

2018-06-18 21:59:58

by Lina Iyer

Subject: Re: [PATCH v2 1/2] arm64: dts: sdm845: Add rpmh-rsc node

Thanks for the quick spin Doug.

On Mon, Jun 18 2018 at 15:51 -0600, Douglas Anderson wrote:
>This adds the rpmh-rsc node to sdm845 based on the examples in the
>bindings.
>
>Signed-off-by: Douglas Anderson <[email protected]>
Reviewed-by: Lina Iyer <[email protected]>

>---
>
>Changes in v2:
>- Fixed ordering of tcs-config as per Lina.
>
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
>diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>index cd308b84bed7..43a182fb42c9 100644
>--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>@@ -7,6 +7,7 @@
>
> #include <dt-bindings/clock/qcom,gcc-sdm845.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
>+#include <dt-bindings/soc/qcom,rpmh-rsc.h>
>
> / {
> interrupt-parent = <&intc>;
>@@ -984,6 +985,24 @@
> #mbox-cells = <1>;
> };
>
>+ apps_rsc: rsc@179c0000 {
>+ label = "apps_rsc";
>+ compatible = "qcom,rpmh-rsc";
>+ reg = <0x179c0000 0x10000>,
>+ <0x179d0000 0x10000>,
>+ <0x179e0000 0x10000>;
>+ reg-names = "drv-0", "drv-1", "drv-2";
>+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
>+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
>+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
>+ qcom,tcs-offset = <0xd00>;
>+ qcom,drv-id = <2>;
>+ qcom,tcs-config = <ACTIVE_TCS 2>,
>+ <SLEEP_TCS 3>,
>+ <WAKE_TCS 3>,
>+ <CONTROL_TCS 1>;
>+ };
>+
> intc: interrupt-controller@17a00000 {
> compatible = "arm,gic-v3";
> #address-cells = <1>;
>--
>2.18.0.rc1.244.gcf134e6275-goog
>

2018-06-22 17:05:57

by Bjorn Andersson

Subject: Re: [PATCH v2 1/2] arm64: dts: sdm845: Add rpmh-rsc node

On Mon 18 Jun 14:50 PDT 2018, Douglas Anderson wrote:

> This adds the rpmh-rsc node to sdm845 based on the examples in the
> bindings.
>
> Signed-off-by: Douglas Anderson <[email protected]>

Reviewed-by: Bjorn Andersson <[email protected]>

Regards,
Bjorn

> ---
>
> Changes in v2:
> - Fixed ordering of tcs-config as per Lina.
>
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index cd308b84bed7..43a182fb42c9 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -7,6 +7,7 @@
>
> #include <dt-bindings/clock/qcom,gcc-sdm845.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/soc/qcom,rpmh-rsc.h>
>
> / {
> interrupt-parent = <&intc>;
> @@ -984,6 +985,24 @@
> #mbox-cells = <1>;
> };
>
> + apps_rsc: rsc@179c0000 {
> + label = "apps_rsc";
> + compatible = "qcom,rpmh-rsc";
> + reg = <0x179c0000 0x10000>,
> + <0x179d0000 0x10000>,
> + <0x179e0000 0x10000>;
> + reg-names = "drv-0", "drv-1", "drv-2";
> + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + qcom,tcs-offset = <0xd00>;
> + qcom,drv-id = <2>;
> + qcom,tcs-config = <ACTIVE_TCS 2>,
> + <SLEEP_TCS 3>,
> + <WAKE_TCS 3>,
> + <CONTROL_TCS 1>;
> + };
> +
> intc: interrupt-controller@17a00000 {
> compatible = "arm,gic-v3";
> #address-cells = <1>;
> --
> 2.18.0.rc1.244.gcf134e6275-goog
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

2018-06-22 17:07:01

by Bjorn Andersson

Subject: Re: [PATCH v2 2/2] arm64: dts: sdm845: Add rpmh-clk node

On Mon 18 Jun 14:50 PDT 2018, Douglas Anderson wrote:

> This adds the rpmh-clk node to sdm845 based on the examples in the
> bindings.
>
> Signed-off-by: Douglas Anderson <[email protected]>

Reviewed-by: Bjorn Andersson <[email protected]>

Regards,
Bjorn

> ---
> NOTE: to apply this patch cleanly, apply it atop:
> arm64: dts: qcom: sdm845: Add I2C, SPI, and UART9 nodes
> https://patchwork.kernel.org/patch/10462691/
>
> Changes in v2: None
>
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 43a182fb42c9..00722b533a92 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -6,6 +6,7 @@
> */
>
> #include <dt-bindings/clock/qcom,gcc-sdm845.h>
> +#include <dt-bindings/clock/qcom,rpmh.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>
> @@ -1001,6 +1002,11 @@
> <SLEEP_TCS 3>,
> <WAKE_TCS 3>,
> <CONTROL_TCS 1>;
> +
> + rpmhcc: clock-controller {
> + compatible = "qcom,sdm845-rpmh-clk";
> + #clock-cells = <1>;
> + };
> };
>
> intc: interrupt-controller@17a00000 {
> --
> 2.18.0.rc1.244.gcf134e6275-goog
>