i.MX6SX has a 16KB always-on ocram bank called
ocram_s, and its clock gate in CCM CCGR1 CG14
needs to be enabled before access, add it to
clock tree.
Signed-off-by: Anson Huang <[email protected]>
---
changes since V1:
remove redefinition of IMX6SX_CLK_OCRAM_S to avoid build warning
drivers/clk/imx/clk-imx6sx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
index 10c771b..691db26 100644
--- a/drivers/clk/imx/clk-imx6sx.c
+++ b/drivers/clk/imx/clk-imx6sx.c
@@ -411,6 +411,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clks[IMX6SX_CLK_GPT_BUS] = imx_clk_gate2("gpt_bus", "perclk", base + 0x6c, 20);
clks[IMX6SX_CLK_GPT_SERIAL] = imx_clk_gate2("gpt_serial", "perclk", base + 0x6c, 22);
clks[IMX6SX_CLK_GPU] = imx_clk_gate2("gpu", "gpu_core_podf", base + 0x6c, 26);
+ clks[IMX6SX_CLK_OCRAM_S] = imx_clk_gate2("ocram_s", "ahb", base + 0x6c, 28);
clks[IMX6SX_CLK_CANFD] = imx_clk_gate2("canfd", "can_podf", base + 0x6c, 30);
/* CCGR2 */
--
2.7.4
i.MX6SX has a 16KB always-on ocram bank called
ocram_s, enable it as another mmio sram.
Signed-off-by: Anson Huang <[email protected]>
---
changes since V1:
resort the ocram_s and ocram node by address from low to high.
arch/arm/boot/dts/imx6sx.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 596763c..f4d982c 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -166,6 +166,12 @@
interrupt-parent = <&gpc>;
ranges;
+ ocram_s: sram@8f8000 {
+ compatible = "mmio-sram";
+ reg = <0x008f8000 0x4000>;
+ clocks = <&clks IMX6SX_CLK_OCRAM_S>;
+ };
+
ocram: sram@900000 {
compatible = "mmio-sram";
reg = <0x00900000 0x20000>;
--
2.7.4
On Tue, Jul 10, 2018 at 9:58 PM, Anson Huang <[email protected]> wrote:
> i.MX6SX has a 16KB always-on ocram bank called
> ocram_s, and its clock gate in CCM CCGR1 CG14
> needs to be enabled before access, add it to
> clock tree.
>
> Signed-off-by: Anson Huang <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
On Tue, Jul 10, 2018 at 9:58 PM, Anson Huang <[email protected]> wrote:
> i.MX6SX has a 16KB always-on ocram bank called
> ocram_s, enable it as another mmio sram.
>
> Signed-off-by: Anson Huang <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
On Wed, Jul 11, 2018 at 08:58:59AM +0800, Anson Huang wrote:
> i.MX6SX has a 16KB always-on ocram bank called
> ocram_s, enable it as another mmio sram.
>
> Signed-off-by: Anson Huang <[email protected]>
Since the clock ID has already been defined before, this dts patch can
be applied independently to clock driver one.
Applied, thanks.
Quoting Anson Huang (2018-07-10 17:58:58)
> i.MX6SX has a 16KB always-on ocram bank called
> ocram_s, and its clock gate in CCM CCGR1 CG14
> needs to be enabled before access, add it to
> clock tree.
>
> Signed-off-by: Anson Huang <[email protected]>
> ---
Applied to clk-next