The A64 have a SID controller which consist on EFUSE (starting at 0x200)
and three registers to read/write the efuses.
Signed-off-by: Emmanuel Vadot <[email protected]>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1b2ef28c42bd..69c0d9362553 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -227,6 +227,11 @@
#size-cells = <0>;
};
+ sid: eeprom@1c14000 {
+ compatible = "allwinner,sun50i-a64-sid";
+ reg = <0x1c14000 0x400>;
+ };
+
usb_otg: usb@1c19000 {
compatible = "allwinner,sun8i-a33-musb";
reg = <0x01c19000 0x0400>;
--
2.17.0
Both H3 and H5 and a SID controller at the same address.
They are know to be different, the H5 one is the same as the A64 so add
a node in the common dtsi and we will override the compatible string in
the SoC dts.
Signed-off-by: Emmanuel Vadot <[email protected]>
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index c3bff1105e5d..2b3c629644a0 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -644,6 +644,10 @@
status = "disabled";
};
+ sid: eeprom@1c14000 {
+ reg = <0x1c14000 0x400>;
+ };
+
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
--
2.17.0
The SID controller on H5 look the same as the one present in the A64.
But in case we find some difference one day at a compatible string
of it's own and a fallback to the A64 one.
Signed-off-by: Emmanuel Vadot <[email protected]>
---
.../devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt b/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
index e319fe5e205a..99c4ba6a3f61 100644
--- a/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
+++ b/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
@@ -7,6 +7,7 @@ Required properties:
"allwinner,sun8i-a83t-sid"
"allwinner,sun8i-h3-sid"
"allwinner,sun50i-a64-sid"
+ "allwinner,sun50i-h5-sid"
- reg: Should contain registers location and length
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 62d646baac3c..28183bf77164 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -129,3 +129,8 @@
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
compatible = "allwinner,sun50i-h5-pinctrl";
};
+
+&sid {
+ compatible = "allwinner,sun50i-h5-sid",
+ "allwinner,sun50i-a64-sid";
+};
--
2.17.0
The SID controller on H3 is one of it's kind (at least from what we
know).
Add a compatible string for it in the SoC dtsi.
Signed-off-by: Emmanuel Vadot <[email protected]>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 41d57c76f290..f543aa1dc829 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -185,3 +185,7 @@
&pio {
compatible = "allwinner,sun8i-h3-pinctrl";
};
+
+&sid {
+ compatible = "allwinner,sun8i-h3-sid";
+};
--
2.17.0
On Mon, Jul 23, 2018 at 12:42:55PM +0200, Emmanuel Vadot wrote:
> The SID controller on H5 look the same as the one present in the A64.
> But in case we find some difference one day at a compatible string
> of it's own and a fallback to the A64 one.
>
> Signed-off-by: Emmanuel Vadot <[email protected]>
> ---
> .../devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 +
> arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 5 +++++
> 2 files changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt b/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
> index e319fe5e205a..99c4ba6a3f61 100644
> --- a/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
> +++ b/Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
> @@ -7,6 +7,7 @@ Required properties:
> "allwinner,sun8i-a83t-sid"
> "allwinner,sun8i-h3-sid"
> "allwinner,sun50i-a64-sid"
> + "allwinner,sun50i-h5-sid"
>
> - reg: Should contain registers location and length
Bindings patches should be separate.
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
> index 62d646baac3c..28183bf77164 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
> @@ -129,3 +129,8 @@
> <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> compatible = "allwinner,sun50i-h5-pinctrl";
> };
> +
> +&sid {
> + compatible = "allwinner,sun50i-h5-sid",
> + "allwinner,sun50i-a64-sid";
> +};
I'm not sure doing a split similar to what you're doing here just to
save the reg line is worth it.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com