2018-10-20 21:44:21

by KarimAllah Ahmed

Subject: [PATCH] KVM/nVMX: Do not validate that posted_intr_desc_addr is page aligned

The spec only requires the posted interrupt descriptor address to be
64-bytes aligned (i.e. bits[0:5] == 0). Using page_address_valid also
forces the address to be page aligned.

Only validate that the address does not cross the maximum physical address
without enforcing a page alignment.

Cc: Paolo Bonzini <[email protected]>
Cc: Radim Krčmář <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Ingo Molnar <[email protected]>
Cc: Borislav Petkov <[email protected]>
Cc: H. Peter Anvin <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Fixes: 6de84e581c0 ("nVMX x86: check posted-interrupt descriptor addresss on vmentry of L2")
Signed-off-by: KarimAllah Ahmed <[email protected]>
---
arch/x86/kvm/vmx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 30bf860..47962f2 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -11668,7 +11668,7 @@ static int nested_vmx_check_apicv_controls(struct kvm_vcpu *vcpu,
!nested_exit_intr_ack_set(vcpu) ||
(vmcs12->posted_intr_nv & 0xff00) ||
(vmcs12->posted_intr_desc_addr & 0x3f) ||
- (!page_address_valid(vcpu, vmcs12->posted_intr_desc_addr))))
+ (vmcs12->posted_intr_desc_addr >> cpuid_maxphyaddr(vcpu)))
return -EINVAL;

/* tpr shadow is needed by all apicv features. */
--
2.7.4

2018-10-20 23:02:30

by KarimAllah Ahmed

Subject: [PATCH v2] KVM/nVMX: Do not validate that posted_intr_desc_addr is page aligned

The spec only requires the posted interrupt descriptor address to be
64-bytes aligned (i.e. bits[0:5] == 0). Using page_address_valid also
forces the address to be page aligned.

Only validate that the address does not cross the maximum physical address
without enforcing a page alignment.

v1 -> v2:
- Add a missing parenthesis (dropped while merging!)

Cc: Paolo Bonzini <[email protected]>
Cc: Radim Krčmář <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Ingo Molnar <[email protected]>
Cc: Borislav Petkov <[email protected]>
Cc: H. Peter Anvin <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Fixes: 6de84e581c0 ("nVMX x86: check posted-interrupt descriptor addresss on vmentry of L2")
Signed-off-by: KarimAllah Ahmed <[email protected]>
---
arch/x86/kvm/vmx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 38f1a16..bb0fcdb 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -11667,7 +11667,7 @@ static int nested_vmx_check_apicv_controls(struct kvm_vcpu *vcpu,
!nested_exit_intr_ack_set(vcpu) ||
(vmcs12->posted_intr_nv & 0xff00) ||
(vmcs12->posted_intr_desc_addr & 0x3f) ||
- (!page_address_valid(vcpu, vmcs12->posted_intr_desc_addr))))
+ (vmcs12->posted_intr_desc_addr >> cpuid_maxphyaddr(vcpu))))
return -EINVAL;

/* tpr shadow is needed by all apicv features. */
--
2.7.4

2018-10-22 17:13:44

by Jim Mattson

Subject: Re: [PATCH v2] KVM/nVMX: Do not validate that posted_intr_desc_addr is page aligned

On Sat, Oct 20, 2018 at 3:50 PM, KarimAllah Ahmed <[email protected]> wrote:
> The spec only requires the posted interrupt descriptor address to be
> 64-bytes aligned (i.e. bits[0:5] == 0). Using page_address_valid also
> forces the address to be page aligned.
>
> Only validate that the address does not cross the maximum physical address
> without enforcing a page alignment.
>
> v1 -> v2:
> - Add a missing parenthesis (dropped while merging!)
>
> Cc: Paolo Bonzini <[email protected]>
> Cc: Radim Krčmář <[email protected]>
> Cc: Thomas Gleixner <[email protected]>
> Cc: Ingo Molnar <[email protected]>
> Cc: Borislav Petkov <[email protected]>
> Cc: H. Peter Anvin <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Fixes: 6de84e581c0 ("nVMX x86: check posted-interrupt descriptor addresss on vmentry of L2")
> Signed-off-by: KarimAllah Ahmed <[email protected]>
Reviewed-by: Jim Mattson <[email protected]>

2018-10-22 23:41:17

by Krish Sadhukhan

Subject: Re: [PATCH v2] KVM/nVMX: Do not validate that posted_intr_desc_addr is page aligned

On 10/20/2018 03:50 PM, KarimAllah Ahmed wrote:
> The spec only requires the posted interrupt descriptor address to be
> 64-bytes aligned (i.e. bits[0:5] == 0). Using page_address_valid also
> forces the address to be page aligned.
>
> Only validate that the address does not cross the maximum physical address
> without enforcing a page alignment.
>
> v1 -> v2:
> - Add a missing parenthesis (dropped while merging!)
>
> Cc: Paolo Bonzini <[email protected]>
> Cc: Radim Krčmář <[email protected]>
> Cc: Thomas Gleixner <[email protected]>
> Cc: Ingo Molnar <[email protected]>
> Cc: Borislav Petkov <[email protected]>
> Cc: H. Peter Anvin <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Fixes: 6de84e581c0 ("nVMX x86: check posted-interrupt descriptor addresss on vmentry of L2")
> Signed-off-by: KarimAllah Ahmed <[email protected]>
> ---
> arch/x86/kvm/vmx.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 38f1a16..bb0fcdb 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -11667,7 +11667,7 @@ static int nested_vmx_check_apicv_controls(struct kvm_vcpu *vcpu,
> !nested_exit_intr_ack_set(vcpu) ||
> (vmcs12->posted_intr_nv & 0xff00) ||
> (vmcs12->posted_intr_desc_addr & 0x3f) ||
> - (!page_address_valid(vcpu, vmcs12->posted_intr_desc_addr))))
> + (vmcs12->posted_intr_desc_addr >> cpuid_maxphyaddr(vcpu))))
> return -EINVAL;
>
> /* tpr shadow is needed by all apicv features. */

Reviewed-by: Krish Sadhuhan <[email protected]>

2018-10-24 11:03:58

by Sean Christopherson

Subject: Re: [PATCH] KVM/nVMX: Do not validate that posted_intr_desc_addr is page aligned

On Sat, Oct 20, 2018 at 11:42:59PM +0200, KarimAllah Ahmed wrote:
> The spec only requires the posted interrupt descriptor address to be
> 64-bytes aligned (i.e. bits[0:5] == 0). Using page_address_valid also
> forces the address to be page aligned.
>
> Only validate that the address does not cross the maximum physical address
> without enforcing a page alignment.
>
> Cc: Paolo Bonzini <[email protected]>
> Cc: Radim Krčmář <[email protected]>
> Cc: Thomas Gleixner <[email protected]>
> Cc: Ingo Molnar <[email protected]>
> Cc: Borislav Petkov <[email protected]>
> Cc: H. Peter Anvin <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Fixes: 6de84e581c0 ("nVMX x86: check posted-interrupt descriptor addresss on vmentry of L2")
> Signed-off-by: KarimAllah Ahmed <[email protected]>
> ---
> arch/x86/kvm/vmx.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 30bf860..47962f2 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -11668,7 +11668,7 @@ static int nested_vmx_check_apicv_controls(struct kvm_vcpu *vcpu,
> !nested_exit_intr_ack_set(vcpu) ||
> (vmcs12->posted_intr_nv & 0xff00) ||
> (vmcs12->posted_intr_desc_addr & 0x3f) ||
> - (!page_address_valid(vcpu, vmcs12->posted_intr_desc_addr))))
> + (vmcs12->posted_intr_desc_addr >> cpuid_maxphyaddr(vcpu)))
> return -EINVAL;

Can you update the comment for this code block? It has a stale blurb
about "the descriptor address has been already checked in
nested_get_vmcs12_pages" and it'd be nice to state why bits[5:0] must
be zero (your changelog is much more helpful than the current comment).

With that:

Reviewed-by: Sean Christopherson <[email protected]>

>
> /* tpr shadow is needed by all apicv features. */
> --
> 2.7.4
>

2018-10-24 11:18:04

by Radim Krčmář

Subject: Re: [PATCH] KVM/nVMX: Do not validate that posted_intr_desc_addr is page aligned

2018-10-24 04:01-0700, Sean Christopherson:
> On Sat, Oct 20, 2018 at 11:42:59PM +0200, KarimAllah Ahmed wrote:
> > The spec only requires the posted interrupt descriptor address to be
> > 64-bytes aligned (i.e. bits[0:5] == 0). Using page_address_valid also
> > forces the address to be page aligned.
> >
> > Only validate that the address does not cross the maximum physical address
> > without enforcing a page alignment.
> >
> > Cc: Paolo Bonzini <[email protected]>
> > Cc: Radim Krčmář <[email protected]>
> > Cc: Thomas Gleixner <[email protected]>
> > Cc: Ingo Molnar <[email protected]>
> > Cc: Borislav Petkov <[email protected]>
> > Cc: H. Peter Anvin <[email protected]>
> > Cc: [email protected]
> > Cc: [email protected]
> > Cc: [email protected]
> > Fixes: 6de84e581c0 ("nVMX x86: check posted-interrupt descriptor addresss on vmentry of L2")
> > Signed-off-by: KarimAllah Ahmed <[email protected]>
> > ---
> > arch/x86/kvm/vmx.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> > index 30bf860..47962f2 100644
> > --- a/arch/x86/kvm/vmx.c
> > +++ b/arch/x86/kvm/vmx.c
> > @@ -11668,7 +11668,7 @@ static int nested_vmx_check_apicv_controls(struct kvm_vcpu *vcpu,
> > !nested_exit_intr_ack_set(vcpu) ||
> > (vmcs12->posted_intr_nv & 0xff00) ||
> > (vmcs12->posted_intr_desc_addr & 0x3f) ||
> > - (!page_address_valid(vcpu, vmcs12->posted_intr_desc_addr))))
> > + (vmcs12->posted_intr_desc_addr >> cpuid_maxphyaddr(vcpu)))
> > return -EINVAL;
>
> Can you update the comment for this code block? It has a stale blurb
> about "the descriptor address has been already checked in
> nested_get_vmcs12_pages" and it'd be nice to state why bits[5:0] must
> be zero (your changelog is much more helpful than the current comment).
>
> With that:
>
> Reviewed-by: Sean Christopherson <[email protected]>

I have just sent a pull request with the stale comment. :(