In case the nd_sd group is set to the sd-card function, Pins 45 + 46 are
configured as GPIOs. If they are blocked by the sd function, they can't
be used as GPIOs.
Signed-off-by: Mathias Kresin <[email protected]>
Reported-by: Kristian Evensen <[email protected]>
Fixes: f576fb6a0700 ("MIPS: ralink: cleanup the soc specific pinmux
data")
Cc: [email protected] # v3.18+
---
arch/mips/ralink/mt7620.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
index 41b71c4352c2..c1ce6f43642b 100644
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -84,7 +84,7 @@ static struct rt2880_pmx_func pcie_rst_grp[] = {
};
static struct rt2880_pmx_func nd_sd_grp[] = {
FUNC("nand", MT7620_GPIO_MODE_NAND, 45, 15),
- FUNC("sd", MT7620_GPIO_MODE_SD, 45, 15)
+ FUNC("sd", MT7620_GPIO_MODE_SD, 47, 13)
};
static struct rt2880_pmx_group mt7620a_pinmux_data[] = {
--
2.17.1
Hello,
Mathias Kresin wrote:
> In case the nd_sd group is set to the sd-card function, Pins 45 + 46 are
> configured as GPIOs. If they are blocked by the sd function, they can't
> be used as GPIOs.
>
> Signed-off-by: Mathias Kresin <[email protected]>
> Reported-by: Kristian Evensen <[email protected]>
> Fixes: f576fb6a0700 ("MIPS: ralink: cleanup the soc specific pinmux
> data")
> Cc: [email protected] # v3.18+
Applied to mips-fixes.
Thanks,
Paul
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