Hi everyone,
This series was started as part of enabling Bluetooth on various
Allwinner SBCs. The bluetooth controller requires a precise 32.768 kHz
clock fed to it to correctly detect the frequency of its main oscillator.
This clock signal is provided by the RTC, either directly from a special
pin on the SoC, or some clock output function from the clock controllers.
I found that the clock-related properties of the RTC on later SoCs were
incorrect or missing.
This series reworks the compatible strings and clock parts of the device
tree bindings for sun6i-rtc. Currently we assume most Allwinner SoCs use
the same sun6i-rtc variant, when in fact they do not. The differences
that matter with regards to clocks are a) the A31 does not have an extra
external output for the RTC 32K clock, while most of the others do;
b) the clock frequency of the internal RC oscillator is different on
some SoCs; c) on the H6 the RTC also handles the 24 MHz DCXO, which
feeds the system HOSC. The last difference, and by extension the H6, are
not covered in this series.
Patch 1 cleans up the clock-related section of the RTC device tree
binding. This would make it easier to read and easier to add additional
clocks.
Patch 2 adds compatible strings for all identified variants introduced
prior to the H6.
Patch 3 deprecates the external clock output for the A31. The A31 does
not have this output, so it's introduction and usage was an error.
Patch 4 adds a clock output for the RTC's internal oscillator to the
device tree binding. This feeds the PRCM in some SoCs.
Patch 5 adds a default clock name for the LOSC to the RTC driver.
Patch 6 adds support for different hardware variants to the RTC driver.
Patch 7 adds support for all known pre-H6 variants.
Patch 8 exposes the RTC's internal oscillator through the device tree.
Patch 9 makes the R40's CCU use the LOSC from the RTC module, instead of
its own internal oscillator.
Patch 10 through 15 adds an RTC node or fixes up the RTC device node
address ranges, clock properties, names of existing clocks, and adds
accuracy properties for the external fixed oscillators.
The clock names require fixing because the sunxi clock driver implicitly
depends on the HOSC and LOSC being named "osc24M" and "osc32k". The
"fixes" to the clock hierarchy introduced in this series means the names
must also be shuffled around or the in kernel representation would be
incorrect. This has been the case since the sunxi-ng drivers were
introduced. There are plans to address this, but the code is still in its
early stages.
Please have a look.
Thanks
ChenYu
Chen-Yu Tsai (15):
dt-bindings: rtc: sun6i-rtc: Rewrite clock outputs as a list
dt-bindings: rtc: sun6i-rtc: Add compatible strings for pre-H6
variants
dt-bindings: rtc: sun6i-rtc: Deprecate external clock output for A31
dt-bindings: rtc: sun6i-rtc: Export internal RC oscillator
rtc: sun6i: Add default clock name for LOSC
rtc: sun6i: Add support for different variants
rtc: sun6i: Add support for all known pre-H6 variants
rtc: sun6i: Expose internal oscillator through device tree
clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output
ARM: dts: sun8i: a23/a33: Fix up RTC device node
ARM: dts: sunxi: h3/h5: Add clock accuracy for external oscillators
ARM: dts: sunxi: h3/h5: Fix up RTC device node and clock references
ARM: dts: sun8i: r40: Add clock accuracy for external oscillators
ARM: dts: sun8i: r40: Add RTC device node
arm64: dts: allwinner: a64: Fix up RTC device node and clock
references
.../devicetree/bindings/rtc/sun6i-rtc.txt | 31 ++++-
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 6 +-
arch/arm/boot/dts/sun8i-h3.dtsi | 4 +
arch/arm/boot/dts/sun8i-r40.dtsi | 18 ++-
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 28 ++---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 22 ++--
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 4 +
drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 11 ++
drivers/rtc/rtc-sun6i.c | 117 ++++++++++++++++--
9 files changed, 188 insertions(+), 53 deletions(-)
--
2.20.0.rc1
The bindings have been updated to expose the RTC's internal oscillator,
for some SoCs that have it directly feeding the PRCM block. The changes
include the index 2 for the clock outputs, as well as the clock output
names.
This patch adds the internal oscillator to the list of clocks exposed
through of_clk_add_hw_provider(), and also have the driver optionally
fetch the name of the clock from the device tree if it's available.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
drivers/rtc/rtc-sun6i.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
index 62ed9ce53d8c..273ab7fbbbe3 100644
--- a/drivers/rtc/rtc-sun6i.c
+++ b/drivers/rtc/rtc-sun6i.c
@@ -220,6 +220,7 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
.ops = &sun6i_rtc_osc_ops,
.name = "losc",
};
+ const char *iosc_name = "rtc-int-osc";
const char *clkout_name = "osc32k-out";
const char *parents[2];
@@ -228,7 +229,7 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
return;
rtc->data = data;
- clk_data = kzalloc(struct_size(clk_data, hws, 2), GFP_KERNEL);
+ clk_data = kzalloc(struct_size(clk_data, hws, 3), GFP_KERNEL);
if (!clk_data) {
kfree(rtc);
return;
@@ -253,8 +254,10 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
if (!of_get_property(node, "clocks", NULL))
goto err;
+ of_property_read_string_index(node, "clock-output-names", 2,
+ &iosc_name);
rtc->int_osc = clk_hw_register_fixed_rate_with_accuracy(NULL,
- "rtc-int-osc",
+ iosc_name,
NULL, 0,
rtc->data->rc_osc_rate,
300000000);
@@ -290,9 +293,10 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
return;
}
- clk_data->num = 2;
+ clk_data->num = 3;
clk_data->hws[0] = &rtc->hw;
clk_data->hws[1] = __clk_get_hw(rtc->ext_losc);
+ clk_data->hws[2] = rtc->int_osc;
of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
return;
--
2.20.0.rc1
The R40 datasheet specifies a tolerance range for the external
oscillators used. Add them to the device tree as the clock accuracy.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
arch/arm/boot/dts/sun8i-r40.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 6f4c9ca5a3ee..a8917f8b1c80 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -61,6 +61,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
+ clock-accuracy = <50000>;
clock-output-names = "osc24M";
};
@@ -68,6 +69,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
+ clock-accuracy = <20000>;
clock-output-names = "osc32k";
};
};
--
2.20.0.rc1
The R40 has an RTC hardware block, which has additional registers
that are not related to RTC or clock functions, and is otherwise
compatible with the H3's RTC.
Add a device node for it, and fix up any references to the LOSC.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
arch/arm/boot/dts/sun8i-r40.dtsi | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index a8917f8b1c80..89762dbefe42 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -70,7 +70,7 @@
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-accuracy = <20000>;
- clock-output-names = "osc32k";
+ clock-output-names = "ext-osc32k";
};
};
@@ -315,17 +315,27 @@
ccu: clock@1c20000 {
compatible = "allwinner,sun8i-r40-ccu";
reg = <0x01c20000 0x400>;
- clocks = <&osc24M>, <&osc32k>;
+ clocks = <&osc24M>, <&rtc 0>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
};
+ rtc: rtc@1c20400 {
+ compatible = "allwinner,sun8i-r40-rtc",
+ "allwinner,sun8i-h3-rtc";
+ reg = <0x01c20400 0x400>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clock-output-names = "osc32k", "osc32k-out";
+ clocks = <&osc32k>;
+ #clock-cells = <1>;
+ };
+
pio: pinctrl@1c20800 {
compatible = "allwinner,sun8i-r40-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
--
2.20.0.rc1
There are different variants to the RTC hardware first seen on sun6i
(A31). The differences we care about in this driver are the clock rate
for the internal oscillator, prescalers, and the presence of an external
clock output.
This patch adds support for all the known base compatibles using the
variants data structure previously introduced.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
drivers/rtc/rtc-sun6i.c | 49 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
index d1866d90b9ef..0a635e9cc25f 100644
--- a/drivers/rtc/rtc-sun6i.c
+++ b/drivers/rtc/rtc-sun6i.c
@@ -312,6 +312,50 @@ static void __init sun6i_a31_rtc_clk_init(struct device_node *node)
CLK_OF_DECLARE_DRIVER(sun6i_a31_rtc_clk, "allwinner,sun6i-a31-rtc",
sun6i_a31_rtc_clk_init);
+static const struct sun6i_rtc_clk_data sun8i_a23_rtc_data = {
+ .rc_osc_rate = 667000, /* datasheet says 600 ~ 700 KHz */
+ .has_prescaler = 1,
+ .has_out_clk = 1,
+};
+
+static void __init sun8i_a23_rtc_clk_init(struct device_node *node)
+{
+ sun6i_rtc_clk_init(node, &sun8i_a23_rtc_data);
+}
+CLK_OF_DECLARE_DRIVER(sun8i_a23_rtc_clk, "allwinner,sun8i-a23-rtc",
+ sun8i_a23_rtc_clk_init);
+
+static const struct sun6i_rtc_clk_data sun8i_h3_rtc_data = {
+ .rc_osc_rate = 16000000,
+ .fixed_prescaler = 32,
+ .has_prescaler = 1,
+ .has_out_clk = 1,
+};
+
+static void __init sun8i_h3_rtc_clk_init(struct device_node *node)
+{
+ sun6i_rtc_clk_init(node, &sun8i_h3_rtc_data);
+}
+CLK_OF_DECLARE_DRIVER(sun8i_h3_rtc_clk, "allwinner,sun8i-h3-rtc",
+ sun8i_h3_rtc_clk_init);
+/* As far as we are concerned, clocks for H5 and H6 are the same as H3 */
+CLK_OF_DECLARE_DRIVER(sun50i_h5_rtc_clk, "allwinner,sun50i-h5-rtc",
+ sun8i_h3_rtc_clk_init);
+CLK_OF_DECLARE_DRIVER(sun50i_h6_rtc_clk, "allwinner,sun50i-h6-rtc",
+ sun8i_h3_rtc_clk_init);
+
+static const struct sun6i_rtc_clk_data sun8i_v3_rtc_data = {
+ .rc_osc_rate = 32000,
+ .has_out_clk = 1,
+};
+
+static void __init sun8i_v3_rtc_clk_init(struct device_node *node)
+{
+ sun6i_rtc_clk_init(node, &sun8i_v3_rtc_data);
+}
+CLK_OF_DECLARE_DRIVER(sun8i_v3_rtc_clk, "allwinner,sun8i-v3-rtc",
+ sun8i_v3_rtc_clk_init);
+
static irqreturn_t sun6i_rtc_alarmirq(int irq, void *id)
{
struct sun6i_rtc_dev *chip = (struct sun6i_rtc_dev *) id;
@@ -625,6 +669,11 @@ static int sun6i_rtc_probe(struct platform_device *pdev)
*/
static const struct of_device_id sun6i_rtc_dt_ids[] = {
{ .compatible = "allwinner,sun6i-a31-rtc" },
+ { .compatible = "allwinner,sun8i-a23-rtc" },
+ { .compatible = "allwinner,sun8i-h3-rtc" },
+ { .compatible = "allwinner,sun8i-v3-rtc" },
+ { .compatible = "allwinner,sun50i-h5-rtc" },
+ { .compatible = "allwinner,sun50i-h6-rtc" },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, sun6i_rtc_dt_ids);
--
2.19.1
The RTC's main clock, used internally and exported to the rest of the
SoC, is called "LOSC" (low speed oscillator) through the hardware
documentation.
This patch adds a default name for this clock, in case the device tree
does not provide one. This shouldn't happen, but lets play it safe.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
drivers/rtc/rtc-sun6i.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
index fe07310952df..8edd9e1ec007 100644
--- a/drivers/rtc/rtc-sun6i.c
+++ b/drivers/rtc/rtc-sun6i.c
@@ -191,6 +191,7 @@ static void __init sun6i_rtc_clk_init(struct device_node *node)
struct sun6i_rtc_dev *rtc;
struct clk_init_data init = {
.ops = &sun6i_rtc_osc_ops,
+ .name = "losc",
};
const char *clkout_name = "osc32k-out";
const char *parents[2];
--
2.20.0.rc1
On the R40, in addition to a mux between the RTC's own RC oscillator and
an external 32768 Hz crystal, which are muxed inside the RTC module, the
CCU also has its own RC oscillator, which runs at around 2 MHz, and can
be muxed with the LOSC output from the RTC. This muxed output is called
"SYS 32K" in the module clock diagram, but otherwise referred to as the
LOSC throughout the CCU documentation.
The RC oscillator is not very accurate, even though it has an undocumented
calibration function. We really want a precise clock at 32768 Hz,
instead of something at around 32 KHz. This patch forces the SYS 32K
clock to use the RTC output as its parent, and doesn't bother
registering the internal oscillator nor a clock mux.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c
index 582ebd41d20d..a22d11aa38ba 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-r40.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-r40.c
@@ -1284,6 +1284,9 @@ static struct regmap_config sun8i_r40_ccu_regmap_config = {
.writeable_reg = sun8i_r40_ccu_regmap_accessible_reg,
};
+#define SUN8I_R40_SYS_32K_CLK_REG 0x310
+#define SUN8I_R40_SYS_32K_CLK_KEY (0x16AA << 16)
+
static int sun8i_r40_ccu_probe(struct platform_device *pdev)
{
struct resource *res;
@@ -1312,6 +1315,14 @@ static int sun8i_r40_ccu_probe(struct platform_device *pdev)
val &= ~GENMASK(25, 20);
writel(val, reg + SUN8I_R40_USB_CLK_REG);
+ /*
+ * Force SYS 32k (otherwise known as LOSC throughout the CCU)
+ * clock parent to LOSC output from RTC module instead of the
+ * CCU's internal RC oscillator divided output.
+ */
+ writel(SUN8I_R40_SYS_32K_CLK_KEY | BIT(8),
+ reg + SUN8I_R40_SYS_32K_CLK_REG);
+
regmap = devm_regmap_init_mmio(&pdev->dev, reg,
&sun8i_r40_ccu_regmap_config);
if (IS_ERR(regmap))
--
2.20.0.rc1
The H3 datasheet specifies a tolerance range for the external
oscillators used. Add them to the device tree as the clock accuracy.
The internal oscillator is left unchanged, as it will be removed later.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 0d9e9eac518c..bce3bf1d6ae5 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -86,6 +86,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
+ clock-accuracy = <50000>;
clock-output-names = "osc24M";
};
@@ -93,6 +94,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
+ clock-accuracy = <50000>;
clock-output-names = "osc32k";
};
--
2.20.0.rc1
The RTC module on the A64 was claimed to be the same as on the A31, when
in fact it is not. It is actually compatible to the H3's RTC. The A64's
RTC has some extra crypto-related registers which the H3's does not, but
the exact function of these is not clear.
This patch fixes the compatible string and clock properties to conform
to the updated bindings. The device node for the internal oscillator is
removed, as it is internalized into the RTC device. Clock references to
the IOSC and LOSC are also fixed.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 22 ++++++-------------
1 file changed, 7 insertions(+), 15 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 384c417cb7a2..a729dcc63038 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -139,15 +139,7 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
- clock-output-names = "osc32k";
- };
-
- iosc: internal-osc-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <16000000>;
- clock-accuracy = <300000000>;
- clock-output-names = "iosc";
+ clock-output-names = "ext-osc32k";
};
psci {
@@ -514,7 +506,7 @@
ccu: clock@1c20000 {
compatible = "allwinner,sun50i-a64-ccu";
reg = <0x01c20000 0x400>;
- clocks = <&osc24M>, <&osc32k>;
+ clocks = <&osc24M>, <&rtc 0>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -944,11 +936,12 @@
};
rtc: rtc@1f00000 {
- compatible = "allwinner,sun6i-a31-rtc";
- reg = <0x01f00000 0x54>;
+ compatible = "allwinner,sun50i-a64-rtc",
+ "allwinner,sun8i-h3-rtc";
+ reg = <0x01f00000 0x400>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
- clock-output-names = "rtc-osc32k", "rtc-osc32k-out";
+ clock-output-names = "osc32k", "osc32k-out", "iosc";
clocks = <&osc32k>;
#clock-cells = <1>;
};
@@ -965,8 +958,7 @@
r_ccu: clock@1f01400 {
compatible = "allwinner,sun50i-a64-r-ccu";
reg = <0x01f01400 0x100>;
- clocks = <&osc24M>, <&osc32k>, <&iosc>,
- <&ccu 11>;
+ clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, <&ccu 11>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <1>;
#reset-cells = <1>;
--
2.20.0.rc1
Amongst the Allwinner SoCs that have seen some kind of coverage by the
linux-sunxi community, whether it be mainline Linux or U-boot support,
or just available datasheets, most newer chips use the RTC design first
seen in the A31 (sun6i).
Overall there have been some minor differences. This patch covers the
following:
- average clock rate of the internal RC oscillator
+ presence of fixed and adjustable prescaler for this clock
- availability of an external (to the SoC) clock output
One major difference regarding the H6 is the 24 MHz crystal is now
routed through the RTC, as a digitally compensated oscillator (DCXO).
This is not covered in this patch and will be supported later.
Other differences are either unrelated to RTC or clock functionality,
such as boot or crypto related registers, or the driver simply doesn't
use the feature in question. One example of the latter is the
calibration function for the RC oscillator. We consider this clock to
be very bad and avoid using it.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
drivers/rtc/rtc-sun6i.c | 58 ++++++++++++++++++++++++++++++++++++-----
1 file changed, 51 insertions(+), 7 deletions(-)
diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
index 8edd9e1ec007..d1866d90b9ef 100644
--- a/drivers/rtc/rtc-sun6i.c
+++ b/drivers/rtc/rtc-sun6i.c
@@ -118,9 +118,30 @@
#define SUN6I_YEAR_MAX 2033
#define SUN6I_YEAR_OFF (SUN6I_YEAR_MIN - 1900)
+/*
+ * There are other differences between models, including:
+ *
+ * - number of GPIO pins that can be configured to hold a certain level
+ * - crypto-key related registers (H5, H6)
+ * - boot process related (super standby, secondary processor entry address)
+ * registers (R40, H6)
+ * - SYS power domain controls (R40)
+ * - DCXO controls (H6)
+ * - RC oscillator calibration (H6)
+ *
+ * These functions are not covered by this driver.
+ */
+struct sun6i_rtc_clk_data {
+ unsigned long rc_osc_rate;
+ unsigned int fixed_prescaler : 16;
+ unsigned int has_prescaler : 1;
+ unsigned int has_out_clk : 1;
+};
+
struct sun6i_rtc_dev {
struct rtc_device *rtc;
struct device *dev;
+ const struct sun6i_rtc_clk_data *data;
void __iomem *base;
int irq;
unsigned long alarm;
@@ -139,14 +160,19 @@ static unsigned long sun6i_rtc_osc_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct sun6i_rtc_dev *rtc = container_of(hw, struct sun6i_rtc_dev, hw);
- u32 val;
+ u32 val = 0;
val = readl(rtc->base + SUN6I_LOSC_CTRL);
if (val & SUN6I_LOSC_CTRL_EXT_OSC)
return parent_rate;
- val = readl(rtc->base + SUN6I_LOSC_CLK_PRESCAL);
- val &= GENMASK(4, 0);
+ if (rtc->data->fixed_prescaler)
+ parent_rate /= rtc->data->fixed_prescaler;
+
+ if (rtc->data->has_prescaler) {
+ val = readl(rtc->base + SUN6I_LOSC_CLK_PRESCAL);
+ val &= GENMASK(4, 0);
+ }
return parent_rate / (val + 1);
}
@@ -185,7 +211,8 @@ static const struct clk_ops sun6i_rtc_osc_ops = {
.set_parent = sun6i_rtc_osc_set_parent,
};
-static void __init sun6i_rtc_clk_init(struct device_node *node)
+static void __init sun6i_rtc_clk_init(struct device_node *node,
+ const struct sun6i_rtc_clk_data *data)
{
struct clk_hw_onecell_data *clk_data;
struct sun6i_rtc_dev *rtc;
@@ -200,6 +227,7 @@ static void __init sun6i_rtc_clk_init(struct device_node *node)
if (!rtc)
return;
+ rtc->data = data;
clk_data = kzalloc(struct_size(clk_data, hws, 2), GFP_KERNEL);
if (!clk_data) {
kfree(rtc);
@@ -228,7 +256,7 @@ static void __init sun6i_rtc_clk_init(struct device_node *node)
rtc->int_osc = clk_hw_register_fixed_rate_with_accuracy(NULL,
"rtc-int-osc",
NULL, 0,
- 667000,
+ rtc->data->rc_osc_rate,
300000000);
if (IS_ERR(rtc->int_osc)) {
pr_crit("Couldn't register the internal oscillator\n");
@@ -271,8 +299,18 @@ static void __init sun6i_rtc_clk_init(struct device_node *node)
err:
kfree(clk_data);
}
-CLK_OF_DECLARE_DRIVER(sun6i_rtc_clk, "allwinner,sun6i-a31-rtc",
- sun6i_rtc_clk_init);
+
+static const struct sun6i_rtc_clk_data sun6i_a31_rtc_data = {
+ .rc_osc_rate = 667000, /* datasheet says 600 ~ 700 KHz */
+ .has_prescaler = 1,
+};
+
+static void __init sun6i_a31_rtc_clk_init(struct device_node *node)
+{
+ sun6i_rtc_clk_init(node, &sun6i_a31_rtc_data);
+}
+CLK_OF_DECLARE_DRIVER(sun6i_a31_rtc_clk, "allwinner,sun6i-a31-rtc",
+ sun6i_a31_rtc_clk_init);
static irqreturn_t sun6i_rtc_alarmirq(int irq, void *id)
{
@@ -579,6 +617,12 @@ static int sun6i_rtc_probe(struct platform_device *pdev)
return 0;
}
+/*
+ * As far as RTC functionality goes, all models are the same. The
+ * datasheets claim that different models have different number of
+ * registers available for non-volatile storage, but experiments show
+ * that all SoCs have 16 registers available for this purpose.
+ */
static const struct of_device_id sun6i_rtc_dt_ids[] = {
{ .compatible = "allwinner,sun6i-a31-rtc" },
{ /* sentinel */ },
--
2.20.0.rc1
The RTC module on the H3 was claimed to be the same as on the A31, when
in fact it is not. The A31 does not have an RTC external clock output,
and its internal RC oscillator's average clock rate is not in the same
range. The H5's RTC has some extra crypto-related registers compared to
the H3. Their exact functions are not clear. Also the RTC-VIO regulator
has different settings.
This patch fixes the compatible string and clock properties to conform
to the updated bindings. The device node for the internal oscillator is
removed, as it is internalized into the RTC device. Clock references to
the IOSC and LOSC are also fixed.
Signed-off-by: Chen-Yu Tsai <[email protected]>
squash! ARM: dts: sunxi: h3/h5: Fix up RTC device node and clock references
---
arch/arm/boot/dts/sun8i-h3.dtsi | 4 +++
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++------------
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 4 +++
3 files changed, 18 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 3ecfabb10151..9497d4076e65 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -241,3 +241,7 @@
&pio {
compatible = "allwinner,sun8i-h3-pinctrl";
};
+
+&rtc {
+ compatible = "allwinner,sun8i-h3-rtc";
+};
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index bce3bf1d6ae5..3cc4366c07fd 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -95,15 +95,7 @@
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-accuracy = <50000>;
- clock-output-names = "osc32k";
- };
-
- iosc: internal-osc-clk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <16000000>;
- clock-accuracy = <300000000>;
- clock-output-names = "iosc";
+ clock-output-names = "ext_osc32k";
};
};
@@ -377,7 +369,7 @@
ccu: clock@1c20000 {
/* compatible is in per SoC .dtsi file */
reg = <0x01c20000 0x400>;
- clocks = <&osc24M>, <&osc32k>;
+ clocks = <&osc24M>, <&rtc 0>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -388,7 +380,7 @@
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
@@ -813,17 +805,19 @@
};
rtc: rtc@1f00000 {
- compatible = "allwinner,sun6i-a31-rtc";
- reg = <0x01f00000 0x54>;
+ /* compatible is in per SoC .dtsi file */
+ reg = <0x01f00000 0x400>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ clock-output-names = "osc32k", "osc32k-out", "iosc";
+ clocks = <&osc32k>;
+ #clock-cells = <1>;
};
r_ccu: clock@1f01400 {
compatible = "allwinner,sun8i-h3-r-ccu";
reg = <0x01f01400 0x100>;
- clocks = <&osc24M>, <&osc32k>, <&iosc>,
- <&ccu 9>;
+ clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, <&ccu 9>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -861,7 +855,7 @@
compatible = "allwinner,sun8i-h3-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
+ clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index b41dc1aab67d..fe731b35f761 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -172,3 +172,7 @@
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
compatible = "allwinner,sun50i-h5-pinctrl";
};
+
+&rtc {
+ compatible = "allwinner,sun50i-h5-rtc";
+};
--
2.20.0.rc1
While doing Bluetooth enablement for various boards based on various
Allwinner SoCs, minor differences in the RTC modules were found. These
include a lack of an external clock output (A31), different internal
oscillator frequencies (H3/H5/A64/V3/V3s), different regulator voltage
settings (H5/H6), and the presence of miscellaneous registers unrelated
to the RTC (A64/R40/H5/H6). The datasheet also describes different number
of registers for non-volatile storage, though based on actual experiments
the actual number is the same across the board.
This patch adds a list of all pre-H6 variants, grouped by the internal
oscillator's clock rate, regulator settings, and the presence of the
external clock output. Combinations are introduced for the variants that
have miscellaneous registers.
The RTC block in the H6 also handles the 24 MHz DCXO. This will require
more device tree binding changes and will be done later.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
.../devicetree/bindings/rtc/sun6i-rtc.txt | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
index d3e96459fc66..b1eaa443347d 100644
--- a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
@@ -3,7 +3,21 @@
RTC controller for the Allwinner A31
Required properties:
-- compatible : Should be "allwinner,sun6i-a31-rtc"
+- compatible : Should be one of the following combinations:
+ - "allwinner,sun6i-a31-rtc"
+ - "allwinner,sun8i-a23-rtc"
+ - "allwinner,sun8i-h3-rtc"
+ - "allwinner,sun8i-r40-rtc", "allwinner,sun8i-h3-rtc"
+ - "allwinner,sun8i-v3-rtc"
+ - "allwinner,sun50i-a64-rtc", "allwinner,sun8i-h3-rtc"
+ - "allwinner,sun50i-h5-rtc"
+
+ Where there are two or more compatible strings, this
+ denotes the hardware covered by the most specific one
+ is backward-compatible with the latter ones, and the
+ implementation for the latter ones can be used, albeit
+ with reduced functionality.
+
- reg : physical base address of the controller and length of
memory mapped region.
- interrupts : IRQ lines for the RTC alarm 0 and alarm 1, in that order.
--
2.20.0.rc1
The A31 does not have an external clock output directly from the RTC.
Instead, it has four muxable clock outputs: three (A, B, C) are
controlled from the CCU, and the last (D) is controlled from the PRCM.
Deprecate the usage of the external clock output for the A31 compatible.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
Documentation/devicetree/bindings/rtc/sun6i-rtc.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
index b1eaa443347d..78c4fb472eb7 100644
--- a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
@@ -30,6 +30,8 @@ Required properties for new device trees
The RTC provides the following clocks at the given indices:
- 0: LOSC
- 1: LOSC external output, known as X32KFOUT in the datasheet.
+ This clock is not available on the A31 and is deprecated for old
+ device trees still using the "allwinner,sun6i-a31-rtc" compatible.
Example:
@@ -37,7 +39,7 @@ rtc: rtc@1f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
interrupts = <0 40 4>, <0 41 4>;
- clock-output-names = "osc32k", "osc32k-out";
+ clock-output-names = "osc32k";
clocks = <&ext_osc32k>;
#clock-cells = <1>;
};
--
2.20.0.rc1
There are different variants to the RTC hardware first seen on sun6i
(A31). The differences we care about in this driver are the clock rate
for the internal oscillator, prescalers, and the presence of an external
clock output.
This patch adds support for all the known pre-H6 base compatibles using
the variants data structure previously introduced.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
drivers/rtc/rtc-sun6i.c | 48 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
index d1866d90b9ef..62ed9ce53d8c 100644
--- a/drivers/rtc/rtc-sun6i.c
+++ b/drivers/rtc/rtc-sun6i.c
@@ -312,6 +312,50 @@ static void __init sun6i_a31_rtc_clk_init(struct device_node *node)
CLK_OF_DECLARE_DRIVER(sun6i_a31_rtc_clk, "allwinner,sun6i-a31-rtc",
sun6i_a31_rtc_clk_init);
+static const struct sun6i_rtc_clk_data sun8i_a23_rtc_data = {
+ .rc_osc_rate = 667000, /* datasheet says 600 ~ 700 KHz */
+ .has_prescaler = 1,
+ .has_out_clk = 1,
+};
+
+static void __init sun8i_a23_rtc_clk_init(struct device_node *node)
+{
+ sun6i_rtc_clk_init(node, &sun8i_a23_rtc_data);
+}
+CLK_OF_DECLARE_DRIVER(sun8i_a23_rtc_clk, "allwinner,sun8i-a23-rtc",
+ sun8i_a23_rtc_clk_init);
+
+static const struct sun6i_rtc_clk_data sun8i_h3_rtc_data = {
+ .rc_osc_rate = 16000000,
+ .fixed_prescaler = 32,
+ .has_prescaler = 1,
+ .has_out_clk = 1,
+};
+
+static void __init sun8i_h3_rtc_clk_init(struct device_node *node)
+{
+ sun6i_rtc_clk_init(node, &sun8i_h3_rtc_data);
+}
+CLK_OF_DECLARE_DRIVER(sun8i_h3_rtc_clk, "allwinner,sun8i-h3-rtc",
+ sun8i_h3_rtc_clk_init);
+/* As far as we are concerned, clocks for H5 and H6 are the same as H3 */
+CLK_OF_DECLARE_DRIVER(sun50i_h5_rtc_clk, "allwinner,sun50i-h5-rtc",
+ sun8i_h3_rtc_clk_init);
+CLK_OF_DECLARE_DRIVER(sun50i_h6_rtc_clk, "allwinner,sun50i-h6-rtc",
+ sun8i_h3_rtc_clk_init);
+
+static const struct sun6i_rtc_clk_data sun8i_v3_rtc_data = {
+ .rc_osc_rate = 32000,
+ .has_out_clk = 1,
+};
+
+static void __init sun8i_v3_rtc_clk_init(struct device_node *node)
+{
+ sun6i_rtc_clk_init(node, &sun8i_v3_rtc_data);
+}
+CLK_OF_DECLARE_DRIVER(sun8i_v3_rtc_clk, "allwinner,sun8i-v3-rtc",
+ sun8i_v3_rtc_clk_init);
+
static irqreturn_t sun6i_rtc_alarmirq(int irq, void *id)
{
struct sun6i_rtc_dev *chip = (struct sun6i_rtc_dev *) id;
@@ -625,6 +669,10 @@ static int sun6i_rtc_probe(struct platform_device *pdev)
*/
static const struct of_device_id sun6i_rtc_dt_ids[] = {
{ .compatible = "allwinner,sun6i-a31-rtc" },
+ { .compatible = "allwinner,sun8i-a23-rtc" },
+ { .compatible = "allwinner,sun8i-h3-rtc" },
+ { .compatible = "allwinner,sun8i-v3-rtc" },
+ { .compatible = "allwinner,sun50i-h5-rtc" },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, sun6i_rtc_dt_ids);
--
2.20.0.rc1
The RTC module on the A23 was claimed to be the same as on the A31, when
in fact it is not. The A31 does not have an RTC external clock output,
and its internal RC oscillator's average clock rate is not in the same
range. The A33's RTC is the same as the A23.
This patch fixes the compatible string and clock properties to conform
to the updated bindings. The register range is also fixed.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index c16ffcc4db7d..5616333c0e0e 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -565,11 +565,11 @@
};
rtc: rtc@1f00000 {
- compatible = "allwinner,sun6i-a31-rtc";
- reg = <0x01f00000 0x54>;
+ compatible = "allwinner,sun8i-a23-rtc";
+ reg = <0x01f00000 0x400>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
- clock-output-names = "osc32k";
+ clock-output-names = "osc32k", "osc32k-out";
clocks = <&ext_osc32k>;
#clock-cells = <1>;
};
--
2.20.0.rc1
The clock output section for this binding describes the two outputs in
the descriptions for both the #clock-cells and clock-output-names
properties.
Instead of overlapping information that is hard to read, rewrite the
clock outputs as a list of indices and descriptions. The properies
can reference this list instead. This will also make it easier to
add notes or conditions to the clocks, and also for adding new outputs.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
Documentation/devicetree/bindings/rtc/sun6i-rtc.txt | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
index 12c083c1140a..d3e96459fc66 100644
--- a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
@@ -10,10 +10,12 @@ Required properties:
Required properties for new device trees
- clocks : phandle to the 32kHz external oscillator
-- clock-output-names : names of the LOSC and its external output clocks created
-- #clock-cells : must be equals to 1. The RTC provides two clocks: the
- LOSC and its external output, with index 0 and 1
- respectively.
+- clock-output-names : names of the two clock outputs. See below.
+- #clock-cells : must be equal to 1.
+
+The RTC provides the following clocks at the given indices:
+- 0: LOSC
+- 1: LOSC external output, known as X32KFOUT in the datasheet.
Example:
--
2.20.0.rc1
Experiments showed that on at least the H3/H5/A64 the RTC's internal
oscillator also feeds the CPUS mux in the PRCM.
Export this clock through the device tree, instead of having to use
a dummy fixed-clock device node, for the PRCM to consume. This will
properly describe the relationship between the clocks.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
Documentation/devicetree/bindings/rtc/sun6i-rtc.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
index 78c4fb472eb7..1bd37faadecb 100644
--- a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
@@ -24,7 +24,7 @@ Required properties:
Required properties for new device trees
- clocks : phandle to the 32kHz external oscillator
-- clock-output-names : names of the two clock outputs. See below.
+- clock-output-names : names of the three clock outputs. See below.
- #clock-cells : must be equal to 1.
The RTC provides the following clocks at the given indices:
@@ -32,6 +32,7 @@ The RTC provides the following clocks at the given indices:
- 1: LOSC external output, known as X32KFOUT in the datasheet.
This clock is not available on the A31 and is deprecated for old
device trees still using the "allwinner,sun6i-a31-rtc" compatible.
+- 2: InternalOSC, or internal RC oscillator
Example:
--
2.20.0.rc1
On Wed, Nov 28, 2018 at 5:30 PM Chen-Yu Tsai <[email protected]> wrote:
>
> There are different variants to the RTC hardware first seen on sun6i
> (A31). The differences we care about in this driver are the clock rate
> for the internal oscillator, prescalers, and the presence of an external
> clock output.
>
> This patch adds support for all the known base compatibles using the
> variants data structure previously introduced.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
This one was from a prior WiP version. Please ignore it.
ChenYu
On Wed, Nov 28, 2018 at 05:29:58PM +0800, Chen-Yu Tsai wrote:
> The clock output section for this binding describes the two outputs in
> the descriptions for both the #clock-cells and clock-output-names
> properties.
>
> Instead of overlapping information that is hard to read, rewrite the
> clock outputs as a list of indices and descriptions. The properies
> can reference this list instead. This will also make it easier to
> add notes or conditions to the clocks, and also for adding new outputs.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Nov 28, 2018 at 05:30:00PM +0800, Chen-Yu Tsai wrote:
> The A31 does not have an external clock output directly from the RTC.
> Instead, it has four muxable clock outputs: three (A, B, C) are
> controlled from the CCU, and the last (D) is controlled from the PRCM.
>
> Deprecate the usage of the external clock output for the A31 compatible.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
I guess we should add a warning in the code as well if one tries to
use it.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Nov 28, 2018 at 05:30:02PM +0800, Chen-Yu Tsai wrote:
> The RTC's main clock, used internally and exported to the rest of the
> SoC, is called "LOSC" (low speed oscillator) through the hardware
> documentation.
>
> This patch adds a default name for this clock, in case the device tree
> does not provide one. This shouldn't happen, but lets play it safe.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Nov 28, 2018 at 05:30:03PM +0800, Chen-Yu Tsai wrote:
> Amongst the Allwinner SoCs that have seen some kind of coverage by the
> linux-sunxi community, whether it be mainline Linux or U-boot support,
> or just available datasheets, most newer chips use the RTC design first
> seen in the A31 (sun6i).
>
> Overall there have been some minor differences. This patch covers the
> following:
>
> - average clock rate of the internal RC oscillator
> + presence of fixed and adjustable prescaler for this clock
> - availability of an external (to the SoC) clock output
>
> One major difference regarding the H6 is the 24 MHz crystal is now
> routed through the RTC, as a digitally compensated oscillator (DCXO).
> This is not covered in this patch and will be supported later.
>
> Other differences are either unrelated to RTC or clock functionality,
> such as boot or crypto related registers, or the driver simply doesn't
> use the feature in question. One example of the latter is the
> calibration function for the RC oscillator. We consider this clock to
> be very bad and avoid using it.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Nov 28, 2018 at 05:30:04PM +0800, Chen-Yu Tsai wrote:
> There are different variants to the RTC hardware first seen on sun6i
> (A31). The differences we care about in this driver are the clock rate
> for the internal oscillator, prescalers, and the presence of an external
> clock output.
>
> This patch adds support for all the known pre-H6 base compatibles using
> the variants data structure previously introduced.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Nov 28, 2018 at 05:30:07PM +0800, Chen-Yu Tsai wrote:
> On the R40, in addition to a mux between the RTC's own RC oscillator and
> an external 32768 Hz crystal, which are muxed inside the RTC module, the
> CCU also has its own RC oscillator, which runs at around 2 MHz, and can
> be muxed with the LOSC output from the RTC. This muxed output is called
> "SYS 32K" in the module clock diagram, but otherwise referred to as the
> LOSC throughout the CCU documentation.
>
> The RC oscillator is not very accurate, even though it has an undocumented
> calibration function. We really want a precise clock at 32768 Hz,
> instead of something at around 32 KHz. This patch forces the SYS 32K
> clock to use the RTC output as its parent, and doesn't bother
> registering the internal oscillator nor a clock mux.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Nov 28, 2018 at 05:30:08PM +0800, Chen-Yu Tsai wrote:
> The RTC module on the A23 was claimed to be the same as on the A31, when
> in fact it is not. The A31 does not have an RTC external clock output,
> and its internal RC oscillator's average clock rate is not in the same
> range. The A33's RTC is the same as the A23.
>
> This patch fixes the compatible string and clock properties to conform
> to the updated bindings. The register range is also fixed.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
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On Wed, Nov 28, 2018 at 05:30:09PM +0800, Chen-Yu Tsai wrote:
> The H3 datasheet specifies a tolerance range for the external
> oscillators used. Add them to the device tree as the clock accuracy.
> The internal oscillator is left unchanged, as it will be removed later.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Nov 28, 2018 at 05:30:10PM +0800, Chen-Yu Tsai wrote:
> The RTC module on the H3 was claimed to be the same as on the A31, when
> in fact it is not. The A31 does not have an RTC external clock output,
> and its internal RC oscillator's average clock rate is not in the same
> range. The H5's RTC has some extra crypto-related registers compared to
> the H3. Their exact functions are not clear. Also the RTC-VIO regulator
> has different settings.
>
> This patch fixes the compatible string and clock properties to conform
> to the updated bindings. The device node for the internal oscillator is
> removed, as it is internalized into the RTC device. Clock references to
> the IOSC and LOSC are also fixed.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
> squash! ARM: dts: sunxi: h3/h5: Fix up RTC device node and clock references
But you might want to remove that :)
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
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On Wed, Nov 28, 2018 at 05:30:12PM +0800, Chen-Yu Tsai wrote:
> The R40 has an RTC hardware block, which has additional registers
> that are not related to RTC or clock functions, and is otherwise
> compatible with the H3's RTC.
>
> Add a device node for it, and fix up any references to the LOSC.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Nov 28, 2018 at 05:30:11PM +0800, Chen-Yu Tsai wrote:
> The R40 datasheet specifies a tolerance range for the external
> oscillators used. Add them to the device tree as the clock accuracy.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Nov 28, 2018 at 05:30:13PM +0800, Chen-Yu Tsai wrote:
> The RTC module on the A64 was claimed to be the same as on the A31, when
> in fact it is not. It is actually compatible to the H3's RTC. The A64's
> RTC has some extra crypto-related registers which the H3's does not, but
> the exact function of these is not clear.
>
> This patch fixes the compatible string and clock properties to conform
> to the updated bindings. The device node for the internal oscillator is
> removed, as it is internalized into the RTC device. Clock references to
> the IOSC and LOSC are also fixed.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
65;5402;1c
On Wed, Nov 28, 2018 at 05:30:06PM +0800, Chen-Yu Tsai wrote:
> The bindings have been updated to expose the RTC's internal oscillator,
> for some SoCs that have it directly feeding the PRCM block. The changes
> include the index 2 for the clock outputs, as well as the clock output
> names.
>
> This patch adds the internal oscillator to the list of clocks exposed
> through of_clk_add_hw_provider(), and also have the driver optionally
> fetch the name of the clock from the device tree if it's available.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
> ---
> drivers/rtc/rtc-sun6i.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
> index 62ed9ce53d8c..273ab7fbbbe3 100644
> --- a/drivers/rtc/rtc-sun6i.c
> +++ b/drivers/rtc/rtc-sun6i.c
> @@ -220,6 +220,7 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
> .ops = &sun6i_rtc_osc_ops,
> .name = "losc",
> };
> + const char *iosc_name = "rtc-int-osc";
> const char *clkout_name = "osc32k-out";
> const char *parents[2];
>
> @@ -228,7 +229,7 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
> return;
>
> rtc->data = data;
> - clk_data = kzalloc(struct_size(clk_data, hws, 2), GFP_KERNEL);
> + clk_data = kzalloc(struct_size(clk_data, hws, 3), GFP_KERNEL);
> if (!clk_data) {
> kfree(rtc);
> return;
> @@ -253,8 +254,10 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
> if (!of_get_property(node, "clocks", NULL))
> goto err;
>
> + of_property_read_string_index(node, "clock-output-names", 2,
> + &iosc_name);
> rtc->int_osc = clk_hw_register_fixed_rate_with_accuracy(NULL,
> - "rtc-int-osc",
> + iosc_name,
> NULL, 0,
> rtc->data->rc_osc_rate,
> 300000000);
> @@ -290,9 +293,10 @@ static void __init sun6i_rtc_clk_init(struct device_node *node,
> return;
> }
>
> - clk_data->num = 2;
> + clk_data->num = 3;
> clk_data->hws[0] = &rtc->hw;
> clk_data->hws[1] = __clk_get_hw(rtc->ext_losc);
> + clk_data->hws[2] = rtc->int_osc;
Shouldn't we add a check on either the compatible on the number of
clock-output-names?
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Nov 28, 2018 at 05:30:01PM +0800, Chen-Yu Tsai wrote:
> Experiments showed that on at least the H3/H5/A64 the RTC's internal
> oscillator also feeds the CPUS mux in the PRCM.
>
> Export this clock through the device tree, instead of having to use
> a dummy fixed-clock device node, for the PRCM to consume. This will
> properly describe the relationship between the clocks.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
> ---
> Documentation/devicetree/bindings/rtc/sun6i-rtc.txt | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
> index 78c4fb472eb7..1bd37faadecb 100644
> --- a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
> +++ b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
> @@ -24,7 +24,7 @@ Required properties:
>
> Required properties for new device trees
> - clocks : phandle to the 32kHz external oscillator
> -- clock-output-names : names of the two clock outputs. See below.
> +- clock-output-names : names of the three clock outputs. See below.
> - #clock-cells : must be equal to 1.
>
> The RTC provides the following clocks at the given indices:
> @@ -32,6 +32,7 @@ The RTC provides the following clocks at the given indices:
> - 1: LOSC external output, known as X32KFOUT in the datasheet.
> This clock is not available on the A31 and is deprecated for old
> device trees still using the "allwinner,sun6i-a31-rtc" compatible.
> +- 2: InternalOSC, or internal RC oscillator
It seems to be required only for a few RTC though (H3, H5 and R40?)
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Nov 28, 2018 at 05:29:59PM +0800, Chen-Yu Tsai wrote:
> While doing Bluetooth enablement for various boards based on various
> Allwinner SoCs, minor differences in the RTC modules were found. These
> include a lack of an external clock output (A31), different internal
> oscillator frequencies (H3/H5/A64/V3/V3s), different regulator voltage
> settings (H5/H6), and the presence of miscellaneous registers unrelated
> to the RTC (A64/R40/H5/H6). The datasheet also describes different number
> of registers for non-volatile storage, though based on actual experiments
> the actual number is the same across the board.
>
> This patch adds a list of all pre-H6 variants, grouped by the internal
> oscillator's clock rate, regulator settings, and the presence of the
> external clock output. Combinations are introduced for the variants that
> have miscellaneous registers.
>
> The RTC block in the H6 also handles the 24 MHz DCXO. This will require
> more device tree binding changes and will be done later.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Wed, Nov 28, 2018 at 6:20 PM Maxime Ripard <[email protected]> wrote:
>
> On Wed, Nov 28, 2018 at 05:30:00PM +0800, Chen-Yu Tsai wrote:
> > The A31 does not have an external clock output directly from the RTC.
> > Instead, it has four muxable clock outputs: three (A, B, C) are
> > controlled from the CCU, and the last (D) is controlled from the PRCM.
> >
> > Deprecate the usage of the external clock output for the A31 compatible.
> >
> > Signed-off-by: Chen-Yu Tsai <[email protected]>
>
> Acked-by: Maxime Ripard <[email protected]>
>
> I guess we should add a warning in the code as well if one tries to
> use it.
That's on the TODO list. :)
On Wed, Nov 28, 2018 at 6:33 PM Maxime Ripard <[email protected]> wrote:
>
> On Wed, Nov 28, 2018 at 05:30:01PM +0800, Chen-Yu Tsai wrote:
> > Experiments showed that on at least the H3/H5/A64 the RTC's internal
> > oscillator also feeds the CPUS mux in the PRCM.
> >
> > Export this clock through the device tree, instead of having to use
> > a dummy fixed-clock device node, for the PRCM to consume. This will
> > properly describe the relationship between the clocks.
> >
> > Signed-off-by: Chen-Yu Tsai <[email protected]>
> > ---
> > Documentation/devicetree/bindings/rtc/sun6i-rtc.txt | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
> > index 78c4fb472eb7..1bd37faadecb 100644
> > --- a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
> > +++ b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
> > @@ -24,7 +24,7 @@ Required properties:
> >
> > Required properties for new device trees
> > - clocks : phandle to the 32kHz external oscillator
> > -- clock-output-names : names of the two clock outputs. See below.
> > +- clock-output-names : names of the three clock outputs. See below.
> > - #clock-cells : must be equal to 1.
> >
> > The RTC provides the following clocks at the given indices:
> > @@ -32,6 +32,7 @@ The RTC provides the following clocks at the given indices:
> > - 1: LOSC external output, known as X32KFOUT in the datasheet.
> > This clock is not available on the A31 and is deprecated for old
> > device trees still using the "allwinner,sun6i-a31-rtc" compatible.
> > +- 2: InternalOSC, or internal RC oscillator
>
> It seems to be required only for a few RTC though (H3, H5 and R40?)
IMO there's no harm in exporting it for all SoCs. I still don't know
if it's needed for the A31 either. And we don't have documents for the
PRCM stuff for any of the SoCs involved.
ChenYu
On Wed, Nov 28, 2018 at 05:29:57PM +0800, Chen-Yu Tsai wrote:
> Hi everyone,
>
> This series was started as part of enabling Bluetooth on various
> Allwinner SBCs. The bluetooth controller requires a precise 32.768 kHz
> clock fed to it to correctly detect the frequency of its main oscillator.
> This clock signal is provided by the RTC, either directly from a special
> pin on the SoC, or some clock output function from the clock controllers.
> I found that the clock-related properties of the RTC on later SoCs were
> incorrect or missing.
>
> This series reworks the compatible strings and clock parts of the device
> tree bindings for sun6i-rtc. Currently we assume most Allwinner SoCs use
> the same sun6i-rtc variant, when in fact they do not. The differences
> that matter with regards to clocks are a) the A31 does not have an extra
> external output for the RTC 32K clock, while most of the others do;
> b) the clock frequency of the internal RC oscillator is different on
> some SoCs; c) on the H6 the RTC also handles the 24 MHz DCXO, which
> feeds the system HOSC. The last difference, and by extension the H6, are
> not covered in this series.
>
> Patch 1 cleans up the clock-related section of the RTC device tree
> binding. This would make it easier to read and easier to add additional
> clocks.
>
> Patch 2 adds compatible strings for all identified variants introduced
> prior to the H6.
>
> Patch 3 deprecates the external clock output for the A31. The A31 does
> not have this output, so it's introduction and usage was an error.
>
> Patch 4 adds a clock output for the RTC's internal oscillator to the
> device tree binding. This feeds the PRCM in some SoCs.
>
> Patch 5 adds a default clock name for the LOSC to the RTC driver.
>
> Patch 6 adds support for different hardware variants to the RTC driver.
>
> Patch 7 adds support for all known pre-H6 variants.
>
> Patch 8 exposes the RTC's internal oscillator through the device tree.
>
> Patch 9 makes the R40's CCU use the LOSC from the RTC module, instead of
> its own internal oscillator.
>
> Patch 10 through 15 adds an RTC node or fixes up the RTC device node
> address ranges, clock properties, names of existing clocks, and adds
> accuracy properties for the external fixed oscillators.
>
> The clock names require fixing because the sunxi clock driver implicitly
> depends on the HOSC and LOSC being named "osc24M" and "osc32k". The
> "fixes" to the clock hierarchy introduced in this series means the names
> must also be shuffled around or the in kernel representation would be
> incorrect. This has been the case since the sunxi-ng drivers were
> introduced. There are plans to address this, but the code is still in its
> early stages.
>
> Please have a look.
>
> Thanks
> ChenYu
>
> Chen-Yu Tsai (15):
> dt-bindings: rtc: sun6i-rtc: Rewrite clock outputs as a list
> dt-bindings: rtc: sun6i-rtc: Add compatible strings for pre-H6
> variants
> dt-bindings: rtc: sun6i-rtc: Deprecate external clock output for A31
> dt-bindings: rtc: sun6i-rtc: Export internal RC oscillator
> rtc: sun6i: Add default clock name for LOSC
> rtc: sun6i: Add support for different variants
> rtc: sun6i: Add support for all known pre-H6 variants
> rtc: sun6i: Expose internal oscillator through device tree
> clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output
> ARM: dts: sun8i: a23/a33: Fix up RTC device node
> ARM: dts: sunxi: h3/h5: Add clock accuracy for external oscillators
> ARM: dts: sunxi: h3/h5: Fix up RTC device node and clock references
> ARM: dts: sun8i: r40: Add clock accuracy for external oscillators
> ARM: dts: sun8i: r40: Add RTC device node
> arm64: dts: allwinner: a64: Fix up RTC device node and clock
> references
>
> .../devicetree/bindings/rtc/sun6i-rtc.txt | 31 ++++-
> arch/arm/boot/dts/sun8i-a23-a33.dtsi | 6 +-
> arch/arm/boot/dts/sun8i-h3.dtsi | 4 +
> arch/arm/boot/dts/sun8i-r40.dtsi | 18 ++-
> arch/arm/boot/dts/sunxi-h3-h5.dtsi | 28 ++---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 22 ++--
> arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 4 +
> drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 11 ++
> drivers/rtc/rtc-sun6i.c | 117 ++++++++++++++++--
> 9 files changed, 188 insertions(+), 53 deletions(-)
>
> --
Hello
Tested-by: Corentin Labbe <[email protected]>
Tested-on: sun8i-r40-bananapi-m2-ultra
Tested-on: sun50i-h5-nanopi-neo-plus2
Regards
Quoting Chen-Yu Tsai (2018-11-28 01:30:07)
> On the R40, in addition to a mux between the RTC's own RC oscillator and
> an external 32768 Hz crystal, which are muxed inside the RTC module, the
> CCU also has its own RC oscillator, which runs at around 2 MHz, and can
> be muxed with the LOSC output from the RTC. This muxed output is called
> "SYS 32K" in the module clock diagram, but otherwise referred to as the
> LOSC throughout the CCU documentation.
>
> The RC oscillator is not very accurate, even though it has an undocumented
> calibration function. We really want a precise clock at 32768 Hz,
> instead of something at around 32 KHz. This patch forces the SYS 32K
> clock to use the RTC output as its parent, and doesn't bother
> registering the internal oscillator nor a clock mux.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
> ---
Acked-by: Stephen Boyd <[email protected]>
On Thu, Nov 29, 2018 at 5:29 AM Stephen Boyd <[email protected]> wrote:
>
> Quoting Chen-Yu Tsai (2018-11-28 01:30:07)
> > On the R40, in addition to a mux between the RTC's own RC oscillator and
> > an external 32768 Hz crystal, which are muxed inside the RTC module, the
> > CCU also has its own RC oscillator, which runs at around 2 MHz, and can
> > be muxed with the LOSC output from the RTC. This muxed output is called
> > "SYS 32K" in the module clock diagram, but otherwise referred to as the
> > LOSC throughout the CCU documentation.
> >
> > The RC oscillator is not very accurate, even though it has an undocumented
> > calibration function. We really want a precise clock at 32768 Hz,
> > instead of something at around 32 KHz. This patch forces the SYS 32K
> > clock to use the RTC output as its parent, and doesn't bother
> > registering the internal oscillator nor a clock mux.
> >
> > Signed-off-by: Chen-Yu Tsai <[email protected]>
> > ---
>
> Acked-by: Stephen Boyd <[email protected]>
Merged with acks from Maxime and Stephen.
On Wed, Nov 28, 2018 at 07:18:26PM +0800, Chen-Yu Tsai wrote:
> On Wed, Nov 28, 2018 at 6:33 PM Maxime Ripard <[email protected]> wrote:
> >
> > On Wed, Nov 28, 2018 at 05:30:01PM +0800, Chen-Yu Tsai wrote:
> > > Experiments showed that on at least the H3/H5/A64 the RTC's internal
> > > oscillator also feeds the CPUS mux in the PRCM.
> > >
> > > Export this clock through the device tree, instead of having to use
> > > a dummy fixed-clock device node, for the PRCM to consume. This will
> > > properly describe the relationship between the clocks.
> > >
> > > Signed-off-by: Chen-Yu Tsai <[email protected]>
> > > ---
> > > Documentation/devicetree/bindings/rtc/sun6i-rtc.txt | 3 ++-
> > > 1 file changed, 2 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
> > > index 78c4fb472eb7..1bd37faadecb 100644
> > > --- a/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
> > > +++ b/Documentation/devicetree/bindings/rtc/sun6i-rtc.txt
> > > @@ -24,7 +24,7 @@ Required properties:
> > >
> > > Required properties for new device trees
> > > - clocks : phandle to the 32kHz external oscillator
> > > -- clock-output-names : names of the two clock outputs. See below.
> > > +- clock-output-names : names of the three clock outputs. See below.
> > > - #clock-cells : must be equal to 1.
> > >
> > > The RTC provides the following clocks at the given indices:
> > > @@ -32,6 +32,7 @@ The RTC provides the following clocks at the given indices:
> > > - 1: LOSC external output, known as X32KFOUT in the datasheet.
> > > This clock is not available on the A31 and is deprecated for old
> > > device trees still using the "allwinner,sun6i-a31-rtc" compatible.
> > > +- 2: InternalOSC, or internal RC oscillator
> >
> > It seems to be required only for a few RTC though (H3, H5 and R40?)
>
> IMO there's no harm in exporting it for all SoCs. I still don't know
> if it's needed for the A31 either. And we don't have documents for the
> PRCM stuff for any of the SoCs involved.
I'm still a bit worried about this, since that means that we can't
ever remove it from the DT interface, even though we find out it might
cause some issues in the future.
If we don't really have a need for it right now, I'd prefer not to
expose it.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com