Hi All
This patchset enables Bluetooth support on TM2/TM2e boards using mainline
HCI_BCM driver. It requires a few fixes to Samsung serial driver and
adding a proper node to device tree description of the mentioned boards.
Patches can be applied independently to each subsystem.
Best regards
Marek Szyprowski
Samsung R&D Institute Poland
(resend reason: added respective maintainers and lists to cc)
Patch summary:
Beomho Seo (2):
mfd: exynos-lpass: Enable UART module support
tty: serial: samsung: Properly set flags in autoCTS mode
Marek Szyprowski (1):
arm64: dts: exynos: Add Bluetooth chip to TM2(e) boards
Seung-Woo Kim (1):
tty: serial: samsung: Increase maximum baudrate
.../boot/dts/exynos/exynos5433-tm2-common.dtsi | 14 ++++++++++++++
drivers/mfd/exynos-lpass.c | 4 +++-
drivers/tty/serial/samsung.c | 5 ++++-
3 files changed, 21 insertions(+), 2 deletions(-)
--
2.17.1
From: Beomho Seo <[email protected]>
This patch enables support for UART module in Exynos Audio SubSystem.
There are boards (for example TM2), which use it for communication with
bluetooth chip.
Signed-off-by: Beomho Seo <[email protected]>
[mszyprow: rephrased commit message, added UART reset]
Signed-off-by: Marek Szyprowski <[email protected]>
Reviewed-by: Sylwester Nawrocki <[email protected]>
---
drivers/mfd/exynos-lpass.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/exynos-lpass.c b/drivers/mfd/exynos-lpass.c
index ca829f85672f..2713de989f05 100644
--- a/drivers/mfd/exynos-lpass.c
+++ b/drivers/mfd/exynos-lpass.c
@@ -82,11 +82,13 @@ static void exynos_lpass_enable(struct exynos_lpass *lpass)
LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK,
- LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
+ LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S |
+ LPASS_INTR_UART);
exynos_lpass_core_sw_reset(lpass, LPASS_I2S_SW_RESET);
exynos_lpass_core_sw_reset(lpass, LPASS_DMA_SW_RESET);
exynos_lpass_core_sw_reset(lpass, LPASS_MEM_SW_RESET);
+ exynos_lpass_core_sw_reset(lpass, LPASS_UART_SW_RESET);
}
static void exynos_lpass_disable(struct exynos_lpass *lpass)
--
2.17.1
TM2(e) boards have a Broadcom Bluetooth chip connected to 3rd UART port.
Add a device tree node describing it and its resources (control GPIO lines
and clock).
Signed-off-by: Marek Szyprowski <[email protected]>
---
.../boot/dts/exynos/exynos5433-tm2-common.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
index f3ed4c078ba5..d88e2f0e179a 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
@@ -1202,6 +1202,20 @@
status = "okay";
};
+&serial_3 {
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <3000000>;
+ shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>;
+ device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>;
+ clocks = <&s2mps13_osc S2MPS11_CLK_BT>;
+ clock-names = "extclk";
+ };
+};
+
&spi_1 {
cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
status = "okay";
--
2.17.1
From: Beomho Seo <[email protected]>
Commit 391f93f2ec9f ("serial: core: Rework hw-assited flow control support")
has changed the way the autoCTS mode is handled.
According to that change, serial drivers which enable H/W autoCTS mode must
set UPSTAT_AUTOCTS to prevent the serial core from inadvertently disabling
TX. This patch adds proper handling of UPSTAT_AUTOCTS flag.
Signed-off-by: Beomho Seo <[email protected]>
[mszyprow: rephrased commit message]
Signed-off-by: Marek Szyprowski <[email protected]>
---
drivers/tty/serial/samsung.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index da1bd4bba8a9..2a49b6d876b8 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1365,11 +1365,14 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
wr_regl(port, S3C2410_ULCON, ulcon);
wr_regl(port, S3C2410_UBRDIV, quot);
+ port->status &= ~UPSTAT_AUTOCTS;
+
umcon = rd_regl(port, S3C2410_UMCON);
if (termios->c_cflag & CRTSCTS) {
umcon |= S3C2410_UMCOM_AFC;
/* Disable RTS when RX FIFO contains 63 bytes */
umcon &= ~S3C2412_UMCON_AFC_8;
+ port->status = UPSTAT_AUTOCTS;
} else {
umcon &= ~S3C2410_UMCOM_AFC;
}
--
2.17.1
From: Seung-Woo Kim <[email protected]>
This driver can be used to communicate with Bluetooth chip in high-speed
UART mode, so increase the maximum baudrate to 3Mbps.
Signed-off-by: Seung-Woo Kim <[email protected]>
[mszyprow: rephrased commit message]
Signed-off-by: Marek Szyprowski <[email protected]>
---
drivers/tty/serial/samsung.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 2a49b6d876b8..9fc3559f80d9 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1287,7 +1287,7 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
* Ask the core to calculate the divisor for us.
*/
- baud = uart_get_baud_rate(port, termios, old, 0, 115200*8);
+ baud = uart_get_baud_rate(port, termios, old, 0, 3000000);
quot = s3c24xx_serial_getclk(ourport, baud, &clk, &clk_sel);
if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST)
quot = port->custom_divisor;
--
2.17.1
On Fri, Dec 14, 2018 at 12:34:10PM +0100, Marek Szyprowski wrote:
> TM2(e) boards have a Broadcom Bluetooth chip connected to 3rd UART port.
> Add a device tree node describing it and its resources (control GPIO lines
> and clock).
>
> Signed-off-by: Marek Szyprowski <[email protected]>
> ---
> .../boot/dts/exynos/exynos5433-tm2-common.dtsi | 14 ++++++++++++++
Thanks, applied.
Best regards,
Krzysztof
On Fri, 14 Dec 2018, Marek Szyprowski wrote:
> From: Seung-Woo Kim <[email protected]>
>
> This driver can be used to communicate with Bluetooth chip in high-speed
> UART mode, so increase the maximum baudrate to 3Mbps.
>
> Signed-off-by: Seung-Woo Kim <[email protected]>
> [mszyprow: rephrased commit message]
> Signed-off-by: Marek Szyprowski <[email protected]>
> ---
> drivers/tty/serial/samsung.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
> index 2a49b6d876b8..9fc3559f80d9 100644
> --- a/drivers/tty/serial/samsung.c
> +++ b/drivers/tty/serial/samsung.c
> @@ -1287,7 +1287,7 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
> * Ask the core to calculate the divisor for us.
> */
>
> - baud = uart_get_baud_rate(port, termios, old, 0, 115200*8);
> + baud = uart_get_baud_rate(port, termios, old, 0, 3000000);
Does that mean the low speed devices will stop working? It looks like
this should be dynamically configurable based on what device is
connected to it, no?
> quot = s3c24xx_serial_getclk(ourport, baud, &clk, &clk_sel);
> if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST)
> quot = port->custom_divisor;
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
On Fri, 21 Dec 2018, Marek Szyprowski wrote:
> On 2018-12-21 11:15, Lee Jones wrote:
> > On Fri, 14 Dec 2018, Marek Szyprowski wrote:
> >> From: Seung-Woo Kim <[email protected]>
> >>
> >> This driver can be used to communicate with Bluetooth chip in high-speed
> >> UART mode, so increase the maximum baudrate to 3Mbps.
> >>
> >> Signed-off-by: Seung-Woo Kim <[email protected]>
> >> [mszyprow: rephrased commit message]
> >> Signed-off-by: Marek Szyprowski <[email protected]>
> >> ---
> >> drivers/tty/serial/samsung.c | 2 +-
> >> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
> >> index 2a49b6d876b8..9fc3559f80d9 100644
> >> --- a/drivers/tty/serial/samsung.c
> >> +++ b/drivers/tty/serial/samsung.c
> >> @@ -1287,7 +1287,7 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
> >> * Ask the core to calculate the divisor for us.
> >> */
> >>
> >> - baud = uart_get_baud_rate(port, termios, old, 0, 115200*8);
> >> + baud = uart_get_baud_rate(port, termios, old, 0, 3000000);
> > Does that mean the low speed devices will stop working? It looks like
> > this should be dynamically configurable based on what device is
> > connected to it, no?
>
> The changed parameter is maximum supported rate, so this change doesn't
> affect any low speed device.
Understood. Thanks for the explanation.
> >> quot = s3c24xx_serial_getclk(ourport, baud, &clk, &clk_sel);
> >> if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST)
> >> quot = port->custom_divisor;
>
> Best regards
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
On Fri, 14 Dec 2018, Marek Szyprowski wrote:
> From: Beomho Seo <[email protected]>
>
> This patch enables support for UART module in Exynos Audio SubSystem.
> There are boards (for example TM2), which use it for communication with
> bluetooth chip.
Does it though? Or does it enable the interrupt and reset something?
These calls would probably benefit from some documentation by way of
comments.
> Signed-off-by: Beomho Seo <[email protected]>
> [mszyprow: rephrased commit message, added UART reset]
> Signed-off-by: Marek Szyprowski <[email protected]>
> Reviewed-by: Sylwester Nawrocki <[email protected]>
> ---
> drivers/mfd/exynos-lpass.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mfd/exynos-lpass.c b/drivers/mfd/exynos-lpass.c
> index ca829f85672f..2713de989f05 100644
> --- a/drivers/mfd/exynos-lpass.c
> +++ b/drivers/mfd/exynos-lpass.c
> @@ -82,11 +82,13 @@ static void exynos_lpass_enable(struct exynos_lpass *lpass)
> LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
>
> regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK,
> - LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
> + LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S |
> + LPASS_INTR_UART);
>
> exynos_lpass_core_sw_reset(lpass, LPASS_I2S_SW_RESET);
> exynos_lpass_core_sw_reset(lpass, LPASS_DMA_SW_RESET);
> exynos_lpass_core_sw_reset(lpass, LPASS_MEM_SW_RESET);
> + exynos_lpass_core_sw_reset(lpass, LPASS_UART_SW_RESET);
> }
>
> static void exynos_lpass_disable(struct exynos_lpass *lpass)
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
Hi
On 2018-12-21 11:15, Lee Jones wrote:
> On Fri, 14 Dec 2018, Marek Szyprowski wrote:
>> From: Seung-Woo Kim <[email protected]>
>>
>> This driver can be used to communicate with Bluetooth chip in high-speed
>> UART mode, so increase the maximum baudrate to 3Mbps.
>>
>> Signed-off-by: Seung-Woo Kim <[email protected]>
>> [mszyprow: rephrased commit message]
>> Signed-off-by: Marek Szyprowski <[email protected]>
>> ---
>> drivers/tty/serial/samsung.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
>> index 2a49b6d876b8..9fc3559f80d9 100644
>> --- a/drivers/tty/serial/samsung.c
>> +++ b/drivers/tty/serial/samsung.c
>> @@ -1287,7 +1287,7 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
>> * Ask the core to calculate the divisor for us.
>> */
>>
>> - baud = uart_get_baud_rate(port, termios, old, 0, 115200*8);
>> + baud = uart_get_baud_rate(port, termios, old, 0, 3000000);
> Does that mean the low speed devices will stop working? It looks like
> this should be dynamically configurable based on what device is
> connected to it, no?
The changed parameter is maximum supported rate, so this change doesn't
affect any low speed device.
>> quot = s3c24xx_serial_getclk(ourport, baud, &clk, &clk_sel);
>> if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST)
>> quot = port->custom_divisor;
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
Hi
On 2018-12-21 11:13, Lee Jones wrote:
> On Fri, 14 Dec 2018, Marek Szyprowski wrote:
>
>> From: Beomho Seo <[email protected]>
>>
>> This patch enables support for UART module in Exynos Audio SubSystem.
>> There are boards (for example TM2), which use it for communication with
>> bluetooth chip.
> Does it though? Or does it enable the interrupt and reset something?
> These calls would probably benefit from some documentation by way of
> comments.
It only enables routing interrupts out of LPASS HW module. This is
completely transparent for the rest of the system (UART and CPU/GIC).
UART driver will get them via standard ARM/GIC interrupt controller and
UART driver will enable/mask/handle it by itself via standard methods.
>> Signed-off-by: Beomho Seo <[email protected]>
>> [mszyprow: rephrased commit message, added UART reset]
>> Signed-off-by: Marek Szyprowski <[email protected]>
>> Reviewed-by: Sylwester Nawrocki <[email protected]>
>> ---
>> drivers/mfd/exynos-lpass.c | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/mfd/exynos-lpass.c b/drivers/mfd/exynos-lpass.c
>> index ca829f85672f..2713de989f05 100644
>> --- a/drivers/mfd/exynos-lpass.c
>> +++ b/drivers/mfd/exynos-lpass.c
>> @@ -82,11 +82,13 @@ static void exynos_lpass_enable(struct exynos_lpass *lpass)
>> LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
>>
>> regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK,
>> - LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
>> + LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S |
>> + LPASS_INTR_UART);
>>
>> exynos_lpass_core_sw_reset(lpass, LPASS_I2S_SW_RESET);
>> exynos_lpass_core_sw_reset(lpass, LPASS_DMA_SW_RESET);
>> exynos_lpass_core_sw_reset(lpass, LPASS_MEM_SW_RESET);
>> + exynos_lpass_core_sw_reset(lpass, LPASS_UART_SW_RESET);
>> }
>>
>> static void exynos_lpass_disable(struct exynos_lpass *lpass)
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
On Fri, 21 Dec 2018, Marek Szyprowski wrote:
> Hi
>
> On 2018-12-21 11:13, Lee Jones wrote:
> > On Fri, 14 Dec 2018, Marek Szyprowski wrote:
> >
> >> From: Beomho Seo <[email protected]>
> >>
> >> This patch enables support for UART module in Exynos Audio SubSystem.
> >> There are boards (for example TM2), which use it for communication with
> >> bluetooth chip.
> > Does it though? Or does it enable the interrupt and reset something?
> > These calls would probably benefit from some documentation by way of
> > comments.
>
> It only enables routing interrupts out of LPASS HW module. This is
> completely transparent for the rest of the system (UART and CPU/GIC).
> UART driver will get them via standard ARM/GIC interrupt controller and
> UART driver will enable/mask/handle it by itself via standard methods.
Sounds fine. But that is not what the commit message says.
> >> Signed-off-by: Beomho Seo <[email protected]>
> >> [mszyprow: rephrased commit message, added UART reset]
> >> Signed-off-by: Marek Szyprowski <[email protected]>
> >> Reviewed-by: Sylwester Nawrocki <[email protected]>
> >> ---
> >> drivers/mfd/exynos-lpass.c | 4 +++-
> >> 1 file changed, 3 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/mfd/exynos-lpass.c b/drivers/mfd/exynos-lpass.c
> >> index ca829f85672f..2713de989f05 100644
> >> --- a/drivers/mfd/exynos-lpass.c
> >> +++ b/drivers/mfd/exynos-lpass.c
> >> @@ -82,11 +82,13 @@ static void exynos_lpass_enable(struct exynos_lpass *lpass)
> >> LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
> >>
> >> regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK,
> >> - LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
> >> + LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S |
> >> + LPASS_INTR_UART);
> >>
> >> exynos_lpass_core_sw_reset(lpass, LPASS_I2S_SW_RESET);
> >> exynos_lpass_core_sw_reset(lpass, LPASS_DMA_SW_RESET);
> >> exynos_lpass_core_sw_reset(lpass, LPASS_MEM_SW_RESET);
> >> + exynos_lpass_core_sw_reset(lpass, LPASS_UART_SW_RESET);
> >> }
> >>
> >> static void exynos_lpass_disable(struct exynos_lpass *lpass)
>
> Best regards
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
From: Beomho Seo <[email protected]>
This patch enables proper interrupts routing between UART module
in Exynos Audio SubSystem and the rest of the SoC. This routing is
completely transparent for UART device and CPU/GIC. UART driver requests
interrupts from the respective controller and enables/masks/handles it
by itself via standard methods.
There are boards (for example TM2), which use UART module in Exynos Audio
SubStem for communication with BlueTooth chip.
Signed-off-by: Beomho Seo <[email protected]>
[mszyprow: rephrased commit message, added UART reset]
Signed-off-by: Marek Szyprowski <[email protected]>
Reviewed-by: Sylwester Nawrocki <[email protected]>
---
Changelog
v2:
- rephrased and extended commit message
---
drivers/mfd/exynos-lpass.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/exynos-lpass.c b/drivers/mfd/exynos-lpass.c
index ca829f85672f..2713de989f05 100644
--- a/drivers/mfd/exynos-lpass.c
+++ b/drivers/mfd/exynos-lpass.c
@@ -82,11 +82,13 @@ static void exynos_lpass_enable(struct exynos_lpass *lpass)
LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK,
- LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
+ LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S |
+ LPASS_INTR_UART);
exynos_lpass_core_sw_reset(lpass, LPASS_I2S_SW_RESET);
exynos_lpass_core_sw_reset(lpass, LPASS_DMA_SW_RESET);
exynos_lpass_core_sw_reset(lpass, LPASS_MEM_SW_RESET);
+ exynos_lpass_core_sw_reset(lpass, LPASS_UART_SW_RESET);
}
static void exynos_lpass_disable(struct exynos_lpass *lpass)
--
2.17.1
On Fri, 21 Dec 2018, Marek Szyprowski wrote:
> From: Beomho Seo <[email protected]>
>
> This patch enables proper interrupts routing between UART module
> in Exynos Audio SubSystem and the rest of the SoC. This routing is
> completely transparent for UART device and CPU/GIC. UART driver requests
> interrupts from the respective controller and enables/masks/handles it
> by itself via standard methods.
>
> There are boards (for example TM2), which use UART module in Exynos Audio
> SubStem for communication with BlueTooth chip.
>
> Signed-off-by: Beomho Seo <[email protected]>
> [mszyprow: rephrased commit message, added UART reset]
> Signed-off-by: Marek Szyprowski <[email protected]>
> Reviewed-by: Sylwester Nawrocki <[email protected]>
> ---
> Changelog
> v2:
> - rephrased and extended commit message
> ---
> drivers/mfd/exynos-lpass.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Applied, thanks.
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog