MU4_INT correct number is 180, while 179 is for MU3_INT.
Signed-off-by: Daniel Baluta <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index bb877cf25edc..4c3dd95ed488 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -350,7 +350,7 @@
lsio_mu4: mailbox@5d1f0000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d1f0000 0x10000>;
- interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <0>;
status = "disabled";
};
--
2.17.1
> From: Daniel Baluta
> Sent: Wednesday, January 16, 2019 1:05 AM
> Subject: [PATCH] arm64: dts: imx: Fix MU4_INT number
>
> MU4_INT correct number is 180, while 179 is for MU3_INT.
>
> Signed-off-by: Daniel Baluta <[email protected]>
Reviewed-by: Dong Aisheng <[email protected]>
Regards
Dong Aisheng
Hi Daniel,
On Tue, Jan 15, 2019 at 3:05 PM Daniel Baluta <[email protected]> wrote:
>
> MU4_INT correct number is 180, while 179 is for MU3_INT.
>
> Signed-off-by: Daniel Baluta <[email protected]>
Two nitpicks:
1. In the Subject it would be better to specify the SoC name:
arm64: dts: imx8qxp: Fix MU4_INT number
2. It would be nice to add a Fixes tag
Reviewed-by: Fabio Estevam <[email protected]>
On Wed, 2019-01-16 at 11:12 -0200, Fabio Estevam wrote:
> Hi Daniel,
>
> On Tue, Jan 15, 2019 at 3:05 PM Daniel Baluta <[email protected]>
> wrote:
> >
> > MU4_INT correct number is 180, while 179 is for MU3_INT.
> >
> > Signed-off-by: Daniel Baluta <[email protected]>
>
> Two nitpicks:
>
> 1. In the Subject it would be better to specify the SoC name:
> arm64: dts: imx8qxp: Fix MU4_INT number
>
> 2. It would be nice to add a Fixes tag
>
> Reviewed-by: Fabio Estevam <[email protected]>
Thanks Fabio for review. Fixed in v2.