From: Nikhil Badola <[email protected]>
Set USB_EN bit to select ULPI phy for USB controller version 2.5
Signed-off-by: Nikhil Badola <[email protected]>
Signed-off-by: Yinbo Zhu <[email protected]>
---
drivers/usb/host/ehci-fsl.c | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index e3d0c1c..38674b7 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -122,6 +122,12 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
tmp |= 0x4;
iowrite32be(tmp, hcd->regs + FSL_SOC_USB_CTRL);
}
+
+ /* Set USB_EN bit to select ULPI phy for USB controller version 2.5 */
+ if (pdata->controller_ver == FSL_USB_VER_2_5 &&
+ pdata->phy_mode == FSL_USB2_PHY_ULPI)
+ iowrite32be(USB_CTRL_USB_EN, hcd->regs + FSL_SOC_USB_CTRL);
+
/*
* Enable UTMI phy and program PTS field in UTMI mode before asserting
* controller reset for USB Controller version 2.5
--
1.7.1
From: Nikhil Badola <[email protected]>
Remove USB errata checking code from driver. Applicability of erratum
is retrieved by reading corresponding property in device tree.
This property is written during device tree fixup.
Signed-off-by: Ramneek Mehresh <[email protected]>
Signed-off-by: Nikhil Badola <[email protected]>
Signed-off-by: Yinbo Zhu <[email protected]>
---
drivers/usb/host/fsl-mph-dr-of.c | 7 ++-----
1 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 762b976..ae8f60f 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -226,11 +226,8 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device *ofdev)
of_property_read_bool(np, "fsl,usb_erratum-a005697");
pdata->has_fsl_erratum_a006918 =
of_property_read_bool(np, "fsl,usb_erratum-a006918");
-
- if (of_get_property(np, "fsl,usb_erratum_14", NULL))
- pdata->has_fsl_erratum_14 = 1;
- else
- pdata->has_fsl_erratum_14 = 0;
+ pdata->has_fsl_erratum_14 =
+ of_property_read_bool(np, "fsl,usb_erratum-14");
/*
* Determine whether phy_clk_valid needs to be checked
--
1.7.1
From: Suresh Gupta <[email protected]>
PHY_CLK_VALID bit for UTMI PHY in USBDR does not set even
if PHY is providing valid clock. Workaround for this
involves resetting of PHY and check PHY_CLK_VALID bit
multiple times. If PHY_CLK_VALID bit is still not set even
after 5 retries, it would be safe to deaclare that PHY
clock is not available.
This erratum is applicable for USBDR less then ver 2.4.
Signed-off-by: Suresh Gupta <[email protected]>
Signed-off-by: Yinbo Zhu <[email protected]>
---
Change in v5:
remove dev_err function unnecessary parameters
drivers/usb/host/ehci-fsl.c | 37 ++++++++++++++++++++++++++-----------
drivers/usb/host/ehci-fsl.h | 3 +++
2 files changed, 29 insertions(+), 11 deletions(-)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 38674b7..1634ac8 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -183,6 +183,17 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
return retval;
}
+static bool usb_phy_clk_valid(struct usb_hcd *hcd)
+{
+ void __iomem *non_ehci = hcd->regs;
+ bool ret = true;
+
+ if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID))
+ ret = false;
+
+ return ret;
+}
+
static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
enum fsl_usb2_phy_modes phy_mode,
unsigned int port_offset)
@@ -226,6 +237,16 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
/* fall through */
case FSL_USB2_PHY_UTMI:
case FSL_USB2_PHY_UTMI_DUAL:
+ /* PHY_CLK_VALID bit is de-featured from all controller
+ * versions below 2.4 and is to be checked only for
+ * internal UTMI phy
+ */
+ if (pdata->controller_ver > FSL_USB_VER_2_4 &&
+ pdata->have_sysif_regs && !usb_phy_clk_valid(hcd)) {
+ dev_err(dev, "USB PHY clock invalid\n");
+ return -EINVAL;
+ }
+
if (pdata->have_sysif_regs && pdata->controller_ver) {
/* controller version 1.6 or above */
tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL);
@@ -249,17 +270,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
break;
}
- /*
- * check PHY_CLK_VALID to determine phy clock presence before writing
- * to portsc
- */
- if (pdata->check_phy_clk_valid) {
- if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) &
- PHY_CLK_VALID)) {
- dev_warn(hcd->self.controller,
- "USB PHY clock invalid\n");
- return -EINVAL;
- }
+ if (pdata->have_sysif_regs &&
+ pdata->controller_ver > FSL_USB_VER_1_6 &&
+ !usb_phy_clk_valid(hcd)) {
+ dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
+ return -EINVAL;
}
ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index cbc4220..9d18c6e 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -50,4 +50,7 @@
#define UTMI_PHY_EN (1<<9)
#define ULPI_PHY_CLK_SEL (1<<10)
#define PHY_CLK_VALID (1<<17)
+
+/* Retry count for checking UTMI PHY CLK validity */
+#define UTMI_PHY_CLK_VALID_CHK_RETRY 5
#endif /* _EHCI_FSL_H */
--
1.7.1
On Wed, 8 May 2019, Yinbo Zhu wrote:
> From: Suresh Gupta <[email protected]>
>
> PHY_CLK_VALID bit for UTMI PHY in USBDR does not set even
> if PHY is providing valid clock. Workaround for this
> involves resetting of PHY and check PHY_CLK_VALID bit
> multiple times. If PHY_CLK_VALID bit is still not set even
> after 5 retries, it would be safe to deaclare that PHY
> clock is not available.
> This erratum is applicable for USBDR less then ver 2.4.
>
> Signed-off-by: Suresh Gupta <[email protected]>
> Signed-off-by: Yinbo Zhu <[email protected]>
> ---
> Change in v5:
> remove dev_err function unnecessary parameters
>
> drivers/usb/host/ehci-fsl.c | 37 ++++++++++++++++++++++++++-----------
> drivers/usb/host/ehci-fsl.h | 3 +++
> 2 files changed, 29 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> index 38674b7..1634ac8 100644
> --- a/drivers/usb/host/ehci-fsl.c
> +++ b/drivers/usb/host/ehci-fsl.c
> @@ -183,6 +183,17 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
> return retval;
> }
>
> +static bool usb_phy_clk_valid(struct usb_hcd *hcd)
> +{
> + void __iomem *non_ehci = hcd->regs;
> + bool ret = true;
> +
> + if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID))
> + ret = false;
> +
> + return ret;
> +}
> +
> static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> enum fsl_usb2_phy_modes phy_mode,
> unsigned int port_offset)
> @@ -226,6 +237,16 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> /* fall through */
> case FSL_USB2_PHY_UTMI:
> case FSL_USB2_PHY_UTMI_DUAL:
> + /* PHY_CLK_VALID bit is de-featured from all controller
> + * versions below 2.4 and is to be checked only for
> + * internal UTMI phy
> + */
> + if (pdata->controller_ver > FSL_USB_VER_2_4 &&
> + pdata->have_sysif_regs && !usb_phy_clk_valid(hcd)) {
> + dev_err(dev, "USB PHY clock invalid\n");
> + return -EINVAL;
> + }
> +
> if (pdata->have_sysif_regs && pdata->controller_ver) {
> /* controller version 1.6 or above */
> tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL);
> @@ -249,17 +270,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> break;
> }
>
> - /*
> - * check PHY_CLK_VALID to determine phy clock presence before writing
> - * to portsc
> - */
> - if (pdata->check_phy_clk_valid) {
> - if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) &
> - PHY_CLK_VALID)) {
> - dev_warn(hcd->self.controller,
> - "USB PHY clock invalid\n");
> - return -EINVAL;
> - }
> + if (pdata->have_sysif_regs &&
> + pdata->controller_ver > FSL_USB_VER_1_6 &&
> + !usb_phy_clk_valid(hcd)) {
This is still wrong. The line above should be indented four characters
less than it is: the '!' should line up with the 'p' in the line above
it.
Alan Stern
> + dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
> + return -EINVAL;
> }
>
> ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
> diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
> index cbc4220..9d18c6e 100644
> --- a/drivers/usb/host/ehci-fsl.h
> +++ b/drivers/usb/host/ehci-fsl.h
> @@ -50,4 +50,7 @@
> #define UTMI_PHY_EN (1<<9)
> #define ULPI_PHY_CLK_SEL (1<<10)
> #define PHY_CLK_VALID (1<<17)
> +
> +/* Retry count for checking UTMI PHY CLK validity */
> +#define UTMI_PHY_CLK_VALID_CHK_RETRY 5
> #endif /* _EHCI_FSL_H */
>
> -----Original Message-----
> From: Alan Stern [mailto:[email protected]]
> Sent: 2019??5??8?? 22:15
> To: Yinbo Zhu <[email protected]>
> Cc: Xiaobo Xie <[email protected]>; Greg Kroah-Hartman
> <[email protected]>; Ramneek Mehresh
> <[email protected]>; Nikhil Badola
> <[email protected]>; Ran Wang <[email protected]>;
> [email protected]; [email protected]; Jiafei Pan
> <[email protected]>; Suresh Gupta <[email protected]>
> Subject: [EXT] Re: [PATCH v5 2/5] usb: phy: Workaround for USB
> erratum-A005728
>
> Caution: EXT Email
>
> On Wed, 8 May 2019, Yinbo Zhu wrote:
>
> > From: Suresh Gupta <[email protected]>
> >
> > PHY_CLK_VALID bit for UTMI PHY in USBDR does not set even if PHY is
> > providing valid clock. Workaround for this involves resetting of PHY
> > and check PHY_CLK_VALID bit multiple times. If PHY_CLK_VALID bit is
> > still not set even after 5 retries, it would be safe to deaclare that
> > PHY clock is not available.
> > This erratum is applicable for USBDR less then ver 2.4.
> >
> > Signed-off-by: Suresh Gupta <[email protected]>
> > Signed-off-by: Yinbo Zhu <[email protected]>
> > ---
> > Change in v5:
> > remove dev_err function unnecessary parameters
> >
> > drivers/usb/host/ehci-fsl.c | 37 ++++++++++++++++++++++++++-----------
> > drivers/usb/host/ehci-fsl.h | 3 +++
> > 2 files changed, 29 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> > index 38674b7..1634ac8 100644
> > --- a/drivers/usb/host/ehci-fsl.c
> > +++ b/drivers/usb/host/ehci-fsl.c
> > @@ -183,6 +183,17 @@ static int fsl_ehci_drv_probe(struct platform_device
> *pdev)
> > return retval;
> > }
> >
> > +static bool usb_phy_clk_valid(struct usb_hcd *hcd) {
> > + void __iomem *non_ehci = hcd->regs;
> > + bool ret = true;
> > +
> > + if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID))
> > + ret = false;
> > +
> > + return ret;
> > +}
> > +
> > static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> > enum fsl_usb2_phy_modes phy_mode,
> > unsigned int port_offset) @@ -226,6
> > +237,16 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> > /* fall through */
> > case FSL_USB2_PHY_UTMI:
> > case FSL_USB2_PHY_UTMI_DUAL:
> > + /* PHY_CLK_VALID bit is de-featured from all controller
> > + * versions below 2.4 and is to be checked only for
> > + * internal UTMI phy
> > + */
> > + if (pdata->controller_ver > FSL_USB_VER_2_4 &&
> > + pdata->have_sysif_regs && !usb_phy_clk_valid(hcd)) {
> > + dev_err(dev, "USB PHY clock invalid\n");
> > + return -EINVAL;
> > + }
> > +
> > if (pdata->have_sysif_regs && pdata->controller_ver) {
> > /* controller version 1.6 or above */
> > tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL);
> > @@ -249,17 +270,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> > break;
> > }
> >
> > - /*
> > - * check PHY_CLK_VALID to determine phy clock presence before writing
> > - * to portsc
> > - */
> > - if (pdata->check_phy_clk_valid) {
> > - if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) &
> > - PHY_CLK_VALID)) {
> > - dev_warn(hcd->self.controller,
> > - "USB PHY clock invalid\n");
> > - return -EINVAL;
> > - }
> > + if (pdata->have_sysif_regs &&
> > + pdata->controller_ver > FSL_USB_VER_1_6 &&
> > + !usb_phy_clk_valid(hcd)) {
>
> This is still wrong. The line above should be indented four characters less than it
> is: the '!' should line up with the 'p' in the line above it.
>
> Alan Stern
Hi Alan Stern,
Your meaning is that as following changes?
+ if (pdata->have_sysif_regs &&
+ pdata->controller_ver > FSL_USB_VER_1_6 &&
+ !usb_phy_clk_valid(hcd)) {
Regards,
Yinbo
>
> > + dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
> > + return -EINVAL;
> > }
> >
> > ehci_writel(ehci, portsc,
> > &ehci->regs->port_status[port_offset]);
> > diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
> > index cbc4220..9d18c6e 100644
> > --- a/drivers/usb/host/ehci-fsl.h
> > +++ b/drivers/usb/host/ehci-fsl.h
> > @@ -50,4 +50,7 @@
> > #define UTMI_PHY_EN (1<<9)
> > #define ULPI_PHY_CLK_SEL (1<<10)
> > #define PHY_CLK_VALID (1<<17)
> > +
> > +/* Retry count for checking UTMI PHY CLK validity */ #define
> > +UTMI_PHY_CLK_VALID_CHK_RETRY 5
> > #endif /* _EHCI_FSL_H */
> >