2019-05-18 08:44:18

by Jitao Shi

[permalink] [raw]
Subject: [v3 0/3] Support mipitx on mt8183

Changes since v2:
- update Acked-by: Rob Herring <[email protected]>
- update mt8183 max bit rate support

Changes since v1:
- update dt-bindings document for mt8183 mipitx.
- remove mtk_mipitx_clk_get_ops and assign clk_ops in probe.
- fix the lincence
- remove txdiv1 from mtk_mipi_tx_pll_prepare

Jitao Shi (3):
dt-bindings: display: mediatek: update dsi supported chips
drm/mediatek: separate mipi_tx to different file
drm/mediatek: add mipi_tx driver for mt8183

.../display/mediatek/mediatek,dsi.txt | 2 +-
drivers/gpu/drm/mediatek/Makefile | 2 +
drivers/gpu/drm/mediatek/mtk_mipi_tx.c | 344 ++----------------
drivers/gpu/drm/mediatek/mtk_mipi_tx.h | 50 +++
drivers/gpu/drm/mediatek/mtk_mt8173_mipi_tx.c | 289 +++++++++++++++
drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c | 160 ++++++++
6 files changed, 527 insertions(+), 320 deletions(-)
create mode 100644 drivers/gpu/drm/mediatek/mtk_mipi_tx.h
create mode 100644 drivers/gpu/drm/mediatek/mtk_mt8173_mipi_tx.c
create mode 100644 drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c

--
2.21.0


2019-05-18 08:44:18

by Jitao Shi

[permalink] [raw]
Subject: [v3 1/3] dt-bindings: display: mediatek: update dsi supported chips

Update device tree binding documentation for the dsi for
Mediatek MT8183 SoCs.

Signed-off-by: Jitao Shi <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
index fadf327c7cdf..bb3dcd2d8571 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
@@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY.

Required properties:
- compatible: "mediatek,<chip>-mipi-tx"
- the supported chips are mt2701 and mt8173.
+ the supported chips are mt2701, mt8173 and mt8183.
- reg: Physical base address and length of the controller's registers
- clocks: PLL reference clock
- clock-output-names: name of the output clock line to the DSI encoder
--
2.21.0