The MSM8998 MTP reference platform supplies VDD_GFX from s1 of the
pm8005 PMIC. VDD_GFX is needed to turn on the GPU. As we are looking
to bring up the GPU, add the support for pm8005 and wire up s1 in a
basic manner so that we have this dependency out of the way and can
focus on enabling the GPU driver.
The s3 regulator of PMS405 is used for voltage scaling of the CPU on
QCS404.
Both PMICs are very similar in deisgn, so add the base support with one,
and trivially add the support for the other on top.
The PMS405 work has only been compile tested as I don't have the proper
platform. A tested-by from Jorge or someone with the platform would be
great.
v2:
-Perform if statement cleanups per review discussion
-Pull in linear range support since its related, and simple
-Rework the PM8005 to minimize special cases in the driver
-"common2" is now ftsmps426 since that design first implemented it
-Reworked the PMS405 changes on top, since they are related to pm8005 and
trivial
Jeffrey Hugo (4):
drivers: regulator: qcom_spmi: Refactor get_mode/set_mode
dt-bindings: qcom_spmi: Document PM8005 regulators
regulator: qcom_spmi: Add support for PM8005
arm64: dts: msm8998-mtp: Add pm8005_s1 regulator
Jorge Ramirez (2):
dt-bindings: qcom_spmi: Document pms405 support
drivers: regulator: qcom: add PMS405 SPMI regulator
Jorge Ramirez-Ortiz (1):
drivers: regulator: qcom_spmi: enable linear range info
.../regulator/qcom,spmi-regulator.txt | 28 +++
arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi | 17 ++
drivers/regulator/qcom_spmi-regulator.c | 233 +++++++++++++++++-
3 files changed, 271 insertions(+), 7 deletions(-)
--
2.17.1
Document the dt bindings for the PM8005 regulators which are usually used
for VDD of standalone blocks on a SoC like the GPU.
Signed-off-by: Jeffrey Hugo <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../devicetree/bindings/regulator/qcom,spmi-regulator.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt
index 406f2e570c50..ba94bc2d407a 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt
@@ -4,6 +4,7 @@ Qualcomm SPMI Regulators
Usage: required
Value type: <string>
Definition: must be one of:
+ "qcom,pm8005-regulators"
"qcom,pm8841-regulators"
"qcom,pm8916-regulators"
"qcom,pm8941-regulators"
@@ -120,6 +121,9 @@ The regulator node houses sub-nodes for each regulator within the device. Each
sub-node is identified using the node's name, with valid values listed for each
of the PMICs below.
+pm8005:
+ s1, s2, s3, s4
+
pm8841:
s1, s2, s3, s4, s5, s6, s7, s8
--
2.17.1
The pm8005_s1 is VDD_GFX, and needs to be on to enable the GPU.
This should be hooked up to the GPU CPR, but we don't have support for that
yet, so until then, just turn on the regulator and keep it on so that we
can focus on basic GPU bringup.
Signed-off-by: Jeffrey Hugo <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
index f09f3e03f708..108667ce4f31 100644
--- a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
@@ -27,6 +27,23 @@
status = "okay";
};
+&pm8005_lsid1 {
+ pm8005-regulators {
+ compatible = "qcom,pm8005-regulators";
+
+ vdd_s1-supply = <&vph_pwr>;
+
+ pm8005_s1: s1 { /* VDD_GFX supply */
+ regulator-min-microvolt = <524000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-enable-ramp-delay = <500>;
+
+ /* hack until we rig up the gpu consumer */
+ regulator-always-on;
+ };
+ };
+};
+
&qusb2phy {
status = "okay";
--
2.17.1
From: Jorge Ramirez <[email protected]>
The PMS405 has 5 HFSMPS and 13 LDO regulators,
This commit adds support for one of the 5 HFSMPS regulators (s3) to
the spmi regulator driver.
The PMIC HFSMPS 430 regulators have 8 mV step size and a voltage
control scheme consisting of two 8-bit registers defining a 16-bit
voltage set point in units of millivolts
S3 controls the cpu voltages (s3 is a buck regulator of type HFS430);
it is therefore required so we can enable voltage scaling for safely
running cpufreq.
Signed-off-by: Jorge Ramirez-Ortiz <[email protected]>
Signed-off-by: Jeffrey Hugo <[email protected]>
---
drivers/regulator/qcom_spmi-regulator.c | 41 +++++++++++++++++++++++--
1 file changed, 38 insertions(+), 3 deletions(-)
diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c
index c7880c1d4bcd..975655e787fe 100644
--- a/drivers/regulator/qcom_spmi-regulator.c
+++ b/drivers/regulator/qcom_spmi-regulator.c
@@ -105,6 +105,7 @@ enum spmi_regulator_logical_type {
SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS,
SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO,
SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426,
+ SPMI_REGULATOR_LOGICAL_TYPE_HFS430,
};
enum spmi_regulator_type {
@@ -157,6 +158,7 @@ enum spmi_regulator_subtype {
SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2 = 0x0e,
SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f,
SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10,
+ SPMI_REGULATOR_SUBTYPE_HFS430 = 0x0a,
};
enum spmi_common_regulator_registers {
@@ -302,6 +304,8 @@ enum spmi_common_control_register_index {
/* Clock rate in kHz of the FTSMPS426 regulator reference clock. */
#define SPMI_FTSMPS426_CLOCK_RATE 4800
+#define SPMI_HFS430_CLOCK_RATE 1600
+
/* Minimum voltage stepper delay for each step. */
#define SPMI_FTSMPS426_STEP_DELAY 2
@@ -515,6 +519,10 @@ static struct spmi_voltage_range ult_pldo_ranges[] = {
SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500),
};
+static struct spmi_voltage_range hfs430_ranges[] = {
+ SPMI_VOLTAGE_RANGE(0, 320000, 320000, 2040000, 2040000, 8000),
+};
+
static DEFINE_SPMI_SET_POINTS(pldo);
static DEFINE_SPMI_SET_POINTS(nldo1);
static DEFINE_SPMI_SET_POINTS(nldo2);
@@ -530,6 +538,7 @@ static DEFINE_SPMI_SET_POINTS(ult_lo_smps);
static DEFINE_SPMI_SET_POINTS(ult_ho_smps);
static DEFINE_SPMI_SET_POINTS(ult_nldo);
static DEFINE_SPMI_SET_POINTS(ult_pldo);
+static DEFINE_SPMI_SET_POINTS(hfs430);
static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
int len)
@@ -1397,12 +1406,24 @@ static struct regulator_ops spmi_ftsmps426_ops = {
.set_pull_down = spmi_regulator_common_set_pull_down,
};
+static struct regulator_ops spmi_hfs430_ops = {
+ /* always on regulators */
+ .set_voltage_sel = spmi_regulator_ftsmps426_set_voltage,
+ .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel,
+ .get_voltage = spmi_regulator_ftsmps426_get_voltage,
+ .map_voltage = spmi_regulator_single_map_voltage,
+ .list_voltage = spmi_regulator_common_list_voltage,
+ .set_mode = spmi_regulator_ftsmps426_set_mode,
+ .get_mode = spmi_regulator_ftsmps426_get_mode,
+};
+
/* Maximum possible digital major revision value */
#define INF 0xFF
static const struct spmi_regulator_mapping supported_regulators[] = {
/* type subtype dig_min dig_max ltype ops setpoints hpm_min */
SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000),
+ SPMI_VREG(BUCK, HFS430, 0, INF, HFS430, hfs430, hfs430, 10000),
SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000),
SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000),
SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000),
@@ -1570,7 +1591,8 @@ static int spmi_regulator_init_slew_rate(struct spmi_regulator *vreg)
return ret;
}
-static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg)
+static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg,
+ int clock_rate)
{
int ret;
u8 reg = 0;
@@ -1587,7 +1609,7 @@ static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg)
delay >>= SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT;
/* slew_rate has units of uV/us */
- slew_rate = SPMI_FTSMPS426_CLOCK_RATE * range->step_uV;
+ slew_rate = clock_rate * range->step_uV;
slew_rate /= 1000 * (SPMI_FTSMPS426_STEP_DELAY << delay);
slew_rate *= SPMI_FTSMPS426_STEP_MARGIN_NUM;
slew_rate /= SPMI_FTSMPS426_STEP_MARGIN_DEN;
@@ -1739,7 +1761,14 @@ static int spmi_regulator_of_parse(struct device_node *node,
return ret;
break;
case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426:
- ret = spmi_regulator_init_slew_rate_ftsmps426(vreg);
+ ret = spmi_regulator_init_slew_rate_ftsmps426(vreg,
+ SPMI_FTSMPS426_CLOCK_RATE);
+ if (ret)
+ return ret;
+ break;
+ case SPMI_REGULATOR_LOGICAL_TYPE_HFS430:
+ ret = spmi_regulator_init_slew_rate_ftsmps426(vreg,
+ SPMI_HFS430_CLOCK_RATE);
if (ret)
return ret;
break;
@@ -1907,6 +1936,11 @@ static const struct spmi_regulator_data pm8005_regulators[] = {
{ }
};
+static const struct spmi_regulator_data pms405_regulators[] = {
+ { "s3", 0x1a00, }, /* supply name in the dts only */
+ { }
+};
+
static const struct of_device_id qcom_spmi_regulator_match[] = {
{ .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators },
{ .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators },
@@ -1914,6 +1948,7 @@ static const struct of_device_id qcom_spmi_regulator_match[] = {
{ .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators },
{ .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators },
{ .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators },
+ { .compatible = "qcom,pms405-regulators", .data = &pms405_regulators },
{ }
};
MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match);
--
2.17.1
spmi_regulator_common_get_mode and spmi_regulator_common_set_mode use
multi-level ifs which mirror a switch statement. Refactor to use a switch
statement to make the code flow more clear.
Signed-off-by: Jeffrey Hugo <[email protected]>
---
drivers/regulator/qcom_spmi-regulator.c | 28 ++++++++++++++++---------
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c
index fd55438c25d6..1c18fe5969b5 100644
--- a/drivers/regulator/qcom_spmi-regulator.c
+++ b/drivers/regulator/qcom_spmi-regulator.c
@@ -911,13 +911,14 @@ static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev)
spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, ®, 1);
- if (reg & SPMI_COMMON_MODE_HPM_MASK)
+ switch (reg) {
+ case SPMI_COMMON_MODE_HPM_MASK:
return REGULATOR_MODE_NORMAL;
-
- if (reg & SPMI_COMMON_MODE_AUTO_MASK)
+ case SPMI_COMMON_MODE_AUTO_MASK:
return REGULATOR_MODE_FAST;
-
- return REGULATOR_MODE_IDLE;
+ default:
+ return REGULATOR_MODE_IDLE;
+ }
}
static int
@@ -925,12 +926,19 @@ spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode)
{
struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK;
- u8 val = 0;
+ u8 val;
- if (mode == REGULATOR_MODE_NORMAL)
+ switch (mode) {
+ case REGULATOR_MODE_NORMAL:
val = SPMI_COMMON_MODE_HPM_MASK;
- else if (mode == REGULATOR_MODE_FAST)
+ break;
+ case REGULATOR_MODE_FAST:
val = SPMI_COMMON_MODE_AUTO_MASK;
+ break;
+ default:
+ val = 0;
+ break;
+ }
return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
}
@@ -1834,9 +1842,9 @@ static int qcom_spmi_regulator_probe(struct platform_device *pdev)
}
}
- if (vreg->logical_type == SPMI_REGULATOR_LOGICAL_TYPE_HFS430) {
+ if (vreg->set_points->count == 1) {
/* since there is only one range */
- range = spmi_regulator_find_range(vreg);
+ range = vreg->set_points->range;
vreg->desc.uV_step = range->step_uV;
}
--
2.17.1
On Thu, Jun 6, 2019 at 12:53 PM Jeffrey Hugo <[email protected]> wrote:
>
> From: Jorge Ramirez <[email protected]>
>
> The PMS405 has 5 HFSMPS and 13 LDO regulators,
>
> This commit adds support for one of the 5 HFSMPS regulators (s3) to
> the spmi regulator driver.
>
> The PMIC HFSMPS 430 regulators have 8 mV step size and a voltage
> control scheme consisting of two 8-bit registers defining a 16-bit
> voltage set point in units of millivolts
>
> S3 controls the cpu voltages (s3 is a buck regulator of type HFS430);
> it is therefore required so we can enable voltage scaling for safely
> running cpufreq.
>
> Signed-off-by: Jorge Ramirez-Ortiz <[email protected]>
> Signed-off-by: Jeffrey Hugo <[email protected]>
> ---
> drivers/regulator/qcom_spmi-regulator.c | 41 +++++++++++++++++++++++--
> 1 file changed, 38 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/regulator/qcom_spmi-regulator.c b/drivers/regulator/qcom_spmi-regulator.c
> index c7880c1d4bcd..975655e787fe 100644
> --- a/drivers/regulator/qcom_spmi-regulator.c
> +++ b/drivers/regulator/qcom_spmi-regulator.c
> @@ -105,6 +105,7 @@ enum spmi_regulator_logical_type {
> SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS,
> SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO,
> SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426,
> + SPMI_REGULATOR_LOGICAL_TYPE_HFS430,
> };
>
> enum spmi_regulator_type {
> @@ -157,6 +158,7 @@ enum spmi_regulator_subtype {
> SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2 = 0x0e,
> SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f,
> SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10,
> + SPMI_REGULATOR_SUBTYPE_HFS430 = 0x0a,
> };
>
> enum spmi_common_regulator_registers {
> @@ -302,6 +304,8 @@ enum spmi_common_control_register_index {
> /* Clock rate in kHz of the FTSMPS426 regulator reference clock. */
> #define SPMI_FTSMPS426_CLOCK_RATE 4800
>
> +#define SPMI_HFS430_CLOCK_RATE 1600
> +
> /* Minimum voltage stepper delay for each step. */
> #define SPMI_FTSMPS426_STEP_DELAY 2
>
> @@ -515,6 +519,10 @@ static struct spmi_voltage_range ult_pldo_ranges[] = {
> SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500),
> };
>
> +static struct spmi_voltage_range hfs430_ranges[] = {
> + SPMI_VOLTAGE_RANGE(0, 320000, 320000, 2040000, 2040000, 8000),
> +};
> +
> static DEFINE_SPMI_SET_POINTS(pldo);
> static DEFINE_SPMI_SET_POINTS(nldo1);
> static DEFINE_SPMI_SET_POINTS(nldo2);
> @@ -530,6 +538,7 @@ static DEFINE_SPMI_SET_POINTS(ult_lo_smps);
> static DEFINE_SPMI_SET_POINTS(ult_ho_smps);
> static DEFINE_SPMI_SET_POINTS(ult_nldo);
> static DEFINE_SPMI_SET_POINTS(ult_pldo);
> +static DEFINE_SPMI_SET_POINTS(hfs430);
>
> static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
> int len)
> @@ -1397,12 +1406,24 @@ static struct regulator_ops spmi_ftsmps426_ops = {
> .set_pull_down = spmi_regulator_common_set_pull_down,
> };
>
> +static struct regulator_ops spmi_hfs430_ops = {
> + /* always on regulators */
From offline discussion, this is apparently now incorrect. I'll spin
a v3 with this fixed, but I'll wait a bit to see if there are any
other comments, or if this is the only fixup.
> + .set_voltage_sel = spmi_regulator_ftsmps426_set_voltage,
> + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel,
> + .get_voltage = spmi_regulator_ftsmps426_get_voltage,
> + .map_voltage = spmi_regulator_single_map_voltage,
> + .list_voltage = spmi_regulator_common_list_voltage,
> + .set_mode = spmi_regulator_ftsmps426_set_mode,
> + .get_mode = spmi_regulator_ftsmps426_get_mode,
> +};
> +
> /* Maximum possible digital major revision value */
> #define INF 0xFF
>
> static const struct spmi_regulator_mapping supported_regulators[] = {
> /* type subtype dig_min dig_max ltype ops setpoints hpm_min */
> SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000),
> + SPMI_VREG(BUCK, HFS430, 0, INF, HFS430, hfs430, hfs430, 10000),
> SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000),
> SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000),
> SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000),
> @@ -1570,7 +1591,8 @@ static int spmi_regulator_init_slew_rate(struct spmi_regulator *vreg)
> return ret;
> }
>
> -static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg)
> +static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg,
> + int clock_rate)
> {
> int ret;
> u8 reg = 0;
> @@ -1587,7 +1609,7 @@ static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg)
> delay >>= SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT;
>
> /* slew_rate has units of uV/us */
> - slew_rate = SPMI_FTSMPS426_CLOCK_RATE * range->step_uV;
> + slew_rate = clock_rate * range->step_uV;
> slew_rate /= 1000 * (SPMI_FTSMPS426_STEP_DELAY << delay);
> slew_rate *= SPMI_FTSMPS426_STEP_MARGIN_NUM;
> slew_rate /= SPMI_FTSMPS426_STEP_MARGIN_DEN;
> @@ -1739,7 +1761,14 @@ static int spmi_regulator_of_parse(struct device_node *node,
> return ret;
> break;
> case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426:
> - ret = spmi_regulator_init_slew_rate_ftsmps426(vreg);
> + ret = spmi_regulator_init_slew_rate_ftsmps426(vreg,
> + SPMI_FTSMPS426_CLOCK_RATE);
> + if (ret)
> + return ret;
> + break;
> + case SPMI_REGULATOR_LOGICAL_TYPE_HFS430:
> + ret = spmi_regulator_init_slew_rate_ftsmps426(vreg,
> + SPMI_HFS430_CLOCK_RATE);
> if (ret)
> return ret;
> break;
> @@ -1907,6 +1936,11 @@ static const struct spmi_regulator_data pm8005_regulators[] = {
> { }
> };
>
> +static const struct spmi_regulator_data pms405_regulators[] = {
> + { "s3", 0x1a00, }, /* supply name in the dts only */
> + { }
> +};
> +
> static const struct of_device_id qcom_spmi_regulator_match[] = {
> { .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators },
> { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators },
> @@ -1914,6 +1948,7 @@ static const struct of_device_id qcom_spmi_regulator_match[] = {
> { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators },
> { .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators },
> { .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators },
> + { .compatible = "qcom,pms405-regulators", .data = &pms405_regulators },
> { }
> };
> MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match);
> --
> 2.17.1
>