This series adds GPIO interrupt controller support for Meson-G12A SoCs.
Although the total number of pins is the same as the Meson-AXG SoC, the
GPIO banks and IRQ numbers are different. Add a new compatible string
to avoid confusion when using it.
I am re-sending this update because v2 looked good in my opinion (Xingyu
Chen did good work here) but it never made it into mainline.
Changes since v1 at [1]:
- share the device data with Meson-AXG
Changes since v2 at [2]:
- dropped "Change-Id" from patch #2
- added .dts patch #3 - this should go through Kevin's linux-amlogic
tree. if required I can re-send it in a separate series
[1] https://lore.kernel.org/lkml/[email protected]
[2] https://lore.kernel.org/patchwork/cover/1021232/
Martin Blumenstingl (1):
arm64: dts: meson: g12a: add the GPIO interrupt controller
Xingyu Chen (2):
dt-bindings: interrupt-controller: New binding for Meson-G12A SoC
irqchip/meson-gpio: Add support for Meson-G12A SoC
.../interrupt-controller/amlogic,meson-gpio-intc.txt | 1 +
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 9 +++++++++
drivers/irqchip/irq-meson-gpio.c | 1 +
3 files changed, 11 insertions(+)
--
2.21.0
From: Xingyu Chen <[email protected]>
The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the
other Meson SoCs, A totle of 100 pins can be spied on, which is the sum of:
- 223:100 undefined (no interrupt)
- 99:97 3 pins on bank GPIOE
- 96:77 20 pins on bank GPIOX
- 76:61 16 pins on bank GPIOA
- 60:53 8 pins on bank GPIOC
- 52:37 16 pins on bank BOOT
- 36:28 9 pins on bank GPIOH
- 27:12 16 pins on bank GPIOZ
- 11:0 12 pins in the AO domain
Signed-off-by: Xingyu Chen <[email protected]>
Signed-off-by: Jianxin Pan <[email protected]>
Signed-off-by: Martin Blumenstingl <[email protected]>
---
drivers/irqchip/irq-meson-gpio.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/irq-meson-gpio.c b/drivers/irqchip/irq-meson-gpio.c
index 7b531fd075b8..7599b10ecf09 100644
--- a/drivers/irqchip/irq-meson-gpio.c
+++ b/drivers/irqchip/irq-meson-gpio.c
@@ -73,6 +73,7 @@ static const struct of_device_id meson_irq_gpio_matches[] = {
{ .compatible = "amlogic,meson-gxbb-gpio-intc", .data = &gxbb_params },
{ .compatible = "amlogic,meson-gxl-gpio-intc", .data = &gxl_params },
{ .compatible = "amlogic,meson-axg-gpio-intc", .data = &axg_params },
+ { .compatible = "amlogic,meson-g12a-gpio-intc", .data = &axg_params },
{ }
};
--
2.21.0
On 08/06/2019 20:04, Martin Blumenstingl wrote:
> This series adds GPIO interrupt controller support for Meson-G12A SoCs.
> Although the total number of pins is the same as the Meson-AXG SoC, the
> GPIO banks and IRQ numbers are different. Add a new compatible string
> to avoid confusion when using it.
>
> I am re-sending this update because v2 looked good in my opinion (Xingyu
> Chen did good work here) but it never made it into mainline.
>
>
> Changes since v1 at [1]:
> - share the device data with Meson-AXG
>
> Changes since v2 at [2]:
> - dropped "Change-Id" from patch #2
> - added .dts patch #3 - this should go through Kevin's linux-amlogic
> tree. if required I can re-send it in a separate series
>
>
> [1] https://lore.kernel.org/lkml/[email protected]
> [2] https://lore.kernel.org/patchwork/cover/1021232/
>
>
> Martin Blumenstingl (1):
> arm64: dts: meson: g12a: add the GPIO interrupt controller
>
> Xingyu Chen (2):
> dt-bindings: interrupt-controller: New binding for Meson-G12A SoC
> irqchip/meson-gpio: Add support for Meson-G12A SoC
>
> .../interrupt-controller/amlogic,meson-gpio-intc.txt | 1 +
> arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 9 +++++++++
> drivers/irqchip/irq-meson-gpio.c | 1 +
> 3 files changed, 11 insertions(+)
>
I've taken patches 1 and 2 into the irqchip tree. Please route patch 3
though armsoc.
Thanks,
M.
--
Jazz is not dead. It just smells funny...