We are using RXINT bits definition when looking at RXSTA register.
These bits are equal but it's not really proper.
Introduce the RXSTA bits and use them to have coherency.
Signed-off-by: Clément Péron <[email protected]>
---
drivers/media/rc/sunxi-cir.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
index 0504ebfc831f..5690d0bd51bc 100644
--- a/drivers/media/rc/sunxi-cir.c
+++ b/drivers/media/rc/sunxi-cir.c
@@ -48,11 +48,11 @@
/* Rx Interrupt Enable */
#define SUNXI_IR_RXINT_REG 0x2C
-/* Rx FIFO Overflow */
+/* Rx FIFO Overflow Interrupt Enable */
#define REG_RXINT_ROI_EN BIT(0)
-/* Rx Packet End */
+/* Rx Packet End Interrupt Enable */
#define REG_RXINT_RPEI_EN BIT(1)
-/* Rx FIFO Data Available */
+/* Rx FIFO Data Available Interrupt Enable */
#define REG_RXINT_RAI_EN BIT(4)
/* Rx FIFO available byte level */
@@ -60,6 +60,12 @@
/* Rx Interrupt Status */
#define SUNXI_IR_RXSTA_REG 0x30
+/* Rx FIFO Overflow */
+#define REG_RXSTA_ROI REG_RXINT_ROI_EN
+/* Rx Packet End */
+#define REG_RXSTA_RPE REG_RXINT_RPEI_EN
+/* Rx FIFO Data Available */
+#define REG_RXSTA_RA REG_RXINT_RAI_EN
/* RX FIFO Get Available Counter */
#define REG_RXSTA_GET_AC(val) (((val) >> 8) & (ir->fifo_size * 2 - 1))
/* Clear all interrupt status value */
@@ -119,7 +125,7 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
/* clean all pending statuses */
writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
- if (status & (REG_RXINT_RAI_EN | REG_RXINT_RPEI_EN)) {
+ if (status & (REG_RXSTA_RA | REG_RXSTA_RPE)) {
/* How many messages in fifo */
rc = REG_RXSTA_GET_AC(status);
/* Sanity check */
@@ -135,9 +141,9 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
}
}
- if (status & REG_RXINT_ROI_EN) {
+ if (status & REG_RXSTA_ROI) {
ir_raw_event_reset(ir->rc);
- } else if (status & REG_RXINT_RPEI_EN) {
+ } else if (status & REG_RXSTA_RPE) {
ir_raw_event_set_idle(ir->rc, true);
ir_raw_event_handle(ir->rc);
}
--
2.20.1
On Sat, Jun 08, 2019 at 01:10:51AM +0200, Cl?ment P?ron wrote:
> We are using RXINT bits definition when looking at RXSTA register.
>
> These bits are equal but it's not really proper.
>
> Introduce the RXSTA bits and use them to have coherency.
>
> Signed-off-by: Cl?ment P?ron <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Hi Sean,
You acked the whole v3 series but this patch has been introduced in v5
could you ack this one too?
Thanks,
Clément
On Mon, 10 Jun 2019 at 11:52, Maxime Ripard <[email protected]> wrote:
>
> On Sat, Jun 08, 2019 at 01:10:51AM +0200, Clément Péron wrote:
> > We are using RXINT bits definition when looking at RXSTA register.
> >
> > These bits are equal but it's not really proper.
> >
> > Introduce the RXSTA bits and use them to have coherency.
> >
> > Signed-off-by: Clément Péron <[email protected]>
>
> Acked-by: Maxime Ripard <[email protected]>
>
> Maxime
>
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
On Sun, Jul 14, 2019 at 04:32:22PM +0200, Cl?ment P?ron wrote:
> Hi Sean,
>
> You acked the whole v3 series but this patch has been introduced in v5
> could you ack this one too?
Acked-by: Sean Young <[email protected]>
Thanks
Sean
>
> Thanks,
> Cl?ment
>
>
>
>
> On Mon, 10 Jun 2019 at 11:52, Maxime Ripard <[email protected]> wrote:
> >
> > On Sat, Jun 08, 2019 at 01:10:51AM +0200, Cl?ment P?ron wrote:
> > > We are using RXINT bits definition when looking at RXSTA register.
> > >
> > > These bits are equal but it's not really proper.
> > >
> > > Introduce the RXSTA bits and use them to have coherency.
> > >
> > > Signed-off-by: Cl?ment P?ron <[email protected]>
> >
> > Acked-by: Maxime Ripard <[email protected]>
> >
> > Maxime
> >
> > --
> > Maxime Ripard, Bootlin
> > Embedded Linux and Kernel engineering
> > https://bootlin.com
Hi,
On Mon, Jul 15, 2019 at 01:12:45PM +0100, Sean Young wrote:
> On Sun, Jul 14, 2019 at 04:32:22PM +0200, Cl?ment P?ron wrote:
> > Hi Sean,
> >
> > You acked the whole v3 series but this patch has been introduced in v5
> > could you ack this one too?
>
> Acked-by: Sean Young <[email protected]>
So who's tree should this series go through? It seems mostly device tree.
Alternatively I'm happy to try it get merged via the media tree.
Thanks
Sean
Hi Sean,
On Tue, Jul 23, 2019 at 07:25:57AM +0100, Sean Young wrote:
> On Mon, Jul 15, 2019 at 01:12:45PM +0100, Sean Young wrote:
> > On Sun, Jul 14, 2019 at 04:32:22PM +0200, Cl?ment P?ron wrote:
> > > Hi Sean,
> > >
> > > You acked the whole v3 series but this patch has been introduced in v5
> > > could you ack this one too?
> >
> > Acked-by: Sean Young <[email protected]>
>
> So who's tree should this series go through? It seems mostly device tree.
> Alternatively I'm happy to try it get merged via the media tree.
Ideally the media bits should go through the media tree, the DT bits
will go through arm-soc
So you can apply the patches 1-4, 7 and 10, I'll apply the rest.
Does that work for you?
Thanks!
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Tue, Jul 23, 2019 at 09:04:40AM +0200, Maxime Ripard wrote:
> Hi Sean,
>
> On Tue, Jul 23, 2019 at 07:25:57AM +0100, Sean Young wrote:
> > On Mon, Jul 15, 2019 at 01:12:45PM +0100, Sean Young wrote:
> > > On Sun, Jul 14, 2019 at 04:32:22PM +0200, Cl?ment P?ron wrote:
> > > > Hi Sean,
> > > >
> > > > You acked the whole v3 series but this patch has been introduced in v5
> > > > could you ack this one too?
> > >
> > > Acked-by: Sean Young <[email protected]>
> >
> > So who's tree should this series go through? It seems mostly device tree.
> > Alternatively I'm happy to try it get merged via the media tree.
>
> Ideally the media bits should go through the media tree, the DT bits
> will go through arm-soc
>
> So you can apply the patches 1-4, 7 and 10, I'll apply the rest.
>
> Does that work for you?
Works for me, I'll add them to my next pull request to Mauro.
Thanks,
Sean
On Wed, Jul 24, 2019 at 06:39:37AM +0100, Sean Young wrote:
> On Tue, Jul 23, 2019 at 09:04:40AM +0200, Maxime Ripard wrote:
> > Hi Sean,
> >
> > On Tue, Jul 23, 2019 at 07:25:57AM +0100, Sean Young wrote:
> > > On Mon, Jul 15, 2019 at 01:12:45PM +0100, Sean Young wrote:
> > > > On Sun, Jul 14, 2019 at 04:32:22PM +0200, Cl?ment P?ron wrote:
> > > > > Hi Sean,
> > > > >
> > > > > You acked the whole v3 series but this patch has been introduced in v5
> > > > > could you ack this one too?
> > > >
> > > > Acked-by: Sean Young <[email protected]>
> > >
> > > So who's tree should this series go through? It seems mostly device tree.
> > > Alternatively I'm happy to try it get merged via the media tree.
> >
> > Ideally the media bits should go through the media tree, the DT bits
> > will go through arm-soc
> >
> > So you can apply the patches 1-4, 7 and 10, I'll apply the rest.
> >
> > Does that work for you?
>
> Works for me, I'll add them to my next pull request to Mauro.
Applied 5, 6, 8, 9 and 11 to 13.
Thanks!
Maxmie
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com