The RISC-V port has grown significantly over the past year. Paul's been
helping out for a while ago. We agreed in person that he'd take over
collecting the patches and submitting the PRs, but it looks like I
forgot to make it official.
Signed-off-by: Palmer Dabbelt <[email protected]>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d0ed735994a5..b54b23261cf5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13472,6 +13472,7 @@ F: drivers/mtd/nand/raw/r852.c
F: drivers/mtd/nand/raw/r852.h
RISC-V ARCHITECTURE
+M: Paul Walmsley <[email protected]>
M: Palmer Dabbelt <[email protected]>
M: Albert Ou <[email protected]>
L: [email protected]
--
2.21.0
> RISC-V ARCHITECTURE
> +M: Paul Walmsley <[email protected]>
> M: Palmer Dabbelt <[email protected]>
> M: Albert Ou <[email protected]>
Is Albert going to come back to actively maintain anything? I've
not actually seen him active ever since the port went mainline.
On Thu, 27 Jun 2019, Palmer Dabbelt wrote:
> The RISC-V port has grown significantly over the past year. Paul's been
> helping out for a while ago. We agreed in person that he'd take over
> collecting the patches and submitting the PRs, but it looks like I
> forgot to make it official.
>
> Signed-off-by: Palmer Dabbelt <[email protected]>
Thanks, queued for v5.3 through the RISC-V tree.
- Paul