So far SAI IPs integrated with imx6 only supported one data line.
Starting with imx7 and imx8 SAI integration support up to 8 data
lines and multiple ways of combining the fifos for each data line.
New SAI IP version introduces two new registers (Version and Parmeter
registers) which are placed at the beginning of register address space.
For this reason we need to fix the register's address.
Patches 1 and 2 from Lucas enhance per SOC handling of SAI properties.
Patches 3,4,5,6,7,8 allow SAI driver to read active data lines and
fifo combine mode from DT.
Patch 9 fixes new SAI register address space.
Patch 10 enable SAI for imx7ulp and imx8mq.
This patch introduces
Daniel Baluta (8):
ASoC: fsl_sai: Add registers definition for multiple datalines
ASoC: fsl_sai: Update Tx/Rx channel enable mask
ASoC: fsl_sai: Add support to enable multiple data lines
ASoC: dt-bindings: Document dl_mask property
ASoC: fsl_sai: Add support for FIFO combine mode
ASoC: dt-bindings: Document fcomb_mode property
ASoC: fsl_sai: Add support for SAI new version
ASoC: fsl_sai: Add support for imx7ulp/imx8mq
Lucas Stach (2):
ASoC: fsl_sai: add of_match data
ASoC: fsl_sai: derive TX FIFO watermark from FIFO depth
.../devicetree/bindings/sound/fsl-sai.txt | 9 +
sound/soc/fsl/fsl_sai.c | 393 +++++++++++++-----
sound/soc/fsl/fsl_sai.h | 98 +++--
3 files changed, 361 insertions(+), 139 deletions(-)
--
2.17.1
From: Lucas Stach <[email protected]>
The DMA request schould be triggered as soon as the FIFO has space
for another burst. As different versions of the SAI block have
different FIFO sizes, the watrmark level needs to be derived from
version specific data.
Signed-off-by: Lucas Stach <[email protected]>
---
sound/soc/fsl/fsl_sai.c | 4 +++-
sound/soc/fsl/fsl_sai.h | 1 +
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index ed0432e7327a..1d1a447163e3 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -640,7 +640,7 @@ static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
regmap_write(sai->regmap, FSL_SAI_RCSR, 0);
regmap_update_bits(sai->regmap, FSL_SAI_TCR1, FSL_SAI_CR1_RFW_MASK,
- FSL_SAI_MAXBURST_TX * 2);
+ sai->soc_data->fifo_depth - FSL_SAI_MAXBURST_TX);
regmap_update_bits(sai->regmap, FSL_SAI_RCR1, FSL_SAI_CR1_RFW_MASK,
FSL_SAI_MAXBURST_RX - 1);
@@ -913,10 +913,12 @@ static int fsl_sai_remove(struct platform_device *pdev)
static const struct fsl_sai_soc_data fsl_sai_vf610_data = {
.use_imx_pcm = false,
+ .fifo_depth = 32,
};
static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = {
.use_imx_pcm = true,
+ .fifo_depth = 32,
};
static const struct of_device_id fsl_sai_ids[] = {
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index 83e2bfe05b1b..7c1ef671da28 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -128,6 +128,7 @@
struct fsl_sai_soc_data {
bool use_imx_pcm;
+ unsigned int fifo_depth;
};
struct fsl_sai {
--
2.17.1
This allows combining multiple-data-line FIFOs into a
single-data-line FIFO.
Signed-off-by: Daniel Baluta <[email protected]>
---
Documentation/devicetree/bindings/sound/fsl-sai.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
index 59f4d965a5fb..ca27afd840ba 100644
--- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
+++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
@@ -54,6 +54,10 @@ Optional properties:
represents first data line, bit 1 represents second
data line and so on. Data line is enabled if
corresponding bit is set to 1.
+ - fsl,fcomb_mode : list of two integers (first for RX, second for TX)
+ representing FIFO combine mode. Possible values for
+ combined mode are: 0 - disabled, 1 - Rx/Tx from shift
+ registers, 2 - Rx/Tx by software, 3 - both.
Optional properties (for mx6ul):
--
2.17.1
SAI supports up to 8 data lines. This property let the user
configure how many data lines should be used per transfer
direction (Tx/Rx).
Signed-off-by: Daniel Baluta <[email protected]>
---
Documentation/devicetree/bindings/sound/fsl-sai.txt | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
index 2e726b983845..59f4d965a5fb 100644
--- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
+++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
@@ -49,6 +49,11 @@ Optional properties:
- big-endian : Boolean property, required if all the SAI
registers are big-endian rather than little-endian.
+ - fsl,dl_mask : list of two integers (bitmask, first for RX, second
+ for TX) representing enabled datalines. Bit 0
+ represents first data line, bit 1 represents second
+ data line and so on. Data line is enabled if
+ corresponding bit is set to 1.
Optional properties (for mx6ul):
--
2.17.1
Tx channel enable (TCE) / Rx channel enable (RCE) bits
enable corresponding data channel for Tx/Rx operation.
Because SAI supports up the 8 channels TCE/RCE occupy
up the 8 bits inside TCR3/RCR3 registers we need to extend
the mask to reflect this.
Signed-off-by: Daniel Baluta <[email protected]>
---
sound/soc/fsl/fsl_sai.c | 6 ++++--
sound/soc/fsl/fsl_sai.h | 1 +
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 7f8823fe4b90..768341608695 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -599,7 +599,8 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream,
bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
int ret;
- regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE,
+ regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx),
+ FSL_SAI_CR3_TRCE_MASK,
FSL_SAI_CR3_TRCE);
ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
@@ -614,7 +615,8 @@ static void fsl_sai_shutdown(struct snd_pcm_substream *substream,
struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
- regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE, 0);
+ regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx),
+ FSL_SAI_CR3_TRCE_MASK, 0);
}
static const struct snd_soc_dai_ops fsl_sai_pcm_dai_ops = {
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index 4bb478041d67..b1abeed2f78e 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -110,6 +110,7 @@
/* SAI Transmit and Receive Configuration 3 Register */
#define FSL_SAI_CR3_TRCE BIT(16)
+#define FSL_SAI_CR3_TRCE_MASK GENMASK(16, 23)
#define FSL_SAI_CR3_WDFL(x) (x)
#define FSL_SAI_CR3_WDFL_MASK 0x1f
--
2.17.1
Am Montag, den 22.07.2019, 15:48 +0300 schrieb Daniel Baluta:
> SAI supports up to 8 data lines. This property let the user
> configure how many data lines should be used per transfer
> direction (Tx/Rx).
>
> > Signed-off-by: Daniel Baluta <[email protected]>
> ---
> Documentation/devicetree/bindings/sound/fsl-sai.txt | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> index 2e726b983845..59f4d965a5fb 100644
> --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
> +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> @@ -49,6 +49,11 @@ Optional properties:
>
> > - big-endian : Boolean property, required if all the SAI
> > registers are big-endian rather than little-endian.
> > + - fsl,dl_mask : list of two integers (bitmask, first for RX, second
> > + for TX) representing enabled datalines. Bit 0
> > + represents first data line, bit 1 represents second
> > + data line and so on. Data line is enabled if
> > + corresponding bit is set to 1.
No underscores in property names, please. Also this should document the
default value used by the driver when the property is absent.
Regards,
Lucas
On Mon, Jul 22, 2019 at 03:48:31PM +0300, Daniel Baluta wrote:
> This allows combining multiple-data-line FIFOs into a
> single-data-line FIFO.
>
> Signed-off-by: Daniel Baluta <[email protected]>
> ---
> Documentation/devicetree/bindings/sound/fsl-sai.txt | 4 ++++
This should be sent to devicetree mail-list also.
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> index 59f4d965a5fb..ca27afd840ba 100644
> --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
> +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> @@ -54,6 +54,10 @@ Optional properties:
> represents first data line, bit 1 represents second
> data line and so on. Data line is enabled if
> corresponding bit is set to 1.
> + - fsl,fcomb_mode : list of two integers (first for RX, second for TX)
> + representing FIFO combine mode. Possible values for
> + combined mode are: 0 - disabled, 1 - Rx/Tx from shift
> + registers, 2 - Rx/Tx by software, 3 - both.
Looks like a software configuration to me, instead of a device
property. Is this configurable by user case, or hard-coded by
SoC/hardware design?
On Mon, Jul 22, 2019 at 03:48:29PM +0300, Daniel Baluta wrote:
> SAI supports up to 8 data lines. This property let the user
> configure how many data lines should be used per transfer
> direction (Tx/Rx).
>
> Signed-off-by: Daniel Baluta <[email protected]>
> ---
> Documentation/devicetree/bindings/sound/fsl-sai.txt | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> index 2e726b983845..59f4d965a5fb 100644
> --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
> +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> @@ -49,6 +49,11 @@ Optional properties:
> + - fsl,dl_mask : list of two integers (bitmask, first for RX, second
Not quite in favor of the naming here; And this patch should
be sent to the devicetree maillist and add DT maintainers --
they would give some good naming advice.
From my point of view, I feel, since data lines are enabled
consecutively, probably it'd be clear just to have something
like "fsl,num-datalines = <2 2>", corresponding to "dl_mask
= <0x3 0x3>". I believe there're examples in the existing DT
bindings, so let's see how others suggest.
> + for TX) representing enabled datalines. Bit 0
> + represents first data line, bit 1 represents second
> + data line and so on. Data line is enabled if
> + corresponding bit is set to 1.
Would be better to mention: "as a default use case, if this
property is absent, only the first data line will be enabled
for both TX and RX", since it's an optional property.
And one more extension(?) of it could be what if there's no
data line being physically connected for one direction, for
example "dl_mask = <0x0 0x1>", indicating that SAI enables
one single TX line only, so driver would disable RX feature.
What do you think?
On Thu, Jul 25, 2019 at 2:22 AM Nicolin Chen <[email protected]> wrote:
>
> On Mon, Jul 22, 2019 at 03:48:31PM +0300, Daniel Baluta wrote:
> > This allows combining multiple-data-line FIFOs into a
> > single-data-line FIFO.
> >
> > Signed-off-by: Daniel Baluta <[email protected]>
> > ---
> > Documentation/devicetree/bindings/sound/fsl-sai.txt | 4 ++++
>
> This should be sent to devicetree mail-list also.
>
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > index 59f4d965a5fb..ca27afd840ba 100644
> > --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > @@ -54,6 +54,10 @@ Optional properties:
> > represents first data line, bit 1 represents second
> > data line and so on. Data line is enabled if
> > corresponding bit is set to 1.
> > + - fsl,fcomb_mode : list of two integers (first for RX, second for TX)
> > + representing FIFO combine mode. Possible values for
> > + combined mode are: 0 - disabled, 1 - Rx/Tx from shift
> > + registers, 2 - Rx/Tx by software, 3 - both.
>
> Looks like a software configuration to me, instead of a device
> property. Is this configurable by user case, or hard-coded by
> SoC/hardware design?
Indeed this is a software configuration and configurable by user case.
Will think of a another way to specify it.
On Thu, Jul 25, 2019 at 2:14 AM Nicolin Chen <[email protected]> wrote:
>
> On Mon, Jul 22, 2019 at 03:48:29PM +0300, Daniel Baluta wrote:
> > SAI supports up to 8 data lines. This property let the user
> > configure how many data lines should be used per transfer
> > direction (Tx/Rx).
> >
> > Signed-off-by: Daniel Baluta <[email protected]>
> > ---
> > Documentation/devicetree/bindings/sound/fsl-sai.txt | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > index 2e726b983845..59f4d965a5fb 100644
> > --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > @@ -49,6 +49,11 @@ Optional properties:
>
> > + - fsl,dl_mask : list of two integers (bitmask, first for RX, second
>
> Not quite in favor of the naming here; And this patch should
> be sent to the devicetree maillist and add DT maintainers --
> they would give some good naming advice.
>
> From my point of view, I feel, since data lines are enabled
> consecutively, probably it'd be clear just to have something
> like "fsl,num-datalines = <2 2>", corresponding to "dl_mask
> = <0x3 0x3>". I believe there're examples in the existing DT
> bindings, so let's see how others suggest.
>
Your suggestion looks good to me. Anyhow, after reading again the
documentation it seems that datalines are not always required to
be consecutive.
The need to be consecutive only when FIFO combine mode is enabled.
Will fix the documentation in the next version.
On Thu, Jul 25, 2019 at 09:02:22AM +0300, Daniel Baluta wrote:
> On Thu, Jul 25, 2019 at 2:22 AM Nicolin Chen <[email protected]> wrote:
> >
> > On Mon, Jul 22, 2019 at 03:48:31PM +0300, Daniel Baluta wrote:
> > > This allows combining multiple-data-line FIFOs into a
> > > single-data-line FIFO.
> > >
> > > Signed-off-by: Daniel Baluta <[email protected]>
> > > ---
> > > Documentation/devicetree/bindings/sound/fsl-sai.txt | 4 ++++
> >
> > This should be sent to devicetree mail-list also.
> >
> > > 1 file changed, 4 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > > index 59f4d965a5fb..ca27afd840ba 100644
> > > --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > > +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
> > > @@ -54,6 +54,10 @@ Optional properties:
> > > represents first data line, bit 1 represents second
> > > data line and so on. Data line is enabled if
> > > corresponding bit is set to 1.
> > > + - fsl,fcomb_mode : list of two integers (first for RX, second for TX)
> > > + representing FIFO combine mode. Possible values for
> > > + combined mode are: 0 - disabled, 1 - Rx/Tx from shift
> > > + registers, 2 - Rx/Tx by software, 3 - both.
> >
> > Looks like a software configuration to me, instead of a device
> > property. Is this configurable by user case, or hard-coded by
> > SoC/hardware design?
>
> Indeed this is a software configuration and configurable by user case.
> Will think of a another way to specify it.
Yea, it needs to be put somewhere else other than devicetree.
Not sure sysfs is a good approach for ASoC components or can
be done via amixer control.