This patch series adds device-tree nodes for i2c nodes in the H6 dtsi,
and enables it for the Pine H64.
Bhushan Shah (2):
arm64: allwinner: h6: add I2C nodes
arm64: allwinner: h6: enable i2c0 in PineH64
.../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 4 ++
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 54 +++++++++++++++++++
2 files changed, 58 insertions(+)
--
2.17.1
Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl
nodes.
Suggested-by: Icenowy Zheng <[email protected]>
Signed-off-by: Bhushan Shah <[email protected]>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 54 ++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index bcecca17d61d..1d9ad3ec0b65 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -329,6 +329,21 @@
function = "hdmi";
};
+ i2c0_pins: i2c0-pins {
+ pins = "PD25", "PD26";
+ function = "i2c0";
+ };
+
+ i2c1_pins: i2c1-pins {
+ pins = "PH5", "PH6";
+ function = "i2c1";
+ };
+
+ i2c2_pins: i2c2-pins {
+ pins = "PD23", "PD24";
+ function = "i2c2";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@@ -464,6 +479,45 @@
status = "disabled";
};
+ i2c0: i2c@5002000 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x05002000 0x400>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C0>;
+ resets = <&ccu RST_BUS_I2C0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c1: i2c@5002400 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x05002400 0x400>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C1>;
+ resets = <&ccu RST_BUS_I2C1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c2: i2c@5002800 {
+ compatible = "allwinner,sun6i-a31-i2c";
+ reg = <0x05002800 0x400>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C2>;
+ resets = <&ccu RST_BUS_I2C2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
emac: ethernet@5020000 {
compatible = "allwinner,sun50i-h6-emac",
"allwinner,sun50i-a64-emac";
--
2.17.1
i2c0 bus is exposed by PI-2 BUS in the PineH64, model B.
Signed-off-by: Bhushan Shah <[email protected]>
---
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index 684d1daa3081..a184361bc10d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -160,6 +160,14 @@
vcc-pg-supply = <®_aldo1>;
};
+&i2c0 {
+ status = "okay";
+};
+
+&i2c0_pins {
+ bias-pull-up;
+};
+
&r_i2c {
status = "okay";
--
2.17.1
On Sun, Aug 11, 2019 at 5:05 PM Bhushan Shah <[email protected]> wrote:
>
> Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl
> nodes.
>
> Suggested-by: Icenowy Zheng <[email protected]>
> Signed-off-by: Bhushan Shah <[email protected]>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 54 ++++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index bcecca17d61d..1d9ad3ec0b65 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -329,6 +329,21 @@
> function = "hdmi";
> };
>
> + i2c0_pins: i2c0-pins {
> + pins = "PD25", "PD26";
> + function = "i2c0";
> + };
> +
> + i2c1_pins: i2c1-pins {
> + pins = "PH5", "PH6";
> + function = "i2c1";
> + };
> +
> + i2c2_pins: i2c2-pins {
> + pins = "PD23", "PD24";
> + function = "i2c2";
> + };
> +
> mmc0_pins: mmc0-pins {
> pins = "PF0", "PF1", "PF2", "PF3",
> "PF4", "PF5";
> @@ -464,6 +479,45 @@
> status = "disabled";
> };
>
> + i2c0: i2c@5002000 {
> + compatible = "allwinner,sun6i-a31-i2c";
Please add an soc-specific compatible string, like "allwinner,sun50i-h6-i2c".
This is a last-resort way out in case the hardware isn't so compatible with
the A31.
You'll also need to update the bindings in
Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
The file also shows that we do this for other chips, such as the A23,
A64 and A83T.
ChenYu
> + reg = <0x05002000 0x400>;
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_I2C0>;
> + resets = <&ccu RST_BUS_I2C0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c0_pins>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + i2c1: i2c@5002400 {
> + compatible = "allwinner,sun6i-a31-i2c";
> + reg = <0x05002400 0x400>;
> + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_I2C1>;
> + resets = <&ccu RST_BUS_I2C1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c1_pins>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + i2c2: i2c@5002800 {
> + compatible = "allwinner,sun6i-a31-i2c";
> + reg = <0x05002800 0x400>;
> + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_I2C2>;
> + resets = <&ccu RST_BUS_I2C2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_pins>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> emac: ethernet@5020000 {
> compatible = "allwinner,sun50i-h6-emac",
> "allwinner,sun50i-a64-emac";
> --
> 2.17.1
>
On Sun, Aug 11, 2019 at 5:05 PM Bhushan Shah <[email protected]> wrote:
>
> i2c0 bus is exposed by PI-2 BUS in the PineH64, model B.
>
> Signed-off-by: Bhushan Shah <[email protected]>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> index 684d1daa3081..a184361bc10d 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> @@ -160,6 +160,14 @@
> vcc-pg-supply = <®_aldo1>;
> };
>
> +&i2c0 {
> + status = "okay";
We don't enable interfaces that are exposed on the extension headers
by default. Instead we let the users enable it themselves, by modifying
the device tree either with overlays or through U-boot commands.
Please set this to "disabled", and add a comment mentioning that it is
on the PI-2 BUS. Having it explicitly listed in the source serves as a
pointer to people looking at how to enable stuff.
ChenYu
> +};
> +
> +&i2c0_pins {
> + bias-pull-up;
> +};
> +
> &r_i2c {
> status = "okay";
>
> --
> 2.17.1
>
This patch series adds device-tree nodes for i2c nodes in the H6 dtsi,
and enables it for the Pine H64.
Changes in v2:
- Add the SoC specific compatible string instead of re-using a31 one.
- Don't enable the i2c0 node in PineH64 by default
Bhushan Shah (3):
dt-bindings: i2c: mv64xxx: Add compatible for the H6 i2c node.
arm64: allwinner: h6: add I2C nodes
arm64: allwinner: h6: add i2c0 node in PineH64
.../bindings/i2c/marvell,mv64xxx-i2c.yaml | 3 +
.../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 9 +++
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 ++++++++++++++++++-
3 files changed, 67 insertions(+), 1 deletion(-)
--
2.17.1
i2c0 bus is exposed by PI-2 BUS in the PineH64, model B.
Signed-off-by: Bhushan Shah <[email protected]>
---
Changes in v2:
- Don't enable the i2c0 node in PineH64 by default
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index 684d1daa3081..97d9b7c63fb3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -160,6 +160,15 @@
vcc-pg-supply = <®_aldo1>;
};
+/* This i2c interface is exposed on PI-2 BUS, Pin 3 (I2C_SDA) and 5 (I2C_SCL) */
+&i2c0 {
+ status = "disabled";
+};
+
+&i2c0_pins {
+ bias-pull-up;
+};
+
&r_i2c {
status = "okay";
--
2.17.1
Allwinner H6 have a mv64xxx i2c interface available to be used.
Signed-off-by: Bhushan Shah <[email protected]>
---
Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
index 001f2b7abad0..c779000515d6 100644
--- a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
@@ -26,6 +26,9 @@ properties:
- items:
- const: allwinner,sun50i-a64-i2c
- const: allwinner,sun6i-a31-i2c
+ - items:
+ - const: allwinner,sun50i-h6-i2c
+ - const: allwinner,sun6i-a31-i2c
- const: marvell,mv64xxx-i2c
- const: marvell,mv78230-i2c
--
2.17.1
Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl
nodes.
Suggested-by: Icenowy Zheng <[email protected]>
Signed-off-by: Bhushan Shah <[email protected]>
---
Changes in v2:
- Add the SoC specific compatible string instead of re-using a31 one.
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 +++++++++++++++++++-
1 file changed, 55 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index bcecca17d61d..a1a329926540 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -329,6 +329,21 @@
function = "hdmi";
};
+ i2c0_pins: i2c0-pins {
+ pins = "PD25", "PD26";
+ function = "i2c0";
+ };
+
+ i2c1_pins: i2c1-pins {
+ pins = "PH5", "PH6";
+ function = "i2c1";
+ };
+
+ i2c2_pins: i2c2-pins {
+ pins = "PD23", "PD24";
+ function = "i2c2";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@@ -464,6 +479,45 @@
status = "disabled";
};
+ i2c0: i2c@5002000 {
+ compatible = "allwinner,sun50i-h6-i2c";
+ reg = <0x05002000 0x400>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C0>;
+ resets = <&ccu RST_BUS_I2C0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c1: i2c@5002400 {
+ compatible = "allwinner,sun50i-h6-i2c";
+ reg = <0x05002400 0x400>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C1>;
+ resets = <&ccu RST_BUS_I2C1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c2: i2c@5002800 {
+ compatible = "allwinner,sun50i-h6-i2c";
+ reg = <0x05002800 0x400>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C2>;
+ resets = <&ccu RST_BUS_I2C2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
emac: ethernet@5020000 {
compatible = "allwinner,sun50i-h6-emac",
"allwinner,sun50i-a64-emac";
@@ -795,7 +849,7 @@
};
r_i2c: i2c@7081400 {
- compatible = "allwinner,sun6i-a31-i2c";
+ compatible = "allwinner,sun50i-h6-i2c";
reg = <0x07081400 0x400>;
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_R_APB2_I2C>;
--
2.17.1
On Fri, Aug 16, 2019 at 12:17:09PM +0530, Bhushan Shah wrote:
> Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl
> nodes.
>
> Suggested-by: Icenowy Zheng <[email protected]>
> Signed-off-by: Bhushan Shah <[email protected]>
> ---
> Changes in v2:
> - Add the SoC specific compatible string instead of re-using a31 one.
>
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 +++++++++++++++++++-
> 1 file changed, 55 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index bcecca17d61d..a1a329926540 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -329,6 +329,21 @@
> function = "hdmi";
> };
>
> + i2c0_pins: i2c0-pins {
> + pins = "PD25", "PD26";
> + function = "i2c0";
> + };
> +
> + i2c1_pins: i2c1-pins {
> + pins = "PH5", "PH6";
> + function = "i2c1";
> + };
> +
> + i2c2_pins: i2c2-pins {
> + pins = "PD23", "PD24";
> + function = "i2c2";
> + };
> +
> mmc0_pins: mmc0-pins {
> pins = "PF0", "PF1", "PF2", "PF3",
> "PF4", "PF5";
> @@ -464,6 +479,45 @@
> status = "disabled";
> };
>
> + i2c0: i2c@5002000 {
> + compatible = "allwinner,sun50i-h6-i2c";
This isn't going to work if you don't patch the driver to add the
compatible. And this isn't what you described in the binding patch.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
65;5603;1c
On Fri, Aug 16, 2019 at 12:17:10PM +0530, Bhushan Shah wrote:
> i2c0 bus is exposed by PI-2 BUS in the PineH64, model B.
>
> Signed-off-by: Bhushan Shah <[email protected]>
> ---
> Changes in v2:
> - Don't enable the i2c0 node in PineH64 by default
>
> arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> index 684d1daa3081..97d9b7c63fb3 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
> @@ -160,6 +160,15 @@
> vcc-pg-supply = <®_aldo1>;
> };
>
> +/* This i2c interface is exposed on PI-2 BUS, Pin 3 (I2C_SDA) and 5 (I2C_SCL) */
> +&i2c0 {
> + status = "disabled";
> +};
This property is set to disabled in the DTSI already
> +&i2c0_pins {
> + bias-pull-up;
> +};
> +
And this should be in the same overlay than the one that sets status
to okay.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Fri, Aug 16, 2019 at 09:52:11AM +0200, Maxime Ripard wrote:
> > +/* This i2c interface is exposed on PI-2 BUS, Pin 3 (I2C_SDA) and 5 (I2C_SCL) */
> > +&i2c0 {
> > + status = "disabled";
> > +};
>
> This property is set to disabled in the DTSI already
I added this node here with disabled status due to comment from wens in
previous revision, main reason being that serves as reference/pointer to
people looking at how to enable i2c0.
I can remove it if you prefer.
--
Bhushan Shah
http://blog.bshah.in
IRC Nick : bshah on Freenode
GPG key fingerprint : 0AAC 775B B643 7A8D 9AF7 A3AC FE07 8411 7FBC E11D
On Fri, Aug 16, 2019 at 09:50:31AM +0200, Maxime Ripard wrote:
> On Fri, Aug 16, 2019 at 12:17:09PM +0530, Bhushan Shah wrote:
> > Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl
> > nodes.
> >
> > Suggested-by: Icenowy Zheng <[email protected]>
> > Signed-off-by: Bhushan Shah <[email protected]>
> > ---
> > Changes in v2:
> > - Add the SoC specific compatible string instead of re-using a31 one.
> >
> > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 +++++++++++++++++++-
> > 1 file changed, 55 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > index bcecca17d61d..a1a329926540 100644
> > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > @@ -329,6 +329,21 @@
> > function = "hdmi";
> > };
> >
> > + i2c0_pins: i2c0-pins {
> > + pins = "PD25", "PD26";
> > + function = "i2c0";
> > + };
> > +
> > + i2c1_pins: i2c1-pins {
> > + pins = "PH5", "PH6";
> > + function = "i2c1";
> > + };
> > +
> > + i2c2_pins: i2c2-pins {
> > + pins = "PD23", "PD24";
> > + function = "i2c2";
> > + };
> > +
> > mmc0_pins: mmc0-pins {
> > pins = "PF0", "PF1", "PF2", "PF3",
> > "PF4", "PF5";
> > @@ -464,6 +479,45 @@
> > status = "disabled";
> > };
> >
> > + i2c0: i2c@5002000 {
> > + compatible = "allwinner,sun50i-h6-i2c";
>
> This isn't going to work if you don't patch the driver to add the
> compatible. And this isn't what you described in the binding patch.
oops, I will correct this in next patch series. Sorry.
>
> Maxime
>
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
--
Bhushan Shah
http://blog.bshah.in
IRC Nick : bshah on Freenode
GPG key fingerprint : 0AAC 775B B643 7A8D 9AF7 A3AC FE07 8411 7FBC E11D
This patch series adds device-tree nodes for i2c nodes in the H6 dtsi,
and enables it for the Pine H64.
Changes in v2:
- Add the SoC specific compatible string instead of re-using a31 one.
- Don't enable the i2c0 node in PineH64 by default
Changes in v3:
- Fix compatible for i2c in sun50i-h6.dtsi
- drop changes in the PineH64 dts completely
Bhushan Shah (2):
dt-bindings: i2c: mv64xxx: Add compatible for the H6 i2c node.
arm64: allwinner: h6: add I2C nodes
.../bindings/i2c/marvell,mv64xxx-i2c.yaml | 3 +
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 60 ++++++++++++++++++-
2 files changed, 62 insertions(+), 1 deletion(-)
--
2.17.1
Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl
nodes.
Suggested-by: Icenowy Zheng <[email protected]>
Signed-off-by: Bhushan Shah <[email protected]>
---
Changes in v3:
- fix compatible for the i2c
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 60 +++++++++++++++++++-
1 file changed, 59 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index db71807255ef..5dc174715311 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -332,6 +332,21 @@
function = "hdmi";
};
+ i2c0_pins: i2c0-pins {
+ pins = "PD25", "PD26";
+ function = "i2c0";
+ };
+
+ i2c1_pins: i2c1-pins {
+ pins = "PH5", "PH6";
+ function = "i2c1";
+ };
+
+ i2c2_pins: i2c2-pins {
+ pins = "PD23", "PD24";
+ function = "i2c2";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@@ -467,6 +482,48 @@
status = "disabled";
};
+ i2c0: i2c@5002000 {
+ compatible = "allwinner,sun50i-h6-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x05002000 0x400>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C0>;
+ resets = <&ccu RST_BUS_I2C0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c1: i2c@5002400 {
+ compatible = "allwinner,sun50i-h6-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x05002400 0x400>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C1>;
+ resets = <&ccu RST_BUS_I2C1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c2: i2c@5002800 {
+ compatible = "allwinner,sun50i-h6-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x05002800 0x400>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C2>;
+ resets = <&ccu RST_BUS_I2C2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
emac: ethernet@5020000 {
compatible = "allwinner,sun50i-h6-emac",
"allwinner,sun50i-a64-emac";
@@ -798,7 +855,8 @@
};
r_i2c: i2c@7081400 {
- compatible = "allwinner,sun6i-a31-i2c";
+ compatible = "allwinner,sun50i-h6-i2c",
+ "allwinner,sun6i-a31-i2c";
reg = <0x07081400 0x400>;
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_R_APB2_I2C>;
--
2.17.1
Allwinner H6 have a mv64xxx i2c interface available to be used.
Signed-off-by: Bhushan Shah <[email protected]>
---
Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
index 001f2b7abad0..c779000515d6 100644
--- a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
@@ -26,6 +26,9 @@ properties:
- items:
- const: allwinner,sun50i-a64-i2c
- const: allwinner,sun6i-a31-i2c
+ - items:
+ - const: allwinner,sun50i-h6-i2c
+ - const: allwinner,sun6i-a31-i2c
- const: marvell,mv64xxx-i2c
- const: marvell,mv78230-i2c
--
2.17.1
On Fri, Aug 16, 2019 at 02:13:09PM +0530, Bhushan Shah wrote:
> Add device-tree nodes for i2c0 to i2c2, and also add relevant pinctrl
> nodes.
>
> Suggested-by: Icenowy Zheng <[email protected]>
> Signed-off-by: Bhushan Shah <[email protected]>
Applied both, thanks!
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Fri, Aug 16, 2019 at 2:44 AM Bhushan Shah <[email protected]> wrote:
>
> Allwinner H6 have a mv64xxx i2c interface available to be used.
>
> Signed-off-by: Bhushan Shah <[email protected]>
> ---
>
> Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml | 3 +++
> 1 file changed, 3 insertions(+)
Reviewed-by: Rob Herring <[email protected]>