This patchset introduces a new "Everything-Else Power Domain Controller"
designed to handle all the different non-Always On peripherals like :
- VPU
- Ethernet Memories
- USB, PCIe, Audio, NNA on SM1
The current "gx-vpu-pwrc" process has been integrated to support the VPU
and the other power domains in a single driver.
Support for SoC domains has been made generic and easily extendable.
In order to restart from clean architecture :
- the PWRC node has been moved into the HHI simple-mfd, this suits much
better than beeing in the AO RTI simple-mfd
- a brand new yaml bindings schemas has been written
- reset-names has been added to clarify which resets are needed, so we can
dispatch them to domains
For G12A, the PWRC now offers support for the ethmac memory power domain.
For SM1, it also offers support for PCIe, USB, NNA, ethmac and Audio power
domains.
The DOS domains has been excluded for now, but can be added very easily.
GX hasn't been integrated for now, but it would follow the same scheme
as G12A support.
Neil Armstrong (5):
dt-bindings: power: add Amlogic Everything-Else power domains bindings
soc: amlogic: Add support for Everything-Else power domains controller
arm64: meson-g12: add Everything-Else power domain controller
arm64: dts: meson-sm1-sei610: add HDMI display support
arm64: dts: meson-sm1-sei610: add USB support
.../bindings/power/amlogic,meson-ee-pwrc.yaml | 93 +++
.../boot/dts/amlogic/meson-g12-common.dtsi | 92 +--
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 9 +
arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 9 +
.../boot/dts/amlogic/meson-sm1-sei610.dts | 28 +
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 15 +-
drivers/soc/amlogic/Kconfig | 11 +
drivers/soc/amlogic/Makefile | 1 +
drivers/soc/amlogic/meson-ee-pwrc.c | 560 ++++++++++++++++++
include/dt-bindings/power/meson-g12a-power.h | 13 +
include/dt-bindings/power/meson-sm1-power.h | 18 +
11 files changed, 801 insertions(+), 48 deletions(-)
create mode 100644 Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml
create mode 100644 drivers/soc/amlogic/meson-ee-pwrc.c
create mode 100644 include/dt-bindings/power/meson-g12a-power.h
create mode 100644 include/dt-bindings/power/meson-sm1-power.h
--
2.22.0
Replace the VPU-centric power domain controller by the generic system-wide
Everything-Else power domain controller and setup the right power-domains
properties on the VPU, Ethernet & USB nodes.
Signed-off-by: Neil Armstrong <[email protected]>
---
.../boot/dts/amlogic/meson-g12-common.dtsi | 92 ++++++++++---------
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 9 ++
arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 9 ++
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 15 ++-
4 files changed, 77 insertions(+), 48 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index a921d6334e5b..8baa6318f180 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -1426,6 +1426,53 @@
clocks = <&xtal>;
clock-names = "xtal";
};
+
+ pwrc: power-controller {
+ compatible = "amlogic,meson-g12a-pwrc";
+ #power-domain-cells = <1>;
+ amlogic,ao-sysctrl = <&rti>;
+ resets = <&reset RESET_VIU>,
+ <&reset RESET_VENC>,
+ <&reset RESET_VCBUS>,
+ <&reset RESET_BT656>,
+ <&reset RESET_RDMA>,
+ <&reset RESET_VENCI>,
+ <&reset RESET_VENCP>,
+ <&reset RESET_VDAC>,
+ <&reset RESET_VDI6>,
+ <&reset RESET_VENCL>,
+ <&reset RESET_VID_LOCK>;
+ reset-names = "viu", "venc", "vcbus", "bt656",
+ "rdma", "venci", "vencp", "vdac",
+ "vdi6", "vencl", "vid_lock";
+ clocks = <&clkc CLKID_VPU>,
+ <&clkc CLKID_VAPB>;
+ clock-names = "vpu", "vapb";
+ /*
+ * VPU clocking is provided by two identical clock paths
+ * VPU_0 and VPU_1 muxed to a single clock by a glitch
+ * free mux to safely change frequency while running.
+ * Same for VAPB but with a final gate after the glitch free mux.
+ */
+ assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
+ <&clkc CLKID_VPU_0>,
+ <&clkc CLKID_VPU>, /* Glitch free mux */
+ <&clkc CLKID_VAPB_0_SEL>,
+ <&clkc CLKID_VAPB_0>,
+ <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
+ assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
+ <0>, /* Do Nothing */
+ <&clkc CLKID_VPU_0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <0>, /* Do Nothing */
+ <&clkc CLKID_VAPB_0>;
+ assigned-clock-rates = <0>, /* Do Nothing */
+ <666666666>,
+ <0>, /* Do Nothing */
+ <0>, /* Do Nothing */
+ <250000000>,
+ <0>; /* Do Nothing */
+ };
};
};
@@ -1773,50 +1820,6 @@
clock-names = "xtal", "mpeg-clk";
};
- pwrc_vpu: power-controller-vpu {
- compatible = "amlogic,meson-g12a-pwrc-vpu";
- #power-domain-cells = <0>;
- amlogic,hhi-sysctrl = <&hhi>;
- resets = <&reset RESET_VIU>,
- <&reset RESET_VENC>,
- <&reset RESET_VCBUS>,
- <&reset RESET_BT656>,
- <&reset RESET_RDMA>,
- <&reset RESET_VENCI>,
- <&reset RESET_VENCP>,
- <&reset RESET_VDAC>,
- <&reset RESET_VDI6>,
- <&reset RESET_VENCL>,
- <&reset RESET_VID_LOCK>;
- clocks = <&clkc CLKID_VPU>,
- <&clkc CLKID_VAPB>;
- clock-names = "vpu", "vapb";
- /*
- * VPU clocking is provided by two identical clock paths
- * VPU_0 and VPU_1 muxed to a single clock by a glitch
- * free mux to safely change frequency while running.
- * Same for VAPB but with a final gate after the glitch free mux.
- */
- assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_VPU>, /* Glitch free mux */
- <&clkc CLKID_VAPB_0_SEL>,
- <&clkc CLKID_VAPB_0>,
- <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
- assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_FCLK_DIV4>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VAPB_0>;
- assigned-clock-rates = <0>, /* Do Nothing */
- <666666666>,
- <0>, /* Do Nothing */
- <0>, /* Do Nothing */
- <250000000>,
- <0>; /* Do Nothing */
- };
-
ao_pinctrl: pinctrl@14 {
compatible = "amlogic,meson-g12a-aobus-pinctrl";
#address-cells = <2>;
@@ -2169,7 +2172,6 @@
#address-cells = <1>;
#size-cells = <0>;
amlogic,canvas = <&canvas>;
- power-domains = <&pwrc_vpu>;
/* CVBS VDAC output port */
cvbs_vdac_port: port@0 {
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
index 733a9d46fc4b..eb5d177d7a99 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
@@ -4,6 +4,7 @@
*/
#include "meson-g12-common.dtsi"
+#include <dt-bindings/power/meson-g12a-power.h>
/ {
compatible = "amlogic,g12a";
@@ -110,6 +111,14 @@
};
};
+ðmac {
+ power-domains = <&pwrc PWRC_G12A_ETH_ID>;
+};
+
+&vpu {
+ power-domains = <&pwrc PWRC_G12A_VPU_ID>;
+};
+
&sd_emmc_a {
amlogic,dram-access-quirk;
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
index d5edbc1a1991..5628ccd54531 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
@@ -5,6 +5,7 @@
*/
#include "meson-g12-common.dtsi"
+#include <dt-bindings/power/meson-g12a-power.h>
/ {
compatible = "amlogic,g12b";
@@ -101,6 +102,14 @@
compatible = "amlogic,g12b-clkc";
};
+ðmac {
+ power-domains = <&pwrc PWRC_G12A_ETH_ID>;
+};
+
+&vpu {
+ power-domains = <&pwrc PWRC_G12A_VPU_ID>;
+};
+
&sd_emmc_a {
amlogic,dram-access-quirk;
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
index e902d4f9165f..37064d7f66c1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
@@ -5,6 +5,7 @@
*/
#include "meson-g12-common.dtsi"
+#include <dt-bindings/power/meson-sm1-power.h>
/ {
compatible = "amlogic,sm1";
@@ -59,10 +60,18 @@
compatible = "amlogic,meson-sm1-clk-measure";
};
-&pwrc_vpu {
- status = "disabled";
+ðmac {
+ power-domains = <&pwrc PWRC_SM1_ETH_ID>;
+};
+
+&pwrc {
+ compatible = "amlogic,meson-sm1-pwrc";
};
&vpu {
- status = "disabled";
+ power-domains = <&pwrc PWRC_SM1_VPU_ID>;
+};
+
+&usb {
+ power-domains = <&pwrc PWRC_SM1_USB_ID>;
};
--
2.22.0