Convert Samsung Exynos Soc Multi Core Timer bindings to DT schema format
using json-schema.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Changes since v3:
1. Use interrupts-extended instead of interrupts-map.
Changes since v1:
1. Indent example with four spaces (more readable),
2. Rename nodes in example to timer,
3. Remove mct-map subnode.
---
.../bindings/timer/samsung,exynos4210-mct.txt | 88 ------------
.../timer/samsung,exynos4210-mct.yaml | 125 ++++++++++++++++++
2 files changed, 125 insertions(+), 88 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
deleted file mode 100644
index 8f78640ad64c..000000000000
--- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
+++ /dev/null
@@ -1,88 +0,0 @@
-Samsung's Multi Core Timer (MCT)
-
-The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
-global timer and CPU local timers. The global timer is a 64-bit free running
-up-counter and can generate 4 interrupts when the counter reaches one of the
-four preset counter values. The CPU local timers are 32-bit free running
-down-counters and generate an interrupt when the counter expires. There is
-one CPU local timer instantiated in MCT for every CPU in the system.
-
-Required properties:
-
-- compatible: should be "samsung,exynos4210-mct".
- (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct.
- (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct.
-
-- reg: base address of the mct controller and length of the address space
- it occupies.
-
-- interrupts: the list of interrupts generated by the controller. The following
- should be the order of the interrupts specified. The local timer interrupts
- should be specified after the four global timer interrupts have been
- specified.
-
- 0: Global Timer Interrupt 0
- 1: Global Timer Interrupt 1
- 2: Global Timer Interrupt 2
- 3: Global Timer Interrupt 3
- 4: Local Timer Interrupt 0
- 5: Local Timer Interrupt 1
- 6: ..
- 7: ..
- i: Local Timer Interrupt n
-
- For MCT block that uses a per-processor interrupt for local timers, such
- as ones compatible with "samsung,exynos4412-mct", only one local timer
- interrupt might be specified, meaning that all local timers use the same
- per processor interrupt.
-
-Example 1: In this example, the IP contains two local timers, using separate
- interrupts, so two local timer interrupts have been specified,
- in addition to four global timer interrupts.
-
- mct@10050000 {
- compatible = "samsung,exynos4210-mct";
- reg = <0x10050000 0x800>;
- interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
- <0 42 0>, <0 48 0>;
- };
-
-Example 2: In this example, the timer interrupts are connected to two separate
- interrupt controllers. Hence, an interrupt-map is created to map
- the interrupts to the respective interrupt controllers.
-
- mct@101c0000 {
- compatible = "samsung,exynos4210-mct";
- reg = <0x101C0000 0x800>;
- interrupt-parent = <&mct_map>;
- interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
-
- mct_map: mct-map {
- #interrupt-cells = <1>;
- #address-cells = <0>;
- #size-cells = <0>;
- interrupt-map = <0 &gic 0 57 0>,
- <1 &gic 0 69 0>,
- <2 &combiner 12 6>,
- <3 &combiner 12 7>,
- <4 &gic 0 42 0>,
- <5 &gic 0 48 0>;
- };
- };
-
-Example 3: In this example, the IP contains four local timers, but using
- a per-processor interrupt to handle them. Either all the local
- timer interrupts can be specified, with the same interrupt specifier
- value or just the first one.
-
- mct@10050000 {
- compatible = "samsung,exynos4412-mct";
- reg = <0x10050000 0x800>;
-
- /* Both ways are possible in this case. Either: */
- interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
- <0 42 0>;
- /* or: */
- interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
- <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
- };
diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
new file mode 100644
index 000000000000..bff3f54a398f
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
@@ -0,0 +1,125 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos SoC Multi Core Timer (MCT)
+
+maintainers:
+ - Krzysztof Kozlowski <[email protected]>
+
+description: |+
+ The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
+ global timer and CPU local timers. The global timer is a 64-bit free running
+ up-counter and can generate 4 interrupts when the counter reaches one of the
+ four preset counter values. The CPU local timers are 32-bit free running
+ down-counters and generate an interrupt when the counter expires. There is
+ one CPU local timer instantiated in MCT for every CPU in the system.
+
+properties:
+ compatible:
+ enum:
+ - samsung,exynos4210-mct
+ - samsung,exynos4412-mct
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ description: |
+ Interrupts should be put in specific order. This is, the local timer
+ interrupts should be specified after the four global timer interrupts
+ have been specified:
+ 0: Global Timer Interrupt 0
+ 1: Global Timer Interrupt 1
+ 2: Global Timer Interrupt 2
+ 3: Global Timer Interrupt 3
+ 4: Local Timer Interrupt 0
+ 5: Local Timer Interrupt 1
+ 6: ..
+ 7: ..
+ i: Local Timer Interrupt n
+ For MCT block that uses a per-processor interrupt for local timers, such
+ as ones compatible with "samsung,exynos4412-mct", only one local timer
+ interrupt might be specified, meaning that all local timers use the same
+ per processor interrupt.
+ minItems: 5 # 4 Global + 1 local
+ maxItems: 20 # 4 Global + 16 local
+
+ interrupts-extended:
+ description: |
+ If interrupts are coming from different controllers, this property
+ can be used instead of regular "interrupts" property.
+ The format is exactly the same as with "interrupts".
+ Interrupts should be put in specific order. This is, the local timer
+ minItems: 5 # 4 Global + 1 local
+ maxItems: 20 # 4 Global + 16 local
+
+required:
+ - compatible
+ - interrupts
+ - reg
+
+allOf:
+ - if:
+ not:
+ required:
+ - interrupts
+ then:
+ required:
+ - interrupts-extended
+
+examples:
+ - |
+ // In this example, the IP contains two local timers, using separate
+ // interrupts, so two local timer interrupts have been specified,
+ // in addition to four global timer interrupts.
+
+ timer@10050000 {
+ compatible = "samsung,exynos4210-mct";
+ reg = <0x10050000 0x800>;
+ interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
+ <0 42 0>, <0 48 0>;
+ };
+
+ - |
+ // In this example, the timer interrupts are connected to two separate
+ // interrupt controllers. Hence, an interrupts-extended is needed.
+
+ timer@101c0000 {
+ compatible = "samsung,exynos4210-mct";
+ reg = <0x101C0000 0x800>;
+ interrupts-extended = <&gic 0 57 0>,
+ <&gic 0 69 0>,
+ <&combiner 12 6>,
+ <&combiner 12 7>,
+ <&gic 0 42 0>,
+ <&gic 0 48 0>;
+ };
+
+ - |
+ // In this example, the IP contains four local timers, but using
+ // a per-processor interrupt to handle them. Only one first local
+ // interrupt is specified.
+
+ timer@10050000 {
+ compatible = "samsung,exynos4412-mct";
+ reg = <0x10050000 0x800>;
+
+ interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
+ <0 42 0>;
+ };
+
+ - |
+ // In this example, the IP contains four local timers, but using
+ // a per-processor interrupt to handle them. All the local timer
+ // interrupts are specified.
+
+ timer@10050000 {
+ compatible = "samsung,exynos4412-mct";
+ reg = <0x10050000 0x800>;
+
+ interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
+ <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
+ };
--
2.17.1
The device node name should reflect generic class of a device so rename
the Multi Core Timer node from "mct" to "timer". This will be also in
sync with upcoming DT schema. No functional change.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos3250.dtsi | 2 +-
arch/arm/boot/dts/exynos4210.dtsi | 2 +-
arch/arm/boot/dts/exynos4412.dtsi | 2 +-
arch/arm/boot/dts/exynos5250.dtsi | 2 +-
arch/arm/boot/dts/exynos5260.dtsi | 2 +-
arch/arm/boot/dts/exynos54xx.dtsi | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 784818490376..d122fb52d3d4 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -265,7 +265,7 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
- mct@10050000 {
+ timer@10050000 {
compatible = "samsung,exynos4210-mct";
reg = <0x10050000 0x800>;
interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index f220716239db..6d3f19562aab 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -106,7 +106,7 @@
arm,data-latency = <2 2 1>;
};
- mct: mct@10050000 {
+ mct: timer@10050000 {
compatible = "samsung,exynos4210-mct";
reg = <0x10050000 0x800>;
interrupt-parent = <&mct_map>;
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index d20db2dfe8e2..8b6d5875c75d 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -243,7 +243,7 @@
clock-names = "aclk200", "aclk400_mcuisp";
};
- mct@10050000 {
+ timer@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
interrupt-parent = <&mct_map>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index fc966c10cf49..7a01349317a3 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -233,7 +233,7 @@
power-domains = <&pd_mau>;
};
- mct@101c0000 {
+ timer@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101C0000 0x800>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
index 3581b57fbbf7..b0811dbbb362 100644
--- a/arch/arm/boot/dts/exynos5260.dtsi
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -180,7 +180,7 @@
reg = <0x10000000 0x100>;
};
- mct: mct@100b0000 {
+ mct: timer@100b0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x100B0000 0x1000>;
clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>;
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index 9c3b63b7cac6..247d23872384 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -64,7 +64,7 @@
};
};
- mct: mct@101c0000 {
+ mct: timer@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101c0000 0xb00>;
interrupt-parent = <&mct_map>;
--
2.17.1
Multi Core Timer node has interrupts routed to two different parents -
GIC and combiner. This was modeled with a interrupt-map within a
subnode but can be expressed in an easier and more common way, directly
in the node itself.
Tested on Odroid U3 (Exynos4412).
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Changes since v3:
1. Use interrupts-extended instead of interrupts-map.
---
arch/arm/boot/dts/exynos4412.dtsi | 19 +++++--------------
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 8b6d5875c75d..9b5fb4e54d7c 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -246,22 +246,13 @@
timer@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
- interrupt-parent = <&mct_map>;
- interrupts = <0>, <1>, <2>, <3>, <4>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
-
- mct_map: mct-map {
- #interrupt-cells = <1>;
- #address-cells = <0>;
- #size-cells = <0>;
- interrupt-map =
- <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
- <1 &combiner 12 5>,
- <2 &combiner 12 6>,
- <3 &combiner 12 7>,
- <4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
- };
+ interrupts-extended = <&gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
+ <&combiner 12 5>,
+ <&combiner 12 6>,
+ <&combiner 12 7>,
+ <&gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@10060000 {
--
2.17.1
Replace hard-coded number with appropriate define for GIC SPI or PPI
specifier in interrupt. This makes code easier to read. No expected
functionality change.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210.dtsi | 8 ++++----
arch/arm/boot/dts/exynos4412.dtsi | 4 ++--
arch/arm/boot/dts/exynos5250.dtsi | 4 ++--
arch/arm/boot/dts/exynos54xx.dtsi | 16 ++++++++--------
4 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 5fa33d43821e..aac3b7a20a37 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -111,12 +111,12 @@
reg = <0x10050000 0x800>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
- interrupts-extended = <&gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
- <&gic 0 69 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<&combiner 12 6>,
<&combiner 12 7>,
- <&gic 0 42 IRQ_TYPE_LEVEL_HIGH>,
- <&gic 0 48 IRQ_TYPE_LEVEL_HIGH>;
+ <&gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@10060000 {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 9b5fb4e54d7c..96a5ef3a2864 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -248,11 +248,11 @@
reg = <0x10050000 0x800>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
- interrupts-extended = <&gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<&combiner 12 5>,
<&combiner 12 6>,
<&combiner 12 7>,
- <&gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
+ <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@10060000 {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index a549eafd2c64..f01e3156191d 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -242,8 +242,8 @@
<&combiner 23 4>,
<&combiner 25 2>,
<&combiner 25 3>,
- <&gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
- <&gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
+ <&gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_0: pinctrl@11400000 {
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index aca1b4831e38..06ae40a2f1e9 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -71,14 +71,14 @@
<&combiner 23 4>,
<&combiner 25 2>,
<&combiner 25 3>,
- <&gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
- <&gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
- <&gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
- <&gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
- <&gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
- <&gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
- <&gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
- <&gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
+ <&gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@101d0000 {
--
2.17.1
On 23.09.2019 18:14, Krzysztof Kozlowski wrote:
> Multi Core Timer node has interrupts routed to two different parents -
> GIC and combiner. This was modeled with a interrupt-map within a
> subnode but can be expressed in an easier and more common way, directly
> in the node itself.
>
> Tested on Odroid U3 (Exynos4412).
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
Tested-by: Marek Szyprowski <[email protected]>
Works fine on Trats2 board.
> ---
>
> Changes since v3:
> 1. Use interrupts-extended instead of interrupts-map.
> ---
> arch/arm/boot/dts/exynos4412.dtsi | 19 +++++--------------
> 1 file changed, 5 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
> index 8b6d5875c75d..9b5fb4e54d7c 100644
> --- a/arch/arm/boot/dts/exynos4412.dtsi
> +++ b/arch/arm/boot/dts/exynos4412.dtsi
> @@ -246,22 +246,13 @@
> timer@10050000 {
> compatible = "samsung,exynos4412-mct";
> reg = <0x10050000 0x800>;
> - interrupt-parent = <&mct_map>;
> - interrupts = <0>, <1>, <2>, <3>, <4>;
> clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
> clock-names = "fin_pll", "mct";
> -
> - mct_map: mct-map {
> - #interrupt-cells = <1>;
> - #address-cells = <0>;
> - #size-cells = <0>;
> - interrupt-map =
> - <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
> - <1 &combiner 12 5>,
> - <2 &combiner 12 6>,
> - <3 &combiner 12 7>,
> - <4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
> - };
> + interrupts-extended = <&gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
> + <&combiner 12 5>,
> + <&combiner 12 6>,
> + <&combiner 12 7>,
> + <&gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> watchdog: watchdog@10060000 {
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
Hi Krzysztof,
On 23.09.2019 18:14, Krzysztof Kozlowski wrote:
> Convert Samsung Exynos Soc Multi Core Timer bindings to DT schema format
> using json-schema.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
>
> Changes since v3:
> 1. Use interrupts-extended instead of interrupts-map.
>
> Changes since v1:
> 1. Indent example with four spaces (more readable),
> 2. Rename nodes in example to timer,
> 3. Remove mct-map subnode.
> ---
> .../bindings/timer/samsung,exynos4210-mct.txt | 88 ------------
> .../timer/samsung,exynos4210-mct.yaml | 125 ++++++++++++++++++
> 2 files changed, 125 insertions(+), 88 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
>
> diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> deleted file mode 100644
> index 8f78640ad64c..000000000000
> --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> +++ /dev/null
> @@ -1,88 +0,0 @@
> -Samsung's Multi Core Timer (MCT)
> -
> -The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
> -global timer and CPU local timers. The global timer is a 64-bit free running
> -up-counter and can generate 4 interrupts when the counter reaches one of the
> -four preset counter values. The CPU local timers are 32-bit free running
> -down-counters and generate an interrupt when the counter expires. There is
> -one CPU local timer instantiated in MCT for every CPU in the system.
> -
> -Required properties:
> -
> -- compatible: should be "samsung,exynos4210-mct".
> - (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct.
> - (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct.
> -
> -- reg: base address of the mct controller and length of the address space
> - it occupies.
> -
> -- interrupts: the list of interrupts generated by the controller. The following
> - should be the order of the interrupts specified. The local timer interrupts
> - should be specified after the four global timer interrupts have been
> - specified.
> -
> - 0: Global Timer Interrupt 0
> - 1: Global Timer Interrupt 1
> - 2: Global Timer Interrupt 2
> - 3: Global Timer Interrupt 3
> - 4: Local Timer Interrupt 0
> - 5: Local Timer Interrupt 1
> - 6: ..
> - 7: ..
> - i: Local Timer Interrupt n
> -
> - For MCT block that uses a per-processor interrupt for local timers, such
> - as ones compatible with "samsung,exynos4412-mct", only one local timer
> - interrupt might be specified, meaning that all local timers use the same
> - per processor interrupt.
> -
> -Example 1: In this example, the IP contains two local timers, using separate
> - interrupts, so two local timer interrupts have been specified,
> - in addition to four global timer interrupts.
> -
> - mct@10050000 {
> - compatible = "samsung,exynos4210-mct";
> - reg = <0x10050000 0x800>;
> - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> - <0 42 0>, <0 48 0>;
> - };
> -
> -Example 2: In this example, the timer interrupts are connected to two separate
> - interrupt controllers. Hence, an interrupt-map is created to map
> - the interrupts to the respective interrupt controllers.
> -
> - mct@101c0000 {
> - compatible = "samsung,exynos4210-mct";
> - reg = <0x101C0000 0x800>;
> - interrupt-parent = <&mct_map>;
> - interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
> -
> - mct_map: mct-map {
> - #interrupt-cells = <1>;
> - #address-cells = <0>;
> - #size-cells = <0>;
> - interrupt-map = <0 &gic 0 57 0>,
> - <1 &gic 0 69 0>,
> - <2 &combiner 12 6>,
> - <3 &combiner 12 7>,
> - <4 &gic 0 42 0>,
> - <5 &gic 0 48 0>;
> - };
> - };
> -
> -Example 3: In this example, the IP contains four local timers, but using
> - a per-processor interrupt to handle them. Either all the local
> - timer interrupts can be specified, with the same interrupt specifier
> - value or just the first one.
> -
> - mct@10050000 {
> - compatible = "samsung,exynos4412-mct";
> - reg = <0x10050000 0x800>;
> -
> - /* Both ways are possible in this case. Either: */
> - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> - <0 42 0>;
> - /* or: */
> - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> - <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
> - };
> diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> new file mode 100644
> index 000000000000..bff3f54a398f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> @@ -0,0 +1,125 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Exynos SoC Multi Core Timer (MCT)
> +
> +maintainers:
> + - Krzysztof Kozlowski <[email protected]>
> +
> +description: |+
> + The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
> + global timer and CPU local timers. The global timer is a 64-bit free running
> + up-counter and can generate 4 interrupts when the counter reaches one of the
> + four preset counter values. The CPU local timers are 32-bit free running
> + down-counters and generate an interrupt when the counter expires. There is
> + one CPU local timer instantiated in MCT for every CPU in the system.
> +
> +properties:
> + compatible:
> + enum:
> + - samsung,exynos4210-mct
> + - samsung,exynos4412-mct
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + description: |
> + Interrupts should be put in specific order. This is, the local timer
> + interrupts should be specified after the four global timer interrupts
> + have been specified:
> + 0: Global Timer Interrupt 0
> + 1: Global Timer Interrupt 1
> + 2: Global Timer Interrupt 2
> + 3: Global Timer Interrupt 3
> + 4: Local Timer Interrupt 0
> + 5: Local Timer Interrupt 1
> + 6: ..
> + 7: ..
> + i: Local Timer Interrupt n
> + For MCT block that uses a per-processor interrupt for local timers, such
> + as ones compatible with "samsung,exynos4412-mct", only one local timer
> + interrupt might be specified, meaning that all local timers use the same
> + per processor interrupt.
> + minItems: 5 # 4 Global + 1 local
> + maxItems: 20 # 4 Global + 16 local
> +
> + interrupts-extended:
> + description: |
> + If interrupts are coming from different controllers, this property
> + can be used instead of regular "interrupts" property.
> + The format is exactly the same as with "interrupts".
> + Interrupts should be put in specific order. This is, the local timer
> + minItems: 5 # 4 Global + 1 local
> + maxItems: 20 # 4 Global + 16 local
> +
> +required:
> + - compatible
> + - interrupts
> + - reg
> +
> +allOf:
> + - if:
> + not:
> + required:
> + - interrupts
> + then:
> + required:
> + - interrupts-extended
> +
> +examples:
> + - |
> + // In this example, the IP contains two local timers, using separate
> + // interrupts, so two local timer interrupts have been specified,
> + // in addition to four global timer interrupts.
> +
> + timer@10050000 {
> + compatible = "samsung,exynos4210-mct";
> + reg = <0x10050000 0x800>;
> + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> + <0 42 0>, <0 48 0>;
> + };
> +
> + - |
> + // In this example, the timer interrupts are connected to two separate
> + // interrupt controllers. Hence, an interrupts-extended is needed.
> +
> + timer@101c0000 {
> + compatible = "samsung,exynos4210-mct";
> + reg = <0x101C0000 0x800>;
> + interrupts-extended = <&gic 0 57 0>,
> + <&gic 0 69 0>,
> + <&combiner 12 6>,
> + <&combiner 12 7>,
> + <&gic 0 42 0>,
> + <&gic 0 48 0>;
> + };
> +
> + - |
> + // In this example, the IP contains four local timers, but using
> + // a per-processor interrupt to handle them. Only one first local
> + // interrupt is specified.
> +
> + timer@10050000 {
> + compatible = "samsung,exynos4412-mct";
> + reg = <0x10050000 0x800>;
> +
> + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> + <0 42 0>;
> + };
> +
> + - |
> + // In this example, the IP contains four local timers, but using
> + // a per-processor interrupt to handle them. All the local timer
> + // interrupts are specified.
> +
> + timer@10050000 {
> + compatible = "samsung,exynos4412-mct";
> + reg = <0x10050000 0x800>;
> +
> + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> + <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
> + };
I would add "#include <dt-bindings/interrupt-controller/arm-gic.h>" and
replace zeros with proper defines like GIC_SPI and GIC_PPI. The last two
examples describes per-processor-interrupts, but have 0 in the specifier
cell 0. I would also use proper IRQ_TYPE_LEVEL_HIGH at cell 3 instead
of 0. I would also consider adding artificial 'interrupt-parent = &git'
property to the 1st, 3rd and 4th examples to make it clear that they
refer to ARM GIC bindings.
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
On Wed, Sep 25, 2019 at 03:40:52PM +0200, Marek Szyprowski wrote:
> Hi Krzysztof,
>
> On 23.09.2019 18:14, Krzysztof Kozlowski wrote:
> > Convert Samsung Exynos Soc Multi Core Timer bindings to DT schema format
> > using json-schema.
> >
> > Signed-off-by: Krzysztof Kozlowski <[email protected]>
> >
> > ---
> >
> > Changes since v3:
> > 1. Use interrupts-extended instead of interrupts-map.
> >
> > Changes since v1:
> > 1. Indent example with four spaces (more readable),
> > 2. Rename nodes in example to timer,
> > 3. Remove mct-map subnode.
> > ---
> > .../bindings/timer/samsung,exynos4210-mct.txt | 88 ------------
> > .../timer/samsung,exynos4210-mct.yaml | 125 ++++++++++++++++++
> > 2 files changed, 125 insertions(+), 88 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> > create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> > deleted file mode 100644
> > index 8f78640ad64c..000000000000
> > --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> > +++ /dev/null
> > @@ -1,88 +0,0 @@
> > -Samsung's Multi Core Timer (MCT)
> > -
> > -The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
> > -global timer and CPU local timers. The global timer is a 64-bit free running
> > -up-counter and can generate 4 interrupts when the counter reaches one of the
> > -four preset counter values. The CPU local timers are 32-bit free running
> > -down-counters and generate an interrupt when the counter expires. There is
> > -one CPU local timer instantiated in MCT for every CPU in the system.
> > -
> > -Required properties:
> > -
> > -- compatible: should be "samsung,exynos4210-mct".
> > - (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct.
> > - (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct.
> > -
> > -- reg: base address of the mct controller and length of the address space
> > - it occupies.
> > -
> > -- interrupts: the list of interrupts generated by the controller. The following
> > - should be the order of the interrupts specified. The local timer interrupts
> > - should be specified after the four global timer interrupts have been
> > - specified.
> > -
> > - 0: Global Timer Interrupt 0
> > - 1: Global Timer Interrupt 1
> > - 2: Global Timer Interrupt 2
> > - 3: Global Timer Interrupt 3
> > - 4: Local Timer Interrupt 0
> > - 5: Local Timer Interrupt 1
> > - 6: ..
> > - 7: ..
> > - i: Local Timer Interrupt n
> > -
> > - For MCT block that uses a per-processor interrupt for local timers, such
> > - as ones compatible with "samsung,exynos4412-mct", only one local timer
> > - interrupt might be specified, meaning that all local timers use the same
> > - per processor interrupt.
> > -
> > -Example 1: In this example, the IP contains two local timers, using separate
> > - interrupts, so two local timer interrupts have been specified,
> > - in addition to four global timer interrupts.
> > -
> > - mct@10050000 {
> > - compatible = "samsung,exynos4210-mct";
> > - reg = <0x10050000 0x800>;
> > - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> > - <0 42 0>, <0 48 0>;
> > - };
> > -
> > -Example 2: In this example, the timer interrupts are connected to two separate
> > - interrupt controllers. Hence, an interrupt-map is created to map
> > - the interrupts to the respective interrupt controllers.
> > -
> > - mct@101c0000 {
> > - compatible = "samsung,exynos4210-mct";
> > - reg = <0x101C0000 0x800>;
> > - interrupt-parent = <&mct_map>;
> > - interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
> > -
> > - mct_map: mct-map {
> > - #interrupt-cells = <1>;
> > - #address-cells = <0>;
> > - #size-cells = <0>;
> > - interrupt-map = <0 &gic 0 57 0>,
> > - <1 &gic 0 69 0>,
> > - <2 &combiner 12 6>,
> > - <3 &combiner 12 7>,
> > - <4 &gic 0 42 0>,
> > - <5 &gic 0 48 0>;
> > - };
> > - };
> > -
> > -Example 3: In this example, the IP contains four local timers, but using
> > - a per-processor interrupt to handle them. Either all the local
> > - timer interrupts can be specified, with the same interrupt specifier
> > - value or just the first one.
> > -
> > - mct@10050000 {
> > - compatible = "samsung,exynos4412-mct";
> > - reg = <0x10050000 0x800>;
> > -
> > - /* Both ways are possible in this case. Either: */
> > - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> > - <0 42 0>;
> > - /* or: */
> > - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> > - <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
> > - };
> > diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> > new file mode 100644
> > index 000000000000..bff3f54a398f
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> > @@ -0,0 +1,125 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Samsung Exynos SoC Multi Core Timer (MCT)
> > +
> > +maintainers:
> > + - Krzysztof Kozlowski <[email protected]>
> > +
> > +description: |+
> > + The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
> > + global timer and CPU local timers. The global timer is a 64-bit free running
> > + up-counter and can generate 4 interrupts when the counter reaches one of the
> > + four preset counter values. The CPU local timers are 32-bit free running
> > + down-counters and generate an interrupt when the counter expires. There is
> > + one CPU local timer instantiated in MCT for every CPU in the system.
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - samsung,exynos4210-mct
> > + - samsung,exynos4412-mct
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + description: |
> > + Interrupts should be put in specific order. This is, the local timer
> > + interrupts should be specified after the four global timer interrupts
> > + have been specified:
> > + 0: Global Timer Interrupt 0
> > + 1: Global Timer Interrupt 1
> > + 2: Global Timer Interrupt 2
> > + 3: Global Timer Interrupt 3
> > + 4: Local Timer Interrupt 0
> > + 5: Local Timer Interrupt 1
> > + 6: ..
> > + 7: ..
> > + i: Local Timer Interrupt n
> > + For MCT block that uses a per-processor interrupt for local timers, such
> > + as ones compatible with "samsung,exynos4412-mct", only one local timer
> > + interrupt might be specified, meaning that all local timers use the same
> > + per processor interrupt.
> > + minItems: 5 # 4 Global + 1 local
> > + maxItems: 20 # 4 Global + 16 local
> > +
> > + interrupts-extended:
> > + description: |
> > + If interrupts are coming from different controllers, this property
> > + can be used instead of regular "interrupts" property.
> > + The format is exactly the same as with "interrupts".
> > + Interrupts should be put in specific order. This is, the local timer
> > + minItems: 5 # 4 Global + 1 local
> > + maxItems: 20 # 4 Global + 16 local
> > +
> > +required:
> > + - compatible
> > + - interrupts
> > + - reg
> > +
> > +allOf:
> > + - if:
> > + not:
> > + required:
> > + - interrupts
> > + then:
> > + required:
> > + - interrupts-extended
> > +
> > +examples:
> > + - |
> > + // In this example, the IP contains two local timers, using separate
> > + // interrupts, so two local timer interrupts have been specified,
> > + // in addition to four global timer interrupts.
> > +
> > + timer@10050000 {
> > + compatible = "samsung,exynos4210-mct";
> > + reg = <0x10050000 0x800>;
> > + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> > + <0 42 0>, <0 48 0>;
> > + };
> > +
> > + - |
> > + // In this example, the timer interrupts are connected to two separate
> > + // interrupt controllers. Hence, an interrupts-extended is needed.
> > +
> > + timer@101c0000 {
> > + compatible = "samsung,exynos4210-mct";
> > + reg = <0x101C0000 0x800>;
> > + interrupts-extended = <&gic 0 57 0>,
> > + <&gic 0 69 0>,
> > + <&combiner 12 6>,
> > + <&combiner 12 7>,
> > + <&gic 0 42 0>,
> > + <&gic 0 48 0>;
> > + };
> > +
> > + - |
> > + // In this example, the IP contains four local timers, but using
> > + // a per-processor interrupt to handle them. Only one first local
> > + // interrupt is specified.
> > +
> > + timer@10050000 {
> > + compatible = "samsung,exynos4412-mct";
> > + reg = <0x10050000 0x800>;
> > +
> > + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> > + <0 42 0>;
> > + };
> > +
> > + - |
> > + // In this example, the IP contains four local timers, but using
> > + // a per-processor interrupt to handle them. All the local timer
> > + // interrupts are specified.
> > +
> > + timer@10050000 {
> > + compatible = "samsung,exynos4412-mct";
> > + reg = <0x10050000 0x800>;
> > +
> > + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> > + <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
> > + };
> I would add "#include <dt-bindings/interrupt-controller/arm-gic.h>" and
> replace zeros with proper defines like GIC_SPI and GIC_PPI. The last two
> examples describes per-processor-interrupts, but have 0 in the specifier
> cell 0. I would also use proper IRQ_TYPE_LEVEL_HIGH at cell 3 instead
> of 0. I would also consider adding artificial 'interrupt-parent = &git'
> property to the 1st, 3rd and 4th examples to make it clear that they
> refer to ARM GIC bindings.
Makes sense, but how about doing this in separate patch? The example code
was like this amd this just converts the bindings so I think it is better
to reduce the amount of feature-like improvements.
Best regards,
Krzysztof
On Mon, Sep 23, 2019 at 06:14:04PM +0200, Krzysztof Kozlowski wrote:
> Convert Samsung Exynos Soc Multi Core Timer bindings to DT schema format
> using json-schema.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
>
> Changes since v3:
> 1. Use interrupts-extended instead of interrupts-map.
This is a binding change. You should mention it in the commit.
>
> Changes since v1:
> 1. Indent example with four spaces (more readable),
> 2. Rename nodes in example to timer,
> 3. Remove mct-map subnode.
> ---
> .../bindings/timer/samsung,exynos4210-mct.txt | 88 ------------
> .../timer/samsung,exynos4210-mct.yaml | 125 ++++++++++++++++++
> 2 files changed, 125 insertions(+), 88 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
>
> diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> deleted file mode 100644
> index 8f78640ad64c..000000000000
> --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> +++ /dev/null
> @@ -1,88 +0,0 @@
> -Samsung's Multi Core Timer (MCT)
> -
> -The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
> -global timer and CPU local timers. The global timer is a 64-bit free running
> -up-counter and can generate 4 interrupts when the counter reaches one of the
> -four preset counter values. The CPU local timers are 32-bit free running
> -down-counters and generate an interrupt when the counter expires. There is
> -one CPU local timer instantiated in MCT for every CPU in the system.
> -
> -Required properties:
> -
> -- compatible: should be "samsung,exynos4210-mct".
> - (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct.
> - (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct.
> -
> -- reg: base address of the mct controller and length of the address space
> - it occupies.
> -
> -- interrupts: the list of interrupts generated by the controller. The following
> - should be the order of the interrupts specified. The local timer interrupts
> - should be specified after the four global timer interrupts have been
> - specified.
> -
> - 0: Global Timer Interrupt 0
> - 1: Global Timer Interrupt 1
> - 2: Global Timer Interrupt 2
> - 3: Global Timer Interrupt 3
> - 4: Local Timer Interrupt 0
> - 5: Local Timer Interrupt 1
> - 6: ..
> - 7: ..
> - i: Local Timer Interrupt n
> -
> - For MCT block that uses a per-processor interrupt for local timers, such
> - as ones compatible with "samsung,exynos4412-mct", only one local timer
> - interrupt might be specified, meaning that all local timers use the same
> - per processor interrupt.
> -
> -Example 1: In this example, the IP contains two local timers, using separate
> - interrupts, so two local timer interrupts have been specified,
> - in addition to four global timer interrupts.
> -
> - mct@10050000 {
> - compatible = "samsung,exynos4210-mct";
> - reg = <0x10050000 0x800>;
> - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> - <0 42 0>, <0 48 0>;
> - };
> -
> -Example 2: In this example, the timer interrupts are connected to two separate
> - interrupt controllers. Hence, an interrupt-map is created to map
> - the interrupts to the respective interrupt controllers.
> -
> - mct@101c0000 {
> - compatible = "samsung,exynos4210-mct";
> - reg = <0x101C0000 0x800>;
> - interrupt-parent = <&mct_map>;
> - interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
> -
> - mct_map: mct-map {
> - #interrupt-cells = <1>;
> - #address-cells = <0>;
> - #size-cells = <0>;
> - interrupt-map = <0 &gic 0 57 0>,
> - <1 &gic 0 69 0>,
> - <2 &combiner 12 6>,
> - <3 &combiner 12 7>,
> - <4 &gic 0 42 0>,
> - <5 &gic 0 48 0>;
> - };
> - };
> -
> -Example 3: In this example, the IP contains four local timers, but using
> - a per-processor interrupt to handle them. Either all the local
> - timer interrupts can be specified, with the same interrupt specifier
> - value or just the first one.
> -
> - mct@10050000 {
> - compatible = "samsung,exynos4412-mct";
> - reg = <0x10050000 0x800>;
> -
> - /* Both ways are possible in this case. Either: */
> - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> - <0 42 0>;
> - /* or: */
> - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> - <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
> - };
> diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> new file mode 100644
> index 000000000000..bff3f54a398f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> @@ -0,0 +1,125 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Exynos SoC Multi Core Timer (MCT)
> +
> +maintainers:
> + - Krzysztof Kozlowski <[email protected]>
> +
> +description: |+
> + The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
> + global timer and CPU local timers. The global timer is a 64-bit free running
> + up-counter and can generate 4 interrupts when the counter reaches one of the
> + four preset counter values. The CPU local timers are 32-bit free running
> + down-counters and generate an interrupt when the counter expires. There is
> + one CPU local timer instantiated in MCT for every CPU in the system.
> +
> +properties:
> + compatible:
> + enum:
> + - samsung,exynos4210-mct
> + - samsung,exynos4412-mct
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + description: |
> + Interrupts should be put in specific order. This is, the local timer
> + interrupts should be specified after the four global timer interrupts
> + have been specified:
> + 0: Global Timer Interrupt 0
> + 1: Global Timer Interrupt 1
> + 2: Global Timer Interrupt 2
> + 3: Global Timer Interrupt 3
> + 4: Local Timer Interrupt 0
> + 5: Local Timer Interrupt 1
> + 6: ..
> + 7: ..
> + i: Local Timer Interrupt n
> + For MCT block that uses a per-processor interrupt for local timers, such
> + as ones compatible with "samsung,exynos4412-mct", only one local timer
> + interrupt might be specified, meaning that all local timers use the same
> + per processor interrupt.
> + minItems: 5 # 4 Global + 1 local
> + maxItems: 20 # 4 Global + 16 local
> +
> + interrupts-extended:
No need for this. Just document 'interrupts' and the tooling takes care
of supporting 'interrupts-extended' too.
> + description: |
> + If interrupts are coming from different controllers, this property
> + can be used instead of regular "interrupts" property.
> + The format is exactly the same as with "interrupts".
> + Interrupts should be put in specific order. This is, the local timer
> + minItems: 5 # 4 Global + 1 local
> + maxItems: 20 # 4 Global + 16 local
> +
> +required:
> + - compatible
> + - interrupts
> + - reg
> +
> +allOf:
> + - if:
> + not:
> + required:
> + - interrupts
> + then:
> + required:
> + - interrupts-extended
And this is taken care of too.
> +
> +examples:
> + - |
> + // In this example, the IP contains two local timers, using separate
> + // interrupts, so two local timer interrupts have been specified,
> + // in addition to four global timer interrupts.
> +
> + timer@10050000 {
> + compatible = "samsung,exynos4210-mct";
> + reg = <0x10050000 0x800>;
> + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> + <0 42 0>, <0 48 0>;
> + };
> +
> + - |
> + // In this example, the timer interrupts are connected to two separate
> + // interrupt controllers. Hence, an interrupts-extended is needed.
> +
> + timer@101c0000 {
> + compatible = "samsung,exynos4210-mct";
> + reg = <0x101C0000 0x800>;
> + interrupts-extended = <&gic 0 57 0>,
> + <&gic 0 69 0>,
> + <&combiner 12 6>,
> + <&combiner 12 7>,
> + <&gic 0 42 0>,
> + <&gic 0 48 0>;
> + };
> +
> + - |
> + // In this example, the IP contains four local timers, but using
> + // a per-processor interrupt to handle them. Only one first local
> + // interrupt is specified.
> +
> + timer@10050000 {
> + compatible = "samsung,exynos4412-mct";
> + reg = <0x10050000 0x800>;
> +
> + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> + <0 42 0>;
> + };
> +
> + - |
> + // In this example, the IP contains four local timers, but using
> + // a per-processor interrupt to handle them. All the local timer
> + // interrupts are specified.
> +
> + timer@10050000 {
> + compatible = "samsung,exynos4412-mct";
> + reg = <0x10050000 0x800>;
> +
> + interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> + <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
> + };
> --
> 2.17.1
>
On Fri, Sep 27, 2019 at 12:07:01PM -0500, Rob Herring wrote:
> On Mon, Sep 23, 2019 at 06:14:04PM +0200, Krzysztof Kozlowski wrote:
> > Convert Samsung Exynos Soc Multi Core Timer bindings to DT schema format
> > using json-schema.
> >
> > Signed-off-by: Krzysztof Kozlowski <[email protected]>
> >
> > ---
> >
> > Changes since v3:
> > 1. Use interrupts-extended instead of interrupts-map.
>
> This is a binding change. You should mention it in the commit.
The interrupts-map was never a part of binding. It was only mentioned in
the example to show how to route interrupts to different controllers.
The bindings are not changed. Only example.
>
> >
> > Changes since v1:
> > 1. Indent example with four spaces (more readable),
> > 2. Rename nodes in example to timer,
> > 3. Remove mct-map subnode.
> > ---
> > .../bindings/timer/samsung,exynos4210-mct.txt | 88 ------------
> > .../timer/samsung,exynos4210-mct.yaml | 125 ++++++++++++++++++
> > 2 files changed, 125 insertions(+), 88 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> > create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> > deleted file mode 100644
> > index 8f78640ad64c..000000000000
> > --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> > +++ /dev/null
> > @@ -1,88 +0,0 @@
> > -Samsung's Multi Core Timer (MCT)
> > -
> > -The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
> > -global timer and CPU local timers. The global timer is a 64-bit free running
> > -up-counter and can generate 4 interrupts when the counter reaches one of the
> > -four preset counter values. The CPU local timers are 32-bit free running
> > -down-counters and generate an interrupt when the counter expires. There is
> > -one CPU local timer instantiated in MCT for every CPU in the system.
> > -
> > -Required properties:
> > -
> > -- compatible: should be "samsung,exynos4210-mct".
> > - (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct.
> > - (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct.
> > -
> > -- reg: base address of the mct controller and length of the address space
> > - it occupies.
> > -
> > -- interrupts: the list of interrupts generated by the controller. The following
> > - should be the order of the interrupts specified. The local timer interrupts
> > - should be specified after the four global timer interrupts have been
> > - specified.
> > -
> > - 0: Global Timer Interrupt 0
> > - 1: Global Timer Interrupt 1
> > - 2: Global Timer Interrupt 2
> > - 3: Global Timer Interrupt 3
> > - 4: Local Timer Interrupt 0
> > - 5: Local Timer Interrupt 1
> > - 6: ..
> > - 7: ..
> > - i: Local Timer Interrupt n
> > -
> > - For MCT block that uses a per-processor interrupt for local timers, such
> > - as ones compatible with "samsung,exynos4412-mct", only one local timer
> > - interrupt might be specified, meaning that all local timers use the same
> > - per processor interrupt.
> > -
> > -Example 1: In this example, the IP contains two local timers, using separate
> > - interrupts, so two local timer interrupts have been specified,
> > - in addition to four global timer interrupts.
> > -
> > - mct@10050000 {
> > - compatible = "samsung,exynos4210-mct";
> > - reg = <0x10050000 0x800>;
> > - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> > - <0 42 0>, <0 48 0>;
> > - };
> > -
> > -Example 2: In this example, the timer interrupts are connected to two separate
> > - interrupt controllers. Hence, an interrupt-map is created to map
> > - the interrupts to the respective interrupt controllers.
> > -
> > - mct@101c0000 {
> > - compatible = "samsung,exynos4210-mct";
> > - reg = <0x101C0000 0x800>;
> > - interrupt-parent = <&mct_map>;
> > - interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
> > -
> > - mct_map: mct-map {
> > - #interrupt-cells = <1>;
> > - #address-cells = <0>;
> > - #size-cells = <0>;
> > - interrupt-map = <0 &gic 0 57 0>,
> > - <1 &gic 0 69 0>,
> > - <2 &combiner 12 6>,
> > - <3 &combiner 12 7>,
> > - <4 &gic 0 42 0>,
> > - <5 &gic 0 48 0>;
> > - };
> > - };
> > -
> > -Example 3: In this example, the IP contains four local timers, but using
> > - a per-processor interrupt to handle them. Either all the local
> > - timer interrupts can be specified, with the same interrupt specifier
> > - value or just the first one.
> > -
> > - mct@10050000 {
> > - compatible = "samsung,exynos4412-mct";
> > - reg = <0x10050000 0x800>;
> > -
> > - /* Both ways are possible in this case. Either: */
> > - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> > - <0 42 0>;
> > - /* or: */
> > - interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> > - <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
> > - };
> > diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> > new file mode 100644
> > index 000000000000..bff3f54a398f
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> > @@ -0,0 +1,125 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Samsung Exynos SoC Multi Core Timer (MCT)
> > +
> > +maintainers:
> > + - Krzysztof Kozlowski <[email protected]>
> > +
> > +description: |+
> > + The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
> > + global timer and CPU local timers. The global timer is a 64-bit free running
> > + up-counter and can generate 4 interrupts when the counter reaches one of the
> > + four preset counter values. The CPU local timers are 32-bit free running
> > + down-counters and generate an interrupt when the counter expires. There is
> > + one CPU local timer instantiated in MCT for every CPU in the system.
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - samsung,exynos4210-mct
> > + - samsung,exynos4412-mct
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + description: |
> > + Interrupts should be put in specific order. This is, the local timer
> > + interrupts should be specified after the four global timer interrupts
> > + have been specified:
> > + 0: Global Timer Interrupt 0
> > + 1: Global Timer Interrupt 1
> > + 2: Global Timer Interrupt 2
> > + 3: Global Timer Interrupt 3
> > + 4: Local Timer Interrupt 0
> > + 5: Local Timer Interrupt 1
> > + 6: ..
> > + 7: ..
> > + i: Local Timer Interrupt n
> > + For MCT block that uses a per-processor interrupt for local timers, such
> > + as ones compatible with "samsung,exynos4412-mct", only one local timer
> > + interrupt might be specified, meaning that all local timers use the same
> > + per processor interrupt.
> > + minItems: 5 # 4 Global + 1 local
> > + maxItems: 20 # 4 Global + 16 local
> > +
> > + interrupts-extended:
>
> No need for this. Just document 'interrupts' and the tooling takes care
> of supporting 'interrupts-extended' too.
OK.
>
> > + description: |
> > + If interrupts are coming from different controllers, this property
> > + can be used instead of regular "interrupts" property.
> > + The format is exactly the same as with "interrupts".
> > + Interrupts should be put in specific order. This is, the local timer
> > + minItems: 5 # 4 Global + 1 local
> > + maxItems: 20 # 4 Global + 16 local
> > +
> > +required:
> > + - compatible
> > + - interrupts
> > + - reg
> > +
> > +allOf:
> > + - if:
> > + not:
> > + required:
> > + - interrupts
> > + then:
> > + required:
> > + - interrupts-extended
>
> And this is taken care of too.
Sure, thanks!
Best regards,
Krzysztof
On Mon, Sep 23, 2019 at 06:14:05PM +0200, Krzysztof Kozlowski wrote:
> The device node name should reflect generic class of a device so rename
> the Multi Core Timer node from "mct" to "timer". This will be also in
> sync with upcoming DT schema. No functional change.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> arch/arm/boot/dts/exynos3250.dtsi | 2 +-
> arch/arm/boot/dts/exynos4210.dtsi | 2 +-
> arch/arm/boot/dts/exynos4412.dtsi | 2 +-
> arch/arm/boot/dts/exynos5250.dtsi | 2 +-
> arch/arm/boot/dts/exynos5260.dtsi | 2 +-
> arch/arm/boot/dts/exynos54xx.dtsi | 2 +-
> 6 files changed, 6 insertions(+), 6 deletions(-)
I applied all dts related patches from this set.
Best regards,
Krzysztof