The DDC/CI protocol involves sending a multi-byte request to the
display via I2C, which is typically followed by a multi-byte
response. The internal I2C controller only allows single byte
reads/writes or reads of 8 sequential bytes, hence DDC/CI is not
supported when the internal I2C controller is used. The I2C
transfers complete without errors, however the data in the response
is garbage. Abort transfers to/from slave address 0x37 (DDC) with
-EOPNOTSUPP, to make it evident that the communication is failing.
Signed-off-by: Matthias Kaehlcke <[email protected]>
Reviewed-by: Douglas Anderson <[email protected]>
Reviewed-by: Sean Paul <[email protected]>
Acked-by: Neil Armstrong <[email protected]>
---
Sorry for the delay with sending v2, I completely forgot about this patch ...
Changes in v2:
- updated comment with 'TOFIX' entry as requested by Neil
- added Neil's 'Acked-by' tag
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 52d220a70362..ac24bceaf415 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -41,6 +41,7 @@
#include <media/cec-notifier.h>
+#define DDC_CI_ADDR 0x37
#define DDC_SEGMENT_ADDR 0x30
#define HDMI_EDID_LEN 512
@@ -439,6 +440,15 @@ static int dw_hdmi_i2c_xfer(struct i2c_adapter *adap,
u8 addr = msgs[0].addr;
int i, ret = 0;
+ if (addr == DDC_CI_ADDR)
+ /*
+ * The internal I2C controller does not support the multi-byte
+ * read and write operations needed for DDC/CI.
+ * TOFIX: Blacklist the DDC/CI address until we filter out
+ * unsupported I2C operations.
+ */
+ return -EOPNOTSUPP;
+
dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr);
for (i = 0; i < num; i++) {
--
2.23.0.444.g18eeb5a265-goog
Hi Matthias,
On 02/10/2019 21:44, Matthias Kaehlcke wrote:
> The DDC/CI protocol involves sending a multi-byte request to the
> display via I2C, which is typically followed by a multi-byte
> response. The internal I2C controller only allows single byte
> reads/writes or reads of 8 sequential bytes, hence DDC/CI is not
> supported when the internal I2C controller is used. The I2C
> transfers complete without errors, however the data in the response
> is garbage. Abort transfers to/from slave address 0x37 (DDC) with
> -EOPNOTSUPP, to make it evident that the communication is failing.
>
> Signed-off-by: Matthias Kaehlcke <[email protected]>
> Reviewed-by: Douglas Anderson <[email protected]>
> Reviewed-by: Sean Paul <[email protected]>
> Acked-by: Neil Armstrong <[email protected]>
> ---
> Sorry for the delay with sending v2, I completely forgot about this patch ...
>
> Changes in v2:
> - updated comment with 'TOFIX' entry as requested by Neil
> - added Neil's 'Acked-by' tag
>
> drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> index 52d220a70362..ac24bceaf415 100644
> --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> @@ -41,6 +41,7 @@
>
> #include <media/cec-notifier.h>
>
> +#define DDC_CI_ADDR 0x37
> #define DDC_SEGMENT_ADDR 0x30
>
> #define HDMI_EDID_LEN 512
> @@ -439,6 +440,15 @@ static int dw_hdmi_i2c_xfer(struct i2c_adapter *adap,
> u8 addr = msgs[0].addr;
> int i, ret = 0;
>
> + if (addr == DDC_CI_ADDR)
> + /*
> + * The internal I2C controller does not support the multi-byte
> + * read and write operations needed for DDC/CI.
> + * TOFIX: Blacklist the DDC/CI address until we filter out
> + * unsupported I2C operations.
> + */
> + return -EOPNOTSUPP;
> +
> dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr);
>
> for (i = 0; i < num; i++) {
>
Applying to drm-misc-next
Thanks !
Neil