Hi all,
This patch fix an issue related to exposing the FRINT capability to
userspace (see patch #1). The rest is documentation update.
Cheers,
Julien Grall (4):
arm64: cpufeature: Effectively expose FRINT capability to userspace
docs/arm64: elf_hwcaps: sort the HWCAP{,2} documentation by ascending
value
docs/arm64: elf_hwcaps: Document HWCAP_SB
docs/arm64: cpu-feature-registers: Documents missing visible fields
Documentation/arm64/cpu-feature-registers.rst | 4 ++
Documentation/arm64/elf_hwcaps.rst | 67 ++++++++++++++-------------
arch/arm64/kernel/cpufeature.c | 1 +
3 files changed, 40 insertions(+), 32 deletions(-)
--
2.11.0
A couple of fields visible to userspace are not described in the
documentation. So update it.
Signed-off-by: Julien Grall <[email protected]>
---
Documentation/arm64/cpu-feature-registers.rst | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst
index 2955287e9acc..ffcf4e2c71ef 100644
--- a/Documentation/arm64/cpu-feature-registers.rst
+++ b/Documentation/arm64/cpu-feature-registers.rst
@@ -193,6 +193,10 @@ infrastructure:
+------------------------------+---------+---------+
| Name | bits | visible |
+------------------------------+---------+---------+
+ | SB | [36-39] | y |
+ +------------------------------+---------+---------+
+ | FRINTTS | [32-35] | y |
+ +------------------------------+---------+---------+
| GPI | [31-28] | y |
+------------------------------+---------+---------+
| GPA | [27-24] | y |
--
2.11.0
On Thu, Oct 03, 2019 at 12:12:07PM +0100, Julien Grall wrote:
> This patch fix an issue related to exposing the FRINT capability to
> userspace (see patch #1). The rest is documentation update.
>
For patches 2-4:
Acked-by: Will Deacon <[email protected]>
Catalin can take them for 5.5, since I don't think they're urgent.
Will
On Fri, Oct 04, 2019 at 11:37:22AM +0100, Will Deacon wrote:
> On Thu, Oct 03, 2019 at 12:12:07PM +0100, Julien Grall wrote:
> > This patch fix an issue related to exposing the FRINT capability to
> > userspace (see patch #1). The rest is documentation update.
> >
> For patches 2-4:
>
> Acked-by: Will Deacon <[email protected]>
>
> Catalin can take them for 5.5, since I don't think they're urgent.
Queued. Thanks.
--
Catalin
Hi,
On 03/10/2019 12:12, Julien Grall wrote:
> A couple of fields visible to userspace are not described in the
> documentation. So update it.
>
> Signed-off-by: Julien Grall <[email protected]>
> ---
> Documentation/arm64/cpu-feature-registers.rst | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst
> index 2955287e9acc..ffcf4e2c71ef 100644
> --- a/Documentation/arm64/cpu-feature-registers.rst
> +++ b/Documentation/arm64/cpu-feature-registers.rst
> @@ -193,6 +193,10 @@ infrastructure:
> +------------------------------+---------+---------+
> | Name | bits | visible |
> +------------------------------+---------+---------+
> + | SB | [36-39] | y |
> + +------------------------------+---------+---------+
> + | FRINTTS | [32-35] | y |
> + +------------------------------+---------+---------+
Will reported the bitfields were inconsistent (see [1]). Looking in more
details, it seems that I messed up this patch when sending it (I honestly can't
remember why I wrote like that :().
@Catalin, I saw you applied this patch to for-next/elf-hwcap-docs. Would you
mind to update the content of the patch? Or do you prefer a new version?
> | GPI | [31-28] | y |
> +------------------------------+---------+---------+
> | GPA | [27-24] | y |
>
Cheers,
[1] <20191029111517.GE11590@willie-the-truck>
--
Julien Grall
On Thu, Oct 31, 2019 at 04:48:18PM +0000, Julien Grall wrote:
> On 03/10/2019 12:12, Julien Grall wrote:
> > A couple of fields visible to userspace are not described in the
> > documentation. So update it.
> >
> > Signed-off-by: Julien Grall <[email protected]>
> > ---
> > Documentation/arm64/cpu-feature-registers.rst | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst
> > index 2955287e9acc..ffcf4e2c71ef 100644
> > --- a/Documentation/arm64/cpu-feature-registers.rst
> > +++ b/Documentation/arm64/cpu-feature-registers.rst
> > @@ -193,6 +193,10 @@ infrastructure:
> > +------------------------------+---------+---------+
> > | Name | bits | visible |
> > +------------------------------+---------+---------+
> > + | SB | [36-39] | y |
> > + +------------------------------+---------+---------+
> > + | FRINTTS | [32-35] | y |
> > + +------------------------------+---------+---------+
>
> Will reported the bitfields were inconsistent (see [1]). Looking in more
> details, it seems that I messed up this patch when sending it (I honestly
> can't remember why I wrote like that :().
>
> @Catalin, I saw you applied this patch to for-next/elf-hwcap-docs. Would you
> mind to update the content of the patch? Or do you prefer a new version?
Please send a fix on top of the elf-hwcap-docs branch. I'd prefer not to
rebase it.
--
Catalin