Replace all "@" by "_" in pinmux groups for stm32f4 family.
This avoid errors when using yaml to check the bindings.
Signed-off-by: Benjamin Gaignard <[email protected]>
---
arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 35202896c093..722598cdf3b7 100644
--- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
@@ -163,7 +163,7 @@
st,bank-name = "GPIOK";
};
- usart1_pins_a: usart1@0 {
+ usart1_pins_a: usart1_0 {
pins1 {
pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
bias-disable;
@@ -176,7 +176,7 @@
};
};
- usart3_pins_a: usart3@0 {
+ usart3_pins_a: usart3_0 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
bias-disable;
@@ -189,7 +189,7 @@
};
};
- usbotg_fs_pins_a: usbotg_fs@0 {
+ usbotg_fs_pins_a: usbotg_fs_0 {
pins {
pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */
<STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
@@ -200,7 +200,7 @@
};
};
- usbotg_fs_pins_b: usbotg_fs@1 {
+ usbotg_fs_pins_b: usbotg_fs_1 {
pins {
pinmux = <STM32_PINMUX('B', 12, AF12)>, /* OTG_HS_ID */
<STM32_PINMUX('B', 14, AF12)>, /* OTG_HS_DM */
@@ -211,7 +211,7 @@
};
};
- usbotg_hs_pins_a: usbotg_hs@0 {
+ usbotg_hs_pins_a: usbotg_hs_0 {
pins {
pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT*/
<STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
@@ -231,7 +231,7 @@
};
};
- ethernet_mii: mii@0 {
+ ethernet_mii: mii_0 {
pins {
pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_MII_TXD0_ETH_RMII_TXD0 */
<STM32_PINMUX('G', 14, AF11)>, /* ETH_MII_TXD1_ETH_RMII_TXD1 */
@@ -251,13 +251,13 @@
};
};
- adc3_in8_pin: adc@200 {
+ adc3_in8_pin: adc_200 {
pins {
pinmux = <STM32_PINMUX('F', 10, ANALOG)>;
};
};
- pwm1_pins: pwm@1 {
+ pwm1_pins: pwm_1 {
pins {
pinmux = <STM32_PINMUX('A', 8, AF1)>, /* TIM1_CH1 */
<STM32_PINMUX('B', 13, AF1)>, /* TIM1_CH1N */
@@ -265,14 +265,14 @@
};
};
- pwm3_pins: pwm@3 {
+ pwm3_pins: pwm_3 {
pins {
pinmux = <STM32_PINMUX('B', 4, AF2)>, /* TIM3_CH1 */
<STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
};
};
- i2c1_pins: i2c1@0 {
+ i2c1_pins: i2c1_0 {
pins {
pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1_SDA */
<STM32_PINMUX('B', 6, AF4)>; /* I2C1_SCL */
@@ -282,7 +282,7 @@
};
};
- ltdc_pins: ltdc@0 {
+ ltdc_pins: ltdc_0 {
pins {
pinmux = <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
<STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
@@ -316,7 +316,7 @@
};
};
- dcmi_pins: dcmi@0 {
+ dcmi_pins: dcmi_0 {
pins {
pinmux = <STM32_PINMUX('A', 4, AF13)>, /* DCMI_HSYNC */
<STM32_PINMUX('B', 7, AF13)>, /* DCMI_VSYNC */
@@ -339,7 +339,7 @@
};
};
- sdio_pins: sdio_pins@0 {
+ sdio_pins: sdio_pins_0 {
pins {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */
@@ -352,7 +352,7 @@
};
};
- sdio_pins_od: sdio_pins_od@0 {
+ sdio_pins_od: sdio_pins_od_0 {
pins1 {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */
--
2.15.0
Hi benjamin
On 11/25/19 1:12 PM, Benjamin Gaignard wrote:
> Replace all "@" by "_" in pinmux groups for stm32f4 family.
> This avoid errors when using yaml to check the bindings.
>
> Signed-off-by: Benjamin Gaignard <[email protected]>
> ---
> arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 28 ++++++++++++++--------------
> 1 file changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
> index 35202896c093..722598cdf3b7 100644
> --- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
> @@ -163,7 +163,7 @@
> st,bank-name = "GPIOK";
> };
>
> - usart1_pins_a: usart1@0 {
> + usart1_pins_a: usart1_0 {
You fix a warning by adding a new one. Please use "usart1-0" instead of
"usart1_0". To be done for all changes in this file.
regards
Alex
> pins1 {
> pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
> bias-disable;
> @@ -176,7 +176,7 @@
> };
> };
>
> - usart3_pins_a: usart3@0 {
> + usart3_pins_a: usart3_0 {
> pins1 {
> pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
> bias-disable;
> @@ -189,7 +189,7 @@
> };
> };
>
> - usbotg_fs_pins_a: usbotg_fs@0 {
> + usbotg_fs_pins_a: usbotg_fs_0 {
> pins {
> pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */
> <STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
> @@ -200,7 +200,7 @@
> };
> };
>
> - usbotg_fs_pins_b: usbotg_fs@1 {
> + usbotg_fs_pins_b: usbotg_fs_1 {
> pins {
> pinmux = <STM32_PINMUX('B', 12, AF12)>, /* OTG_HS_ID */
> <STM32_PINMUX('B', 14, AF12)>, /* OTG_HS_DM */
> @@ -211,7 +211,7 @@
> };
> };
>
> - usbotg_hs_pins_a: usbotg_hs@0 {
> + usbotg_hs_pins_a: usbotg_hs_0 {
> pins {
> pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT*/
> <STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
> @@ -231,7 +231,7 @@
> };
> };
>
> - ethernet_mii: mii@0 {
> + ethernet_mii: mii_0 {
> pins {
> pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_MII_TXD0_ETH_RMII_TXD0 */
> <STM32_PINMUX('G', 14, AF11)>, /* ETH_MII_TXD1_ETH_RMII_TXD1 */
> @@ -251,13 +251,13 @@
> };
> };
>
> - adc3_in8_pin: adc@200 {
> + adc3_in8_pin: adc_200 {
> pins {
> pinmux = <STM32_PINMUX('F', 10, ANALOG)>;
> };
> };
>
> - pwm1_pins: pwm@1 {
> + pwm1_pins: pwm_1 {
> pins {
> pinmux = <STM32_PINMUX('A', 8, AF1)>, /* TIM1_CH1 */
> <STM32_PINMUX('B', 13, AF1)>, /* TIM1_CH1N */
> @@ -265,14 +265,14 @@
> };
> };
>
> - pwm3_pins: pwm@3 {
> + pwm3_pins: pwm_3 {
> pins {
> pinmux = <STM32_PINMUX('B', 4, AF2)>, /* TIM3_CH1 */
> <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
> };
> };
>
> - i2c1_pins: i2c1@0 {
> + i2c1_pins: i2c1_0 {
> pins {
> pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1_SDA */
> <STM32_PINMUX('B', 6, AF4)>; /* I2C1_SCL */
> @@ -282,7 +282,7 @@
> };
> };
>
> - ltdc_pins: ltdc@0 {
> + ltdc_pins: ltdc_0 {
> pins {
> pinmux = <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
> <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
> @@ -316,7 +316,7 @@
> };
> };
>
> - dcmi_pins: dcmi@0 {
> + dcmi_pins: dcmi_0 {
> pins {
> pinmux = <STM32_PINMUX('A', 4, AF13)>, /* DCMI_HSYNC */
> <STM32_PINMUX('B', 7, AF13)>, /* DCMI_VSYNC */
> @@ -339,7 +339,7 @@
> };
> };
>
> - sdio_pins: sdio_pins@0 {
> + sdio_pins: sdio_pins_0 {
> pins {
> pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */
> <STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */
> @@ -352,7 +352,7 @@
> };
> };
>
> - sdio_pins_od: sdio_pins_od@0 {
> + sdio_pins_od: sdio_pins_od_0 {
> pins1 {
> pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */
> <STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */
>