From: Matthias Brugger <[email protected]>
This is version five of the series. It's a long time this wasn't worked on, so
as a reminder, version four can be found here:
https://patchwork.kernel.org/cover/10686247/
The biggest changes this new version does, is to implement the clock probing
through a platform driver. The corresponding platform device get's created in
the DRM driver. I converted all the clock drivers to platform drivers and tested
the approach on the Acer Chromebook R13 (mt8173 based).
Apart from that I reordered the patches so that the DT bindings update are the first
patches.
Changes since v5:
- re-arrange the patch order
- generate platform_device for mmsys clock driver inside the DRM driver
- fix DTS binding accordingly
- switch all mmsys clock driver to platform probing
- fix mt8173 platform driver remove function
- fix probe defer path in HDMI driver
- fix probe defer path in mtk_mdp_comp
- fix identation of error messages
Changes since v4:
- fix missing regmap accessors in drm diver (patch 1)
- omit probe deffered warning on all drivers (patch 5)
- update drm and clk bindings (patch 6 and 7)
- put mmsys clock part in dts child node of mmsys. Only done
for HW where no dts backport compatible breakage is expected
(either DRM driver not yet implemented or no HW available to
the public) (patch 9 to 12)
Changes since v3:
- use platform device to probe clock driver
- add Acked-by CK Hu for the probe deferred patch
Changes since v2:
- fix kconfig typo (shame on me)
- delete __initconst from mm_clocks as converted to a platform driver
Changes since v1:
- add binding documentation
- ddp: use regmap_update_bits
- ddp: ignore EPROBE_DEFER on clock probing
- mfd: delete mmsys_private
- add Reviewed-by and Acked-by tags
MMSYS in Mediatek SoCs has some registers to control clock gates (which is
used in the clk driver) and some registers to set the routing and enable
the differnet blocks of the display subsystem.
Up to now both drivers, clock and drm are probed with the same device tree
compatible. But only the first driver get probed, which in effect breaks
graphics on mt8173 and mt2701.
This patch uses a platform device registration in the DRM driver, which
will trigger the probe of the corresponding clock driver. It was tested on the
bananapi-r2 and the Acer R13 Chromebook.
Matthias Brugger (12):
dt-bindings: display: mediatek: Add mmsys binding description
dt-bindings: mediatek: Add compatible for mt7623
drm/mediatek: Use regmap for register access
drm: mediatek: Omit warning on probe defers
media: mtk-mdp: Check return value of of_clk_get
clk: mediatek: mt2701: switch mmsys to platform device probing
clk: mediatek: mt2712e: switch to platform device probing
clk: mediatek: mt6779: switch mmsys to platform device probing
clk: mediatek: mt6797: switch to platform device probing
clk: mediatek: mt8183: switch mmsys to platform device probing
clk: mediatek: mt8173: switch mmsys to platform device probing
drm/mediatek: Add support for mmsys through a pdev
.../display/mediatek/mediatek,disp.txt | 30 ++++++-----
drivers/clk/mediatek/clk-mt2701-mm.c | 41 +++++++++-----
drivers/clk/mediatek/clk-mt2712-mm.c | 39 +++++++++-----
drivers/clk/mediatek/clk-mt6779-mm.c | 41 +++++++++-----
drivers/clk/mediatek/clk-mt6797-mm.c | 43 ++++++++++-----
drivers/clk/mediatek/clk-mt8173.c | 51 +++++++++++++++---
drivers/clk/mediatek/clk-mt8183-mm.c | 39 +++++++++-----
drivers/gpu/drm/mediatek/mtk_disp_color.c | 5 +-
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 5 +-
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 5 +-
drivers/gpu/drm/mediatek/mtk_dpi.c | 12 +++--
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 +-
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 54 +++++++++----------
drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 4 +-
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 35 +++++++++---
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 4 +-
drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++-
drivers/gpu/drm/mediatek/mtk_hdmi.c | 4 +-
drivers/media/platform/mtk-mdp/mtk_mdp_comp.c | 6 +++
19 files changed, 295 insertions(+), 135 deletions(-)
--
2.24.0
From: Matthias Brugger <[email protected]>
The MediaTek DRM has a block called mmsys, which sets
the routing and enalbes the different blocks.
This patch adds one line for the mmsys bindings description.
Signed-off-by: Matthias Brugger <[email protected]>
---
.../display/mediatek/mediatek,disp.txt | 28 ++++++++++---------
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
index 8469de510001..c71c8a4b73ff 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
@@ -27,20 +27,22 @@ Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt.
Required properties (all function blocks):
- compatible: "mediatek,<chip>-disp-<function>", one of
- "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
- "mediatek,<chip>-disp-rdma" - read DMA / line buffer
- "mediatek,<chip>-disp-wdma" - write DMA
- "mediatek,<chip>-disp-color" - color processor
- "mediatek,<chip>-disp-aal" - adaptive ambient light controller
- "mediatek,<chip>-disp-gamma" - gamma correction
- "mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
- "mediatek,<chip>-disp-split" - split stream to two encoders
- "mediatek,<chip>-disp-ufoe" - data compression engine
- "mediatek,<chip>-dsi" - DSI controller, see mediatek,dsi.txt
- "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
- "mediatek,<chip>-disp-mutex" - display mutex
- "mediatek,<chip>-disp-od" - overdrive
+ "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
+ "mediatek,<chip>-disp-rdma" - read DMA / line buffer
+ "mediatek,<chip>-disp-wdma" - write DMA
+ "mediatek,<chip>-disp-color" - color processor
+ "mediatek,<chip>-disp-aal" - adaptive ambient light controller
+ "mediatek,<chip>-disp-gamma" - gamma correction
+ "mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
+ "mediatek,<chip>-disp-split" - split stream to two encoders
+ "mediatek,<chip>-disp-ufoe" - data compression engine
+ "mediatek,<chip>-dsi" - DSI controller, see mediatek,dsi.txt
+ "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
+ "mediatek,<chip>-disp-mutex" - display mutex
+ "mediatek,<chip>-disp-od" - overdrive
+ "mediatek,<chip>-mmsys", "syscon" - provide clocks and components management
the supported chips are mt2701, mt2712 and mt8173.
+
- reg: Physical base address and length of the function block register space
- interrupts: The interrupt signal from the function block (required, except for
merge and split function blocks).
--
2.24.0
From: Matthias Brugger <[email protected]>
MediaTek mt7623 uses the mt2701 binings as fallback.
Document this in the binding description.
Signed-off-by: Matthias Brugger <[email protected]>
---
.../devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
index c71c8a4b73ff..a747895574f1 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
@@ -42,6 +42,8 @@ Required properties (all function blocks):
"mediatek,<chip>-disp-od" - overdrive
"mediatek,<chip>-mmsys", "syscon" - provide clocks and components management
the supported chips are mt2701, mt2712 and mt8173.
+ For mt7623, compatible must be:
+ "mediatek,mt7623-<component>" , "mediatek,mt2701-<component>"
- reg: Physical base address and length of the function block register space
- interrupts: The interrupt signal from the function block (required, except for
--
2.24.0
From: Matthias Brugger <[email protected]>
It can happen that the mmsys clock drivers aren't probed before the
platform driver gets invoked. The platform driver used to print a warning
that the driver failed to get the clocks. Omit this error on
the defered probe path.
Signed-off-by: Matthias Brugger <[email protected]>
---
drivers/gpu/drm/mediatek/mtk_disp_color.c | 5 ++++-
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 5 ++++-
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 5 ++++-
drivers/gpu/drm/mediatek/mtk_dpi.c | 12 +++++++++---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 +++-
drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++++++--
drivers/gpu/drm/mediatek/mtk_hdmi.c | 4 +++-
7 files changed, 33 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_color.c b/drivers/gpu/drm/mediatek/mtk_disp_color.c
index 59de2a46aa49..8f0fc96ef7bc 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_color.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_color.c
@@ -118,7 +118,10 @@ static int mtk_disp_color_probe(struct platform_device *pdev)
ret = mtk_ddp_comp_init(dev, dev->of_node, &priv->ddp_comp, comp_id,
&mtk_disp_color_funcs);
if (ret) {
- dev_err(dev, "Failed to initialize component: %d\n", ret);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "Failed to initialize component: %d\n",
+ ret);
+
return ret;
}
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index 21851756c579..7487b0182c05 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -285,7 +285,10 @@ static int mtk_disp_ovl_probe(struct platform_device *pdev)
ret = mtk_ddp_comp_init(dev, dev->of_node, &priv->ddp_comp, comp_id,
&mtk_disp_ovl_funcs);
if (ret) {
- dev_err(dev, "Failed to initialize component: %d\n", ret);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "Failed to initialize component: %d\n",
+ ret);
+
return ret;
}
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
index 405afef31407..835ea8f8dab9 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
@@ -287,7 +287,10 @@ static int mtk_disp_rdma_probe(struct platform_device *pdev)
ret = mtk_ddp_comp_init(dev, dev->of_node, &priv->ddp_comp, comp_id,
&mtk_disp_rdma_funcs);
if (ret) {
- dev_err(dev, "Failed to initialize component: %d\n", ret);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "Failed to initialize component: %d\n",
+ ret);
+
return ret;
}
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index be6d95c5ff25..9ed32470ad02 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -700,21 +700,27 @@ static int mtk_dpi_probe(struct platform_device *pdev)
dpi->engine_clk = devm_clk_get(dev, "engine");
if (IS_ERR(dpi->engine_clk)) {
ret = PTR_ERR(dpi->engine_clk);
- dev_err(dev, "Failed to get engine clock: %d\n", ret);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "Failed to get engine clock: %d\n", ret);
+
return ret;
}
dpi->pixel_clk = devm_clk_get(dev, "pixel");
if (IS_ERR(dpi->pixel_clk)) {
ret = PTR_ERR(dpi->pixel_clk);
- dev_err(dev, "Failed to get pixel clock: %d\n", ret);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "Failed to get pixel clock: %d\n", ret);
+
return ret;
}
dpi->tvd_clk = devm_clk_get(dev, "pll");
if (IS_ERR(dpi->tvd_clk)) {
ret = PTR_ERR(dpi->tvd_clk);
- dev_err(dev, "Failed to get tvdpll clock: %d\n", ret);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "Failed to get tvdpll clock: %d\n", ret);
+
return ret;
}
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index b765181223e6..6054e2b675f9 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -558,7 +558,9 @@ static int mtk_ddp_probe(struct platform_device *pdev)
ddp->clk = devm_clk_get(dev, NULL);
if (IS_ERR(ddp->clk)) {
- dev_err(dev, "Failed to get clock\n");
+ if (PTR_ERR(ddp->clk) != -EPROBE_DEFER)
+ dev_err(dev, "Failed to get clock\n");
+
return PTR_ERR(ddp->clk);
}
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 4332563df952..66d5b0fdd678 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -1110,14 +1110,18 @@ static int mtk_dsi_probe(struct platform_device *pdev)
dsi->engine_clk = devm_clk_get(dev, "engine");
if (IS_ERR(dsi->engine_clk)) {
ret = PTR_ERR(dsi->engine_clk);
- dev_err(dev, "Failed to get engine clock: %d\n", ret);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "Failed to get engine clock: %d\n", ret);
+
return ret;
}
dsi->digital_clk = devm_clk_get(dev, "digital");
if (IS_ERR(dsi->digital_clk)) {
ret = PTR_ERR(dsi->digital_clk);
- dev_err(dev, "Failed to get digital clock: %d\n", ret);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "Failed to get digital clock: %d\n", ret);
+
return ret;
}
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c
index ce91b61364eb..62f9ca2308ee 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
@@ -1447,7 +1447,9 @@ static int mtk_hdmi_dt_parse_pdata(struct mtk_hdmi *hdmi,
ret = mtk_hdmi_get_all_clk(hdmi, np);
if (ret) {
- dev_err(dev, "Failed to get clocks: %d\n", ret);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "Failed to get clocks: %d\n", ret);
+
return ret;
}
--
2.24.0
From: Matthias Brugger <[email protected]>
Check the return value of of_clk_get and print an error
message if not EPROBE_DEFER.
Signed-off-by: Matthias Brugger <[email protected]>
---
drivers/media/platform/mtk-mdp/mtk_mdp_comp.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c b/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c
index 9afe8161a8c0..4e2fc1337b80 100644
--- a/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c
+++ b/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c
@@ -110,6 +110,12 @@ int mtk_mdp_comp_init(struct device *dev, struct device_node *node,
for (i = 0; i < ARRAY_SIZE(comp->clk); i++) {
comp->clk[i] = of_clk_get(node, i);
+ if (IS_ERR(comp->clk[i])i) {
+ if (PTR_ERR(comp->clk[i] != -EPROBE_DEFER)
+ dev_err(dev, "Failed to get clock\n");
+
+ return PTR_ERR(comp->clk[i]);
+ }
/* Only RDMA needs two clocks */
if (comp->type != MTK_MDP_RDMA)
--
2.24.0
From: Matthias Brugger <[email protected]>
Switch probing for the MMSYS to support invocation to a plain
paltform device. The driver will be probed by the DRM subsystem.
Signed-off-by: Matthias Brugger <[email protected]>
---
drivers/clk/mediatek/clk-mt2701-mm.c | 41 ++++++++++++++++++++--------
1 file changed, 29 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt2701-mm.c b/drivers/clk/mediatek/clk-mt2701-mm.c
index 054b597d4a73..4a9433c2b2b8 100644
--- a/drivers/clk/mediatek/clk-mt2701-mm.c
+++ b/drivers/clk/mediatek/clk-mt2701-mm.c
@@ -4,14 +4,20 @@
* Author: Shunli Wang <[email protected]>
*/
+#include <linux/module.h>
#include <linux/clk-provider.h>
#include <linux/platform_device.h>
+#include <linux/slab.h>
#include "clk-mtk.h"
#include "clk-gate.h"
#include <dt-bindings/clock/mt2701-clk.h>
+struct clk_mt2701_mm_priv {
+ struct clk_onecell_data *clk_data;
+};
+
static const struct mtk_gate_regs disp0_cg_regs = {
.set_ofs = 0x0104,
.clr_ofs = 0x0108,
@@ -79,23 +85,25 @@ static const struct mtk_gate mm_clks[] = {
GATE_DISP1(CLK_MM_TVE_FMM, "mm_tve_fmm", "mm_sel", 14),
};
-static const struct of_device_id of_match_clk_mt2701_mm[] = {
- { .compatible = "mediatek,mt2701-mmsys", },
- {}
-};
-
static int clk_mt2701_mm_probe(struct platform_device *pdev)
{
- struct clk_onecell_data *clk_data;
int r;
- struct device_node *node = pdev->dev.of_node;
+ struct device_node *node = pdev->dev.parent->of_node;
+ struct clk_mt2701_mm_priv *private;
+
+ private = devm_kzalloc(&pdev->dev, sizeof(*private), GFP_KERNEL);
+ if (!private)
+ return -ENOMEM;
- clk_data = mtk_alloc_clk_data(CLK_MM_NR);
+ private->clk_data = mtk_alloc_clk_data(CLK_MM_NR);
+
+ platform_set_drvdata(pdev, private);
mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks),
- clk_data);
+ private->clk_data);
- r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+ r = of_clk_add_provider(node, of_clk_src_onecell_get,
+ private->clk_data);
if (r)
dev_err(&pdev->dev,
"could not register clock provider: %s: %d\n",
@@ -104,12 +112,21 @@ static int clk_mt2701_mm_probe(struct platform_device *pdev)
return r;
}
+static int clk_mt2701_mm_remove(struct platform_device *pdev)
+{
+ struct clk_mt2701_mm_priv *private = platform_get_drvdata(pdev);
+
+ kfree(private->clk_data);
+
+ return 0;
+}
+
static struct platform_driver clk_mt2701_mm_drv = {
.probe = clk_mt2701_mm_probe,
+ .remove = clk_mt2701_mm_remove,
.driver = {
.name = "clk-mt2701-mm",
- .of_match_table = of_match_clk_mt2701_mm,
},
};
-builtin_platform_driver(clk_mt2701_mm_drv);
+module_platform_driver(clk_mt2701_mm_drv);
--
2.24.0
From: Matthias Brugger <[email protected]>
The mmsys memory space is shared between the drm and the
clk driver. Use regmap to access it.
Signed-off-by: Matthias Brugger <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 +-
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 50 +++++++++++--------------
drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 4 +-
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 13 ++-----
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 +-
5 files changed, 30 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
index 34a731755791..259e2f4fa5fa 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
@@ -27,7 +27,7 @@
* @enabled: records whether crtc_enable succeeded
* @planes: array of 4 drm_plane structures, one for each overlay plane
* @pending_planes: whether any plane has pending changes to be applied
- * @config_regs: memory mapped mmsys configuration register space
+ * @config_regs: regmap mapped mmsys configuration register space
* @mutex: handle to one of the ten disp_mutex streams
* @ddp_comp_nr: number of components in ddp_comp
* @ddp_comp: array of pointers the mtk_ddp_comp structures used by this crtc
@@ -43,7 +43,7 @@ struct mtk_drm_crtc {
unsigned int layer_nr;
bool pending_planes;
- void __iomem *config_regs;
+ struct regmap *config_regs;
struct mtk_disp_mutex *mutex;
unsigned int ddp_comp_nr;
struct mtk_ddp_comp **ddp_comp;
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 8106a71a7404..b765181223e6 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -331,61 +331,53 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
return value;
}
-static void mtk_ddp_sout_sel(void __iomem *config_regs,
+static void mtk_ddp_sout_sel(struct regmap *config_regs,
enum mtk_ddp_comp_id cur,
enum mtk_ddp_comp_id next)
{
if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
- writel_relaxed(BLS_TO_DSI_RDMA1_TO_DPI1,
- config_regs + DISP_REG_CONFIG_OUT_SEL);
+ regmap_write(config_regs, DISP_REG_CONFIG_OUT_SEL,
+ BLS_TO_DSI_RDMA1_TO_DPI1);
} else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DPI0) {
- writel_relaxed(BLS_TO_DPI_RDMA1_TO_DSI,
- config_regs + DISP_REG_CONFIG_OUT_SEL);
- writel_relaxed(DSI_SEL_IN_RDMA,
- config_regs + DISP_REG_CONFIG_DSI_SEL);
- writel_relaxed(DPI_SEL_IN_BLS,
- config_regs + DISP_REG_CONFIG_DPI_SEL);
+ regmap_write(config_regs, DISP_REG_CONFIG_OUT_SEL,
+ BLS_TO_DPI_RDMA1_TO_DSI);
+ regmap_write(config_regs, DISP_REG_CONFIG_DSI_SEL,
+ DSI_SEL_IN_RDMA);
+ regmap_write(config_regs, DISP_REG_CONFIG_DPI_SEL,
+ DPI_SEL_IN_BLS);
}
}
-void mtk_ddp_add_comp_to_path(void __iomem *config_regs,
+void mtk_ddp_add_comp_to_path(struct regmap *config_regs,
enum mtk_ddp_comp_id cur,
enum mtk_ddp_comp_id next)
{
- unsigned int addr, value, reg;
+ unsigned int addr, value;
value = mtk_ddp_mout_en(cur, next, &addr);
- if (value) {
- reg = readl_relaxed(config_regs + addr) | value;
- writel_relaxed(reg, config_regs + addr);
- }
+ if (value)
+ regmap_update_bits(config_regs, addr, value, value);
mtk_ddp_sout_sel(config_regs, cur, next);
value = mtk_ddp_sel_in(cur, next, &addr);
- if (value) {
- reg = readl_relaxed(config_regs + addr) | value;
- writel_relaxed(reg, config_regs + addr);
- }
+ if (value)
+ regmap_update_bits(config_regs, addr, value, value);
}
-void mtk_ddp_remove_comp_from_path(void __iomem *config_regs,
+void mtk_ddp_remove_comp_from_path(struct regmap *config_regs,
enum mtk_ddp_comp_id cur,
enum mtk_ddp_comp_id next)
{
- unsigned int addr, value, reg;
+ unsigned int addr, value;
value = mtk_ddp_mout_en(cur, next, &addr);
- if (value) {
- reg = readl_relaxed(config_regs + addr) & ~value;
- writel_relaxed(reg, config_regs + addr);
- }
+ if (value)
+ regmap_update_bits(config_regs, addr, value, 0);
value = mtk_ddp_sel_in(cur, next, &addr);
- if (value) {
- reg = readl_relaxed(config_regs + addr) & ~value;
- writel_relaxed(reg, config_regs + addr);
- }
+ if (value)
+ regmap_update_bits(config_regs, addr, value, 0);
}
struct mtk_disp_mutex *mtk_disp_mutex_get(struct device *dev, unsigned int id)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp.h
index 827be424a148..01ff8b68881f 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.h
@@ -12,10 +12,10 @@ struct regmap;
struct device;
struct mtk_disp_mutex;
-void mtk_ddp_add_comp_to_path(void __iomem *config_regs,
+void mtk_ddp_add_comp_to_path(struct regmap *config_regs,
enum mtk_ddp_comp_id cur,
enum mtk_ddp_comp_id next);
-void mtk_ddp_remove_comp_from_path(void __iomem *config_regs,
+void mtk_ddp_remove_comp_from_path(struct regmap *config_regs,
enum mtk_ddp_comp_id cur,
enum mtk_ddp_comp_id next);
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index 352b81a7a670..210455e9f46c 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -6,6 +6,7 @@
#include <linux/component.h>
#include <linux/iommu.h>
+#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
@@ -485,7 +486,6 @@ static int mtk_drm_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct mtk_drm_private *private;
- struct resource *mem;
struct device_node *node;
struct component_match *match = NULL;
int ret;
@@ -499,14 +499,9 @@ static int mtk_drm_probe(struct platform_device *pdev)
INIT_WORK(&private->commit.work, mtk_atomic_work);
private->data = of_device_get_match_data(dev);
- mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- private->config_regs = devm_ioremap_resource(dev, mem);
- if (IS_ERR(private->config_regs)) {
- ret = PTR_ERR(private->config_regs);
- dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
- ret);
- return ret;
- }
+ private->config_regs = syscon_node_to_regmap(dev->of_node);
+ if (IS_ERR(private->config_regs))
+ return PTR_ERR(private->config_regs);
/* Iterate over sibling DISP function blocks */
for_each_child_of_node(dev->of_node->parent, node) {
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
index e03fea12ff59..63a121577dcb 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
@@ -39,7 +39,7 @@ struct mtk_drm_private {
struct device_node *mutex_node;
struct device *mutex_dev;
- void __iomem *config_regs;
+ struct regmap *config_regs;
struct device_node *comp_node[DDP_COMPONENT_ID_MAX];
struct mtk_ddp_comp *ddp_comp[DDP_COMPONENT_ID_MAX];
const struct mtk_mmsys_driver_data *data;
--
2.24.0
From: Matthias Brugger <[email protected]>
Switch probing for the MMSYS to support invocation to a
plain paltform device. The driver will be probed by the DRM subsystem.
Signed-off-by: Matthias Brugger <[email protected]>
---
drivers/clk/mediatek/clk-mt2712-mm.c | 39 +++++++++++++++++++---------
1 file changed, 27 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt2712-mm.c b/drivers/clk/mediatek/clk-mt2712-mm.c
index 1c5948be35f3..d018db568263 100644
--- a/drivers/clk/mediatek/clk-mt2712-mm.c
+++ b/drivers/clk/mediatek/clk-mt2712-mm.c
@@ -4,14 +4,20 @@
* Author: Weiyi Lu <[email protected]>
*/
+#include <linux/module.h>
#include <linux/clk-provider.h>
#include <linux/platform_device.h>
+#include <linux/slab.h>
#include "clk-mtk.h"
#include "clk-gate.h"
#include <dt-bindings/clock/mt2712-clk.h>
+struct clk_mt2712_mm_priv {
+ struct clk_onecell_data *clk_data;
+};
+
static const struct mtk_gate_regs mm0_cg_regs = {
.set_ofs = 0x104,
.clr_ofs = 0x108,
@@ -128,16 +134,22 @@ static const struct mtk_gate mm_clks[] = {
static int clk_mt2712_mm_probe(struct platform_device *pdev)
{
- struct clk_onecell_data *clk_data;
int r;
- struct device_node *node = pdev->dev.of_node;
+ struct device_node *node = pdev->dev.parent->of_node;
+ struct clk_mt2712_mm_priv *private;
+
+ private = devm_kzalloc(&pdev->dev, sizeof(*private), GFP_KERNEL);
+ if (!private)
+ return -ENOMEM;
- clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
+ private->clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
+ platform_set_drvdata(pdev, private);
mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks),
- clk_data);
+ private->clk_data);
- r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+ r = of_clk_add_provider(node, of_clk_src_onecell_get,
+ private->clk_data);
if (r != 0)
pr_err("%s(): could not register clock provider: %d\n",
@@ -146,17 +158,20 @@ static int clk_mt2712_mm_probe(struct platform_device *pdev)
return r;
}
-static const struct of_device_id of_match_clk_mt2712_mm[] = {
- { .compatible = "mediatek,mt2712-mmsys", },
- {}
-};
+static int clk_mt2712_mm_remove(struct platform_device *pdev)
+{
+ struct clk_mt2712_mm_priv *private = platform_get_drvdata(pdev);
+
+ kfree(private->clk_data);
+
+ return 0;
+}
static struct platform_driver clk_mt2712_mm_drv = {
.probe = clk_mt2712_mm_probe,
+ .remove = clk_mt2712_mm_remove,
.driver = {
.name = "clk-mt2712-mm",
- .of_match_table = of_match_clk_mt2712_mm,
},
};
-
-builtin_platform_driver(clk_mt2712_mm_drv);
+module_platform_driver(clk_mt2712_mm_drv);
--
2.24.0
From: Matthias Brugger <[email protected]>
Switch probing for the MMSYS to support invocation to a
plain paltform device. The driver will be probed by the DRM subsystem.
Singed-off-by: Matthias Brugger <[email protected]>
---
drivers/clk/mediatek/clk-mt8183-mm.c | 39 +++++++++++++++++++---------
1 file changed, 27 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8183-mm.c b/drivers/clk/mediatek/clk-mt8183-mm.c
index 720c696b506d..e6dcad18d81a 100644
--- a/drivers/clk/mediatek/clk-mt8183-mm.c
+++ b/drivers/clk/mediatek/clk-mt8183-mm.c
@@ -3,14 +3,20 @@
// Copyright (c) 2018 MediaTek Inc.
// Author: Weiyi Lu <[email protected]>
+#include <linux/module.h>
#include <linux/clk-provider.h>
#include <linux/platform_device.h>
+#include <linux/slab.h>
#include "clk-mtk.h"
#include "clk-gate.h"
#include <dt-bindings/clock/mt8183-clk.h>
+struct clk_mt8183_mm_priv {
+ struct clk_onecell_data *clk_data;
+};
+
static const struct mtk_gate_regs mm0_cg_regs = {
.set_ofs = 0x104,
.clr_ofs = 0x108,
@@ -84,28 +90,37 @@ static const struct mtk_gate mm_clks[] = {
static int clk_mt8183_mm_probe(struct platform_device *pdev)
{
- struct clk_onecell_data *clk_data;
- struct device_node *node = pdev->dev.of_node;
+ struct clk_mt8183_mm_priv *private;
+ struct device_node *node = pdev->dev.parent->of_node;
+
+ private = devm_kzalloc(&pdev->dev, sizeof(*private), GFP_KERNEL);
+ if (!private)
+ return -ENOMEM;
- clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
+ private->clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
+ platform_set_drvdata(pdev, private);
mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks),
- clk_data);
+ private->clk_data);
- return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+ return of_clk_add_provider(node, of_clk_src_onecell_get,
+ private->clk_data);
}
-static const struct of_device_id of_match_clk_mt8183_mm[] = {
- { .compatible = "mediatek,mt8183-mmsys", },
- {}
-};
+static int clk_mt8183_mm_remove(struct platform_device *pdev)
+{
+ struct clk_mt8183_mm_priv *private = platform_get_drvdata(pdev);
+
+ kfree(private->clk_data);
+
+ return 0;
+}
static struct platform_driver clk_mt8183_mm_drv = {
.probe = clk_mt8183_mm_probe,
+ .remove = clk_mt8183_mm_remove,
.driver = {
.name = "clk-mt8183-mm",
- .of_match_table = of_match_clk_mt8183_mm,
},
};
-
-builtin_platform_driver(clk_mt8183_mm_drv);
+module_platform_driver(clk_mt8183_mm_drv);
--
2.24.0
From: Matthias Brugger <[email protected]>
Switch probing for the MMSYS to support invocation to a
plain paltform device. The driver will be probed by the DRM subsystem.
Singed-off-by: Matthias Brugger <[email protected]>
---
drivers/clk/mediatek/clk-mt6779-mm.c | 41 +++++++++++++++++++---------
1 file changed, 28 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt6779-mm.c b/drivers/clk/mediatek/clk-mt6779-mm.c
index fb5fbb8e3e41..439ec460c166 100644
--- a/drivers/clk/mediatek/clk-mt6779-mm.c
+++ b/drivers/clk/mediatek/clk-mt6779-mm.c
@@ -4,13 +4,19 @@
* Author: Wendell Lin <[email protected]>
*/
+#include <linux/module.h>
#include <linux/clk-provider.h>
#include <linux/platform_device.h>
#include <dt-bindings/clock/mt6779-clk.h>
+#include <linux/slab.h>
#include "clk-mtk.h"
#include "clk-gate.h"
+struct clk_mt6779_mm_priv {
+ struct clk_onecell_data *clk_data;
+};
+
static const struct mtk_gate_regs mm0_cg_regs = {
.set_ofs = 0x0104,
.clr_ofs = 0x0108,
@@ -84,30 +90,39 @@ static const struct mtk_gate mm_clks[] = {
GATE_MM1(CLK_MM_DISP_OVL_FBDC, "mm_disp_ovl_fbdc", "mm_sel", 16),
};
-static const struct of_device_id of_match_clk_mt6779_mm[] = {
- { .compatible = "mediatek,mt6779-mmsys", },
- {}
-};
-
static int clk_mt6779_mm_probe(struct platform_device *pdev)
{
- struct clk_onecell_data *clk_data;
- struct device_node *node = pdev->dev.of_node;
+ struct clk_mt6779_mm_priv *private;
+ struct device_node *node = pdev->dev.parent->of_node;
+
+ private = devm_kzalloc(&pdev->dev, sizeof(*private), GFP_KERNEL);
+ if (!private)
+ return -ENOMEM;
- clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
+ private->clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
+ platform_set_drvdata(pdev, private);
mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks),
- clk_data);
+ private->clk_data);
- return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+ return of_clk_add_provider(node, of_clk_src_onecell_get,
+ private->clk_data);
+}
+
+static int clk_mt6779_mm_remove(struct platform_device *pdev)
+{
+ struct clk_mt6779_mm_priv *private = platform_get_drvdata(pdev);
+
+ kfree(private->clk_data);
+
+ return 0;
}
static struct platform_driver clk_mt6779_mm_drv = {
.probe = clk_mt6779_mm_probe,
+ .remove = clk_mt6779_mm_remove,
.driver = {
.name = "clk-mt6779-mm",
- .of_match_table = of_match_clk_mt6779_mm,
},
};
-
-builtin_platform_driver(clk_mt6779_mm_drv);
+module_platform_driver(clk_mt6779_mm_drv);
--
2.24.0
From: Matthias Brugger <[email protected]>
Switch probing for the MMSYS to support invocation to a
plain paltform device. The driver will be probed by the DRM subsystem.
Signed-off-by: Matthias Brugger <[email protected]>
---
drivers/clk/mediatek/clk-mt6797-mm.c | 43 +++++++++++++++++++---------
1 file changed, 29 insertions(+), 14 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt6797-mm.c b/drivers/clk/mediatek/clk-mt6797-mm.c
index 8f05653b387d..1aea4f8d5a9d 100644
--- a/drivers/clk/mediatek/clk-mt6797-mm.c
+++ b/drivers/clk/mediatek/clk-mt6797-mm.c
@@ -4,13 +4,19 @@
* Author: Kevin Chen <[email protected]>
*/
+#include <linux/module.h>
#include <linux/clk-provider.h>
#include <linux/platform_device.h>
+#include <linux/slab.h>
#include <dt-bindings/clock/mt6797-clk.h>
#include "clk-mtk.h"
#include "clk-gate.h"
+struct clk_mt6797_mm_priv {
+ struct clk_onecell_data *clk_data;
+};
+
static const struct mtk_gate_regs mm0_cg_regs = {
.set_ofs = 0x0104,
.clr_ofs = 0x0108,
@@ -92,23 +98,24 @@ static const struct mtk_gate mm_clks[] = {
"clk26m", 3),
};
-static const struct of_device_id of_match_clk_mt6797_mm[] = {
- { .compatible = "mediatek,mt6797-mmsys", },
- {}
-};
-
static int clk_mt6797_mm_probe(struct platform_device *pdev)
{
- struct clk_onecell_data *clk_data;
+ struct clk_mt6797_mm_priv *private;
int r;
- struct device_node *node = pdev->dev.of_node;
+ struct device *parent = pdev->dev.parent;
+
+ private = devm_kzalloc(&pdev->dev, sizeof(*private), GFP_KERNEL);
+ if (!private)
+ return -ENOMEM;
- clk_data = mtk_alloc_clk_data(CLK_MM_NR);
+ private->clk_data = mtk_alloc_clk_data(CLK_MM_NR);
+ platform_set_drvdata(pdev, private);
- mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks),
- clk_data);
+ mtk_clk_register_gates(parent->of_node, mm_clks, ARRAY_SIZE(mm_clks),
+ private->clk_data);
- r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+ r = of_clk_add_provider(parent->of_node, of_clk_src_onecell_get,
+ private->clk_data);
if (r)
dev_err(&pdev->dev,
"could not register clock provider: %s: %d\n",
@@ -117,12 +124,20 @@ static int clk_mt6797_mm_probe(struct platform_device *pdev)
return r;
}
+static int clk_mt6797_mm_remove(struct platform_device *pdev)
+{
+ struct clk_mt6797_mm_priv *private = platform_get_drvdata(pdev);
+
+ kfree(private->clk_data);
+
+ return 0;
+}
+
static struct platform_driver clk_mt6797_mm_drv = {
.probe = clk_mt6797_mm_probe,
+ .remove = clk_mt6797_mm_remove,
.driver = {
.name = "clk-mt6797-mm",
- .of_match_table = of_match_clk_mt6797_mm,
},
};
-
-builtin_platform_driver(clk_mt6797_mm_drv);
+module_platform_driver(clk_mt6797_mm_drv);
--
2.24.0
From: Matthias Brugger <[email protected]>
The MMSYS subsystem includes clocks and drm components.
This patch adds an initailization path through a platform device
for the clock part, so that both drivers get probed from the same
device tree compatible.
Signed-off-by: Matthias Brugger <[email protected]>
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 24 ++++++++++++++++++++++++
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 ++
2 files changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index 210455e9f46c..5ada74d8d0c9 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -186,6 +186,7 @@ static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
.ext_path = mt2701_mtk_ddp_ext,
.ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext),
.shadow_register = true,
+ .clk_drv_name = "clk-mt2701-mm",
};
static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
@@ -195,6 +196,7 @@ static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
.ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext),
.third_path = mt2712_mtk_ddp_third,
.third_len = ARRAY_SIZE(mt2712_mtk_ddp_third),
+ .clk_drv_name = "clk-mt2712-mm",
};
static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
@@ -202,6 +204,7 @@ static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
.main_len = ARRAY_SIZE(mt8173_mtk_ddp_main),
.ext_path = mt8173_mtk_ddp_ext,
.ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
+ .clk_drv_name = "clk-mt8173-mm",
};
static int mtk_drm_kms_init(struct drm_device *drm)
@@ -499,6 +502,24 @@ static int mtk_drm_probe(struct platform_device *pdev)
INIT_WORK(&private->commit.work, mtk_atomic_work);
private->data = of_device_get_match_data(dev);
+ /*
+ * MMSYS includes apart from components management a block providing
+ * clocks for the subsystem. We probe this clock driver via a platform
+ * device.
+ */
+ if (private->data->clk_drv_name) {
+ private->clk_dev = platform_device_register_data(dev,
+ private->data->clk_drv_name, -1,
+ NULL, 0);
+
+ if (IS_ERR(private->clk_dev)) {
+ dev_err(dev, "failed to register %s platform device\n",
+ private->data->clk_drv_name);
+
+ return PTR_ERR(private->clk_dev);
+ }
+ }
+
private->config_regs = syscon_node_to_regmap(dev->of_node);
if (IS_ERR(private->config_regs))
return PTR_ERR(private->config_regs);
@@ -605,6 +626,9 @@ static int mtk_drm_remove(struct platform_device *pdev)
for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
of_node_put(private->comp_node[i]);
+ if (private->clk_dev)
+ platform_device_unregister(private->clk_dev);
+
return 0;
}
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
index 63a121577dcb..8fe9136adc38 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
@@ -29,11 +29,13 @@ struct mtk_mmsys_driver_data {
unsigned int third_len;
bool shadow_register;
+ const char *clk_drv_name;
};
struct mtk_drm_private {
struct drm_device *drm;
struct device *dma_dev;
+ struct platform_device *clk_dev;
unsigned int num_pipes;
--
2.24.0
From: Matthias Brugger <[email protected]>
Switch probing for the MMSYS to support invocation to a
plain paltform device. The driver will be probed by the DRM subsystem.
Signed-off-by: Matthias Brugger <[email protected]>
---
drivers/clk/mediatek/clk-mt8173.c | 51 ++++++++++++++++++++++++++-----
1 file changed, 44 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c
index 537a7f49b0f7..1e6a390534e4 100644
--- a/drivers/clk/mediatek/clk-mt8173.c
+++ b/drivers/clk/mediatek/clk-mt8173.c
@@ -5,8 +5,11 @@
*/
#include <linux/clk.h>
+#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
#include "clk-mtk.h"
#include "clk-gate.h"
@@ -783,7 +786,7 @@ static const struct mtk_gate_regs mm1_cg_regs __initconst = {
.ops = &mtk_clk_gate_ops_setclr, \
}
-static const struct mtk_gate mm_clks[] __initconst = {
+static const struct mtk_gate mm_clks[] = {
/* MM0 */
GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "mm_sel", 0),
GATE_MM0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1),
@@ -1144,22 +1147,56 @@ static void __init mtk_imgsys_init(struct device_node *node)
}
CLK_OF_DECLARE(mtk_imgsys, "mediatek,mt8173-imgsys", mtk_imgsys_init);
-static void __init mtk_mmsys_init(struct device_node *node)
-{
+struct mtk_mmsys_priv {
struct clk_onecell_data *clk_data;
+};
+
+static int mtk_mmsys_probe(struct platform_device *pdev)
+{
int r;
+ struct device_node *node;
+ struct mtk_mmsys_priv *private;
+
+ node = pdev->dev.parent->of_node;
- clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
+ private = devm_kzalloc(&pdev->dev, sizeof(*private), GFP_KERNEL);
+ if (!private)
+ return -ENOMEM;
+
+ private->clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
+
+ platform_set_drvdata(pdev, private);
mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks),
- clk_data);
+ private->clk_data);
- r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+ r = of_clk_add_provider(node, of_clk_src_onecell_get,
+ private->clk_data);
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
+
+ return r;
+}
+
+static int mtk_mmsys_remove(struct platform_device *pdev)
+{
+ struct mtk_mmsys_priv *private;
+ private = platform_get_drvdata(pdev);
+
+ kfree(private->clk_data);
+
+ return 0;
}
-CLK_OF_DECLARE(mtk_mmsys, "mediatek,mt8173-mmsys", mtk_mmsys_init);
+
+static struct platform_driver clk_mt8173_mm_drv = {
+ .probe = mtk_mmsys_probe,
+ .remove = mtk_mmsys_remove,
+ .driver = {
+ .name = "clk-mt8173-mm",
+ },
+};
+module_platform_driver(clk_mt8173_mm_drv);
static void __init mtk_vdecsys_init(struct device_node *node)
{
--
2.24.0