GPIOs that can be configured as wakeup sources, have their interrupt
lines routed to PDC interrupt controller.
Add PDC wakeup interrupt map for sc7180 GPIOs.
This series has dependency on adding device tree support for sc7180 [1]
and support wakeup capable GPIOs [2] to merge first.
Dependencies:
[1] https://lkml.org/lkml/2019/10/23/223
[2] https://lkml.org/lkml/2019/9/13/1005
Maulik Shah (2):
pinctrl: qcom: sc7180: Add GPIO wakeup interrupt map
arm64: dts: qcom: sc7180: Add wakeup parent for TLMM
arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 +
drivers/pinctrl/qcom/pinctrl-sc7180.c | 18 ++++++++++++++++++
2 files changed, 19 insertions(+)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
GPIOs that can be configured as wakeup sources, have their
interrupt lines routed to PDC interrupt controller.
Provide the interrupt map of the GPIO to its wakeup capable
interrupt parent.
Signed-off-by: Maulik Shah <[email protected]>
---
drivers/pinctrl/qcom/pinctrl-sc7180.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-sc7180.c b/drivers/pinctrl/qcom/pinctrl-sc7180.c
index 6399c8a..8a2b97c 100644
--- a/drivers/pinctrl/qcom/pinctrl-sc7180.c
+++ b/drivers/pinctrl/qcom/pinctrl-sc7180.c
@@ -1097,6 +1097,22 @@ static const struct msm_pingroup sc7180_groups[] = {
[126] = SDC_QDSD_PINGROUP(sdc2_data, 0x97b000, 9, 0),
};
+static const struct msm_gpio_wakeirq_map sc7180_pdc_map[] = {
+ {0, 40}, {3, 50}, {4, 42}, {5, 70}, {6, 41}, {9, 35},
+ {10, 80}, {11, 51}, {16, 20}, {21, 55}, {22, 90}, {23, 21},
+ {24, 61}, {26, 52}, {28, 36}, {30, 100}, {31, 33}, {32, 81},
+ {33, 62}, {34, 43}, {36, 91}, {37, 53}, {38, 63}, {39, 72},
+ {41, 101}, {42, 7}, {43, 34}, {45, 73}, {47, 82}, {49, 17},
+ {52, 109}, {53, 102}, {55, 92}, {56, 56}, {57, 57}, {58, 83},
+ {59, 37}, {62, 110}, {63, 111}, {64, 74}, {65, 44}, {66, 93},
+ {67, 58}, {68, 112}, {69, 32}, {70, 54}, {72, 59}, {73, 64},
+ {74, 71}, {78, 31}, {82, 30}, {85, 103}, {86, 38}, {87, 39},
+ {88, 45}, {89, 46}, {90, 47}, {91, 48}, {92, 60}, {93, 49},
+ {94, 84}, {95, 94}, {98, 65}, {101, 66}, {104, 67}, {109, 104},
+ {110, 68}, {113, 69}, {114, 113}, {115, 108}, {116, 121},
+ {117, 114}, {118, 119},
+};
+
static const struct msm_pinctrl_soc_data sc7180_pinctrl = {
.pins = sc7180_pins,
.npins = ARRAY_SIZE(sc7180_pins),
@@ -1107,6 +1123,8 @@ static const struct msm_pinctrl_soc_data sc7180_pinctrl = {
.ngpios = 120,
.tiles = sc7180_tiles,
.ntiles = ARRAY_SIZE(sc7180_tiles),
+ .wakeirq_map = sc7180_pdc_map,
+ .nwakeirq_map = ARRAY_SIZE(sc7180_pdc_map),
};
static int sc7180_pinctrl_probe(struct platform_device *pdev)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
Specify wakeup parent irqchip for sc7180 TLMM.
Cc: [email protected]
Signed-off-by: Maulik Shah <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 69d5e2c..9040eee 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -321,6 +321,7 @@
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&tlmm 0 0 120>;
+ wakeup-parent = <&pdc>;
qup_uart2_default: qup-uart2-default {
pinmux {
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
On Wed, Oct 30, 2019 at 8:07 AM Maulik Shah <[email protected]> wrote:
> GPIOs that can be configured as wakeup sources, have their
> interrupt lines routed to PDC interrupt controller.
>
> Provide the interrupt map of the GPIO to its wakeup capable
> interrupt parent.
>
> Signed-off-by: Maulik Shah <[email protected]>
Looks good to me but I'd like to see Bjorns and preferably also
Lina's review on this.
Yours,
Linus Walleij
On Wed, Oct 30 2019 at 01:07 -0600, Maulik Shah wrote:
>GPIOs that can be configured as wakeup sources, have their
>interrupt lines routed to PDC interrupt controller.
>
>Provide the interrupt map of the GPIO to its wakeup capable
>interrupt parent.
>
>Signed-off-by: Maulik Shah <[email protected]>
Reviewed-by: Lina Iyer <[email protected]>
>---
> drivers/pinctrl/qcom/pinctrl-sc7180.c | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
>diff --git a/drivers/pinctrl/qcom/pinctrl-sc7180.c b/drivers/pinctrl/qcom/pinctrl-sc7180.c
>index 6399c8a..8a2b97c 100644
>--- a/drivers/pinctrl/qcom/pinctrl-sc7180.c
>+++ b/drivers/pinctrl/qcom/pinctrl-sc7180.c
>@@ -1097,6 +1097,22 @@ static const struct msm_pingroup sc7180_groups[] = {
> [126] = SDC_QDSD_PINGROUP(sdc2_data, 0x97b000, 9, 0),
> };
>
>+static const struct msm_gpio_wakeirq_map sc7180_pdc_map[] = {
>+ {0, 40}, {3, 50}, {4, 42}, {5, 70}, {6, 41}, {9, 35},
>+ {10, 80}, {11, 51}, {16, 20}, {21, 55}, {22, 90}, {23, 21},
>+ {24, 61}, {26, 52}, {28, 36}, {30, 100}, {31, 33}, {32, 81},
>+ {33, 62}, {34, 43}, {36, 91}, {37, 53}, {38, 63}, {39, 72},
>+ {41, 101}, {42, 7}, {43, 34}, {45, 73}, {47, 82}, {49, 17},
>+ {52, 109}, {53, 102}, {55, 92}, {56, 56}, {57, 57}, {58, 83},
>+ {59, 37}, {62, 110}, {63, 111}, {64, 74}, {65, 44}, {66, 93},
>+ {67, 58}, {68, 112}, {69, 32}, {70, 54}, {72, 59}, {73, 64},
>+ {74, 71}, {78, 31}, {82, 30}, {85, 103}, {86, 38}, {87, 39},
>+ {88, 45}, {89, 46}, {90, 47}, {91, 48}, {92, 60}, {93, 49},
>+ {94, 84}, {95, 94}, {98, 65}, {101, 66}, {104, 67}, {109, 104},
>+ {110, 68}, {113, 69}, {114, 113}, {115, 108}, {116, 121},
>+ {117, 114}, {118, 119},
>+};
>+
> static const struct msm_pinctrl_soc_data sc7180_pinctrl = {
> .pins = sc7180_pins,
> .npins = ARRAY_SIZE(sc7180_pins),
>@@ -1107,6 +1123,8 @@ static const struct msm_pinctrl_soc_data sc7180_pinctrl = {
> .ngpios = 120,
> .tiles = sc7180_tiles,
> .ntiles = ARRAY_SIZE(sc7180_tiles),
>+ .wakeirq_map = sc7180_pdc_map,
>+ .nwakeirq_map = ARRAY_SIZE(sc7180_pdc_map),
> };
>
> static int sc7180_pinctrl_probe(struct platform_device *pdev)
>--
>QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
>of Code Aurora Forum, hosted by The Linux Foundation
>
On Wed, Oct 30 2019 at 01:07 -0600, Maulik Shah wrote:
>Specify wakeup parent irqchip for sc7180 TLMM.
>
>Cc: [email protected]
>Signed-off-by: Maulik Shah <[email protected]>
Reviewed-by: Lina Iyer <[email protected]>
>---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
>diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
>index 69d5e2c..9040eee 100644
>--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
>+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
>@@ -321,6 +321,7 @@
> interrupt-controller;
> #interrupt-cells = <2>;
> gpio-ranges = <&tlmm 0 0 120>;
>+ wakeup-parent = <&pdc>;
>
> qup_uart2_default: qup-uart2-default {
> pinmux {
>--
>QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
>of Code Aurora Forum, hosted by The Linux Foundation
>
On Wed 30 Oct 00:06 PDT 2019, Maulik Shah wrote:
> GPIOs that can be configured as wakeup sources, have their
> interrupt lines routed to PDC interrupt controller.
>
> Provide the interrupt map of the GPIO to its wakeup capable
> interrupt parent.
>
> Signed-off-by: Maulik Shah <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
@Linus, please take this patch through your tree and I'll take patch 2
through the arm tree.
Regards,
Bjorn
> ---
> drivers/pinctrl/qcom/pinctrl-sc7180.c | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-sc7180.c b/drivers/pinctrl/qcom/pinctrl-sc7180.c
> index 6399c8a..8a2b97c 100644
> --- a/drivers/pinctrl/qcom/pinctrl-sc7180.c
> +++ b/drivers/pinctrl/qcom/pinctrl-sc7180.c
> @@ -1097,6 +1097,22 @@ static const struct msm_pingroup sc7180_groups[] = {
> [126] = SDC_QDSD_PINGROUP(sdc2_data, 0x97b000, 9, 0),
> };
>
> +static const struct msm_gpio_wakeirq_map sc7180_pdc_map[] = {
> + {0, 40}, {3, 50}, {4, 42}, {5, 70}, {6, 41}, {9, 35},
> + {10, 80}, {11, 51}, {16, 20}, {21, 55}, {22, 90}, {23, 21},
> + {24, 61}, {26, 52}, {28, 36}, {30, 100}, {31, 33}, {32, 81},
> + {33, 62}, {34, 43}, {36, 91}, {37, 53}, {38, 63}, {39, 72},
> + {41, 101}, {42, 7}, {43, 34}, {45, 73}, {47, 82}, {49, 17},
> + {52, 109}, {53, 102}, {55, 92}, {56, 56}, {57, 57}, {58, 83},
> + {59, 37}, {62, 110}, {63, 111}, {64, 74}, {65, 44}, {66, 93},
> + {67, 58}, {68, 112}, {69, 32}, {70, 54}, {72, 59}, {73, 64},
> + {74, 71}, {78, 31}, {82, 30}, {85, 103}, {86, 38}, {87, 39},
> + {88, 45}, {89, 46}, {90, 47}, {91, 48}, {92, 60}, {93, 49},
> + {94, 84}, {95, 94}, {98, 65}, {101, 66}, {104, 67}, {109, 104},
> + {110, 68}, {113, 69}, {114, 113}, {115, 108}, {116, 121},
> + {117, 114}, {118, 119},
> +};
> +
> static const struct msm_pinctrl_soc_data sc7180_pinctrl = {
> .pins = sc7180_pins,
> .npins = ARRAY_SIZE(sc7180_pins),
> @@ -1107,6 +1123,8 @@ static const struct msm_pinctrl_soc_data sc7180_pinctrl = {
> .ngpios = 120,
> .tiles = sc7180_tiles,
> .ntiles = ARRAY_SIZE(sc7180_tiles),
> + .wakeirq_map = sc7180_pdc_map,
> + .nwakeirq_map = ARRAY_SIZE(sc7180_pdc_map),
> };
>
> static int sc7180_pinctrl_probe(struct platform_device *pdev)
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
>