by Rob Herring (Arm)

[permalink] [raw]

Subject: Re: [v2 3/6] of: address: add support to parse PCI outbound-ranges

On Thu, Jan 2, 2020 at 1:44 AM Lad, Prabhakar
<[email protected]> wrote:
>
> Hi Rob,
>
> On Thu, Dec 19, 2019 at 11:31 PM Rob Herring <[email protected]> wrote:
> >
> > On Mon, Dec 16, 2019 at 08:49:23AM +0000, Lad, Prabhakar wrote:
> > > Hi Rob,
> > >
> > > Thank you for the review.
> > >
> > > On Fri, Dec 13, 2019 at 8:37 PM Rob Herring <[email protected]> wrote:
> > > >
> > > > On Fri, Dec 13, 2019 at 2:48 AM Lad Prabhakar
> > > > <[email protected]> wrote:
> > > > >
> > > > > From: "Lad, Prabhakar" <[email protected]>
> > > > >
> > > > > this patch adds support to parse PCI outbound-ranges, the
> > > > > outbound-regions are similar to pci ranges except it doesn't
> > > > > have pci address, below is the format for bar-ranges:
> > > > >
> > > > > outbound-ranges = <flags upper32_cpuaddr lower32_cpuaddr
> > > > > upper32_size lower32_size>;
> > > >
> > > > You can't just make up a new ranges property. Especially one that
> > > > doesn't follow how 'ranges' works. We already have 'dma-ranges' to
> > > > translate device to memory addresses.
> > > >
> > > > Explain the problem or feature you need, not the solution you came up
> > > > with. Why do you need this and other endpoint bindings haven't?
> > > >
> > > rcar SoC's supports multiple outbound region for mapping the PCI address
> > > locally to the system. This lead to discussion where there exist controllers
> > > which support regions for high/low priority transfer and similarly regions
> > > for large/small memory allocations, as a result a new ranges property was
> > > added, where we can specify the flags which would indicate how the outbound
> > > region can be used during requests.
> >
> > What are the flags?
>
> below are the flags which were discussed in first version of the
> series, but since the driver is
> currently using just PCI_EPC_WINDOW_FLAG_NON_MULTI_ALLOC flag I'll be
> dropping them in
> next version (suggested by Kishon) and rest will be added as and when
> required by the driver.
>
> * @PCI_EPC_WINDOW_FLAG_MULTI_ALLOC: Indicates multiple chunks of memory can be
> * allocated from same window
> * @PCI_EPC_WINDOW_FLAG_NON_MULTI_ALLOC: Indicates only single memory allocation
> * is possible on the window
> * @PCI_EPC_WINDOW_FLAG_LARGE_ALLOC: Window is used for large memory allocation
> * @PCI_EPC_WINDOW_FLAG_SMALL_ALLOC: Window is used for small memory allocation
> * @PCI_EPC_WINDOW_FLAG_HIGH_PRI_ALLOC: Window is used for high priority data
> * transfers
> * @PCI_EPC_WINDOW_FLAG_LOW_PRI_ALLOC: Window is used for low priority data
> * transfers

Looks like configuration or policy, not something that belongs in DT.
Coupling driver features and DT changes is not good for ABI compatible
changes either.

I'm hesitant to accept any PCI endpoint binding additions because they
don't seem to be completely thought out in terms of supporting
different usecases.

Rob

2020-01-03 16:30:48

by Lad, Prabhakar

[permalink] [raw]

Subject: Re: [v2 4/6] dt-bindings: PCI: rcar: Add bindings for R-Car PCIe endpoint controller

Hi Kishon/Rob,

On Fri, Dec 13, 2019 at 8:48 AM Lad Prabhakar
<[email protected]> wrote:
>
> From: "Lad, Prabhakar" <[email protected]>
>
> This patch adds the bindings for the R-Car PCIe endpoint driver.
>
> Signed-off-by: Lad, Prabhakar <[email protected]>
> ---
> .../devicetree/bindings/pci/rcar-pci-ep.txt | 37 ++++++++++++++++++++++
> 1 file changed, 37 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/rcar-pci-ep.txt
>
> diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.txt b/Documentation/devicetree/bindings/pci/rcar-pci-ep.txt
> new file mode 100644
> index 0000000..7f0a97e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.txt
> @@ -0,0 +1,37 @@
> +* Renesas R-Car PCIe Endpoint Controller DT description
> +
> +Required properties:
> + "renesas,pcie-ep-r8a774c0" for the R8A774C0 SoC;
> + "renesas,pcie-ep-rcar-gen3" for a generic R-Car Gen3 or
> + RZ/G2 compatible device.
> +
> + When compatible with the generic version, nodes must list the
> + SoC-specific version corresponding to the platform first
> + followed by the generic version.
> +
> +- reg: base address and length of the PCIe controller registers.
> +- outbound-ranges: outbound windows base address and length including the flags.
> +- resets: Must contain phandles to PCIe-related reset lines exposed by IP block
> +- clocks: from common clock binding: clock specifiers for the PCIe controller
> + clock.
> +- clock-names: from common clock binding: should be "pcie".
> +
> +Optional Property:
> +- max-functions: Maximum number of functions that can be configured (default 1).
> +
> +Example:
> +
> +SoC-specific DT Entry:
> +
> + pcie_ep: pcie_ep@fe000000 {
> + compatible = "renesas,pcie-ep-r8a774c0", "renesas,pcie-rcar-gen2";
> + reg = <0 0xfe000000 0 0x80000>;
> + outbound-ranges = <0xa 0x0 0xfe100000 0 0x000100000
> + 0xa 0x0 0xfe200000 0 0x000200000
> + 0x6 0x0 0x30000000 0 0x008000000
> + 0x6 0x0 0x38000000 0 0x008000000>;
> + clocks = <&cpg CPG_MOD 319>;
> + clock-names = "pcie";
> + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
> + resets = <&cpg 319>;
> + };

Now that I have dropped "outbound-ranges", do the below bindings look good ?

- reg-names: Must include the following names
- "apb-base" - Controller base
- "memory0" - memory window 0 used by the host to map the pci address locally
- "memory1" - memory window 1 used by the host to map the pci address locally
- "memory2" - memory window 2 used by the host to map the pci address locally
- "memory3" - memory window 3 used by the host to map the pci address locally

pcie-ep: pcie_ep@fe000000 {
compatible = "renesas,pcie-r8a774c0", "renesas,pcie-rcar-gen2";
reg = <0 0xfe000000 0 0x80000>,
<0x0 0xfe100000 0 0x100000>,
<0x0 0xfe200000 0 0x200000>,
<0x0 0x30000000 0 0x8000000>,
<0x0 0x38000000 0 0x8000000>;
reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
clocks = <&cpg CPG_MOD 319>;
clock-names = "pcie";
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
resets = <&cpg 319>;
};

Cheers,
--Prabhakar