This series organize the Amazon's Annapurna Labs Alpine device tree
bindings, device tree folder and adds new device tree for Alpine v3.
Changes since v2:
-----------------
- Move up a level for DT node without mmio regs.
- Drop device_type from serial@fd883000 node.
- Minor change name of PCIe node to: pcie@fbd00000
Changes since v1:
-----------------
- Rename al,alpine DT binding to amazon,alpine
- Rename al folder to be amazon
- Update maintainers of amazon,alpine DT
- Add missing alpine-v2 DT binding
- Fix yaml schemas for alpine-v3-evp.dts:
- #size-cells:0:0: 0 is not one of [1, 2]
- arch-timer: interrupts: [[1, 13, 8, 1, 14, 8, 1, 11, 8, 1, 10,
8]] is too short
- Change compatible string of alpine-v3-evp to amazon,al
Hanna Hawa (5):
dt-bindings: arm: amazon: rename al,alpine DT binding to amazon,al
arm64: dts: amazon: rename al folder to be amazon
dt-bindings: arm: amazon: update maintainers of amazon,al DT bindings
dt-bindings: arm: amazon: add missing alpine-v2 DT binding
dt-bindings: arm: amazon: add Amazon Annapurna Labs Alpine V3
Ronen Krupnik (1):
arm64: dts: amazon: add Amazon's Annapurna Labs Alpine v3 support
.../devicetree/bindings/arm/al,alpine.yaml | 21 -
.../devicetree/bindings/arm/amazon,al.yaml | 33 ++
MAINTAINERS | 2 +-
arch/arm64/boot/dts/Makefile | 2 +-
arch/arm64/boot/dts/{al => amazon}/Makefile | 1 +
.../boot/dts/{al => amazon}/alpine-v2-evp.dts | 0
.../boot/dts/{al => amazon}/alpine-v2.dtsi | 0
arch/arm64/boot/dts/amazon/alpine-v3-evp.dts | 23 ++
arch/arm64/boot/dts/amazon/alpine-v3.dtsi | 371 ++++++++++++++++++
9 files changed, 430 insertions(+), 23 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/al,alpine.yaml
create mode 100644 Documentation/devicetree/bindings/arm/amazon,al.yaml
rename arch/arm64/boot/dts/{al => amazon}/Makefile (64%)
rename arch/arm64/boot/dts/{al => amazon}/alpine-v2-evp.dts (100%)
rename arch/arm64/boot/dts/{al => amazon}/alpine-v2.dtsi (100%)
create mode 100644 arch/arm64/boot/dts/amazon/alpine-v3-evp.dts
create mode 100644 arch/arm64/boot/dts/amazon/alpine-v3.dtsi
--
2.17.1
As preparation to add device tree binding for Amazon's Annapurna Labs
Alpine v3 support. Rename al device tree folder to be amazon.
Signed-off-by: Hanna Hawa <[email protected]>
---
MAINTAINERS | 2 +-
arch/arm64/boot/dts/Makefile | 2 +-
arch/arm64/boot/dts/{al => amazon}/Makefile | 0
arch/arm64/boot/dts/{al => amazon}/alpine-v2-evp.dts | 0
arch/arm64/boot/dts/{al => amazon}/alpine-v2.dtsi | 0
5 files changed, 2 insertions(+), 2 deletions(-)
rename arch/arm64/boot/dts/{al => amazon}/Makefile (100%)
rename arch/arm64/boot/dts/{al => amazon}/alpine-v2-evp.dts (100%)
rename arch/arm64/boot/dts/{al => amazon}/alpine-v2.dtsi (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index cc0a4a8ae06a..eb02eda3761a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1519,7 +1519,7 @@ L: [email protected] (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-alpine/
F: arch/arm/boot/dts/alpine*
-F: arch/arm64/boot/dts/al/
+F: arch/arm64/boot/dts/amazon/*
F: drivers/*/*alpine*
ARM/ARTPEC MACHINE SUPPORT
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index f19b762c008d..6f3e1556ce42 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -1,8 +1,8 @@
# SPDX-License-Identifier: GPL-2.0
subdir-y += actions
-subdir-y += al
subdir-y += allwinner
subdir-y += altera
+subdir-y += amazon
subdir-y += amd
subdir-y += amlogic
subdir-y += apm
diff --git a/arch/arm64/boot/dts/al/Makefile b/arch/arm64/boot/dts/amazon/Makefile
similarity index 100%
rename from arch/arm64/boot/dts/al/Makefile
rename to arch/arm64/boot/dts/amazon/Makefile
diff --git a/arch/arm64/boot/dts/al/alpine-v2-evp.dts b/arch/arm64/boot/dts/amazon/alpine-v2-evp.dts
similarity index 100%
rename from arch/arm64/boot/dts/al/alpine-v2-evp.dts
rename to arch/arm64/boot/dts/amazon/alpine-v2-evp.dts
diff --git a/arch/arm64/boot/dts/al/alpine-v2.dtsi b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi
similarity index 100%
rename from arch/arm64/boot/dts/al/alpine-v2.dtsi
rename to arch/arm64/boot/dts/amazon/alpine-v2.dtsi
--
2.17.1
Update maintainers of amazon,al DT bindings.
Signed-off-by: Hanna Hawa <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/arm/amazon,al.yaml | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/amazon,al.yaml b/Documentation/devicetree/bindings/arm/amazon,al.yaml
index 58eb4ad55a76..19ee489396f9 100644
--- a/Documentation/devicetree/bindings/arm/amazon,al.yaml
+++ b/Documentation/devicetree/bindings/arm/amazon,al.yaml
@@ -7,8 +7,9 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amazon's Annapurna Labs Alpine Platform Device Tree Bindings
maintainers:
- - Tsahee Zidenberg <[email protected]>
- - Antoine Tenart <[email protected]>
+ - Hanna Hawa <[email protected]>
+ - Talel Shenhar <[email protected]>, <[email protected]>
+ - Ronen Krupnik <[email protected]>
properties:
compatible:
--
2.17.1
This patch adds DT bindings info for Amazon Annapurna Labs Alpine V3.
Signed-off-by: Hanna Hawa <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/arm/amazon,al.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/amazon,al.yaml b/Documentation/devicetree/bindings/arm/amazon,al.yaml
index 7de3a8c6e740..a3a4d710bd02 100644
--- a/Documentation/devicetree/bindings/arm/amazon,al.yaml
+++ b/Documentation/devicetree/bindings/arm/amazon,al.yaml
@@ -24,4 +24,10 @@ properties:
- al,alpine-v2-evp
- const: al,alpine-v2
+ - description: Boards with Alpine V3 SoC
+ items:
+ - enum:
+ - amazon,al-alpine-v3-evp
+ - const: amazon,al-alpine-v3
+
...
--
2.17.1
From: Ronen Krupnik <[email protected]>
This patch adds the initial support for the Amazon's Annapurna Labs
Alpine v3 Soc and Evaluation Platform (EVP).
Signed-off-by: Ronen Krupnik <[email protected]>
Signed-off-by: Hanna Hawa <[email protected]>
---
arch/arm64/boot/dts/amazon/Makefile | 1 +
arch/arm64/boot/dts/amazon/alpine-v3-evp.dts | 23 ++
arch/arm64/boot/dts/amazon/alpine-v3.dtsi | 371 +++++++++++++++++++
3 files changed, 395 insertions(+)
create mode 100644 arch/arm64/boot/dts/amazon/alpine-v3-evp.dts
create mode 100644 arch/arm64/boot/dts/amazon/alpine-v3.dtsi
diff --git a/arch/arm64/boot/dts/amazon/Makefile b/arch/arm64/boot/dts/amazon/Makefile
index d79822dc30cd..ba9e11544905 100644
--- a/arch/arm64/boot/dts/amazon/Makefile
+++ b/arch/arm64/boot/dts/amazon/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-only
dtb-$(CONFIG_ARCH_ALPINE) += alpine-v2-evp.dtb
+dtb-$(CONFIG_ARCH_ALPINE) += alpine-v3-evp.dtb
diff --git a/arch/arm64/boot/dts/amazon/alpine-v3-evp.dts b/arch/arm64/boot/dts/amazon/alpine-v3-evp.dts
new file mode 100644
index 000000000000..8c1e11cf5855
--- /dev/null
+++ b/arch/arm64/boot/dts/amazon/alpine-v3-evp.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ */
+
+#include "alpine-v3.dtsi"
+
+/ {
+ model = "Amazon's Annapurna Labs Alpine v3 Evaluation Platform (EVP)";
+ compatible = "amazon,al-alpine-v3-evp", "amazon,al-alpine-v3";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
new file mode 100644
index 000000000000..5e6657ef7588
--- /dev/null
+++ b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
@@ -0,0 +1,371 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2019, Amazon.com, Inc. or its affiliates. All Rights Reserved
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "Amazon's Annapurna Labs Alpine v3";
+ compatible = "amazon,al-alpine-v3";
+
+ interrupt-parent = <&gic>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x0>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster0_l2>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x1>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster0_l2>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x2>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster0_l2>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x3>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster0_l2>;
+ };
+
+ cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x100>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster1_l2>;
+ };
+
+ cpu@101 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x101>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster1_l2>;
+ };
+
+ cpu@102 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x102>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster1_l2>;
+ };
+
+ cpu@103 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x103>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster1_l2>;
+ };
+
+ cpu@200 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x200>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster2_l2>;
+ };
+
+ cpu@201 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x201>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster2_l2>;
+ };
+
+ cpu@202 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x202>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster2_l2>;
+ };
+
+ cpu@203 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x203>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster2_l2>;
+ };
+
+ cpu@300 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x300>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster3_l2>;
+ };
+
+ cpu@301 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x301>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster3_l2>;
+ };
+
+ cpu@302 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x302>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster3_l2>;
+ };
+
+ cpu@303 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x303>;
+ enable-method = "psci";
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ i-cache-size = <0xc000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ next-level-cache = <&cluster3_l2>;
+ };
+
+ cluster0_l2: cache@0 {
+ compatible = "cache";
+ cache-size = <0x200000>;
+ cache-line-size = <64>;
+ cache-sets = <2048>;
+ cache-level = <2>;
+ };
+
+ cluster1_l2: cache@100 {
+ compatible = "cache";
+ cache-size = <0x200000>;
+ cache-line-size = <64>;
+ cache-sets = <2048>;
+ cache-level = <2>;
+ };
+
+ cluster2_l2: cache@200 {
+ compatible = "cache";
+ cache-size = <0x200000>;
+ cache-line-size = <64>;
+ cache-sets = <2048>;
+ cache-level = <2>;
+ };
+
+ cluster3_l2: cache@300 {
+ compatible = "cache";
+ cache-size = <0x200000>;
+ cache-line-size = <64>;
+ cache-sets = <2048>;
+ cache-level = <2>;
+ };
+
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ secmon@0 {
+ reg = <0x0 0x0 0x0 0x100000>;
+ no-map;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ arch-timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 0xd IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 0xe IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 0xb IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 0xa IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ pmu {
+ compatible = "arm,cortex-a72-pmu";
+ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gic: interrupt-controller@f0000000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xf0800000 0 0x10000>,
+ <0x0 0xf0a00000 0 0x200000>,
+ <0x0 0xf0000000 0 0x2000>,
+ <0x0 0xf0010000 0 0x1000>,
+ <0x0 0xf0020000 0 0x2000>;
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ msix: msix@fbe00000 {
+ compatible = "al,alpine-msix";
+ reg = <0x0 0xfbe00000 0x0 0x100000>;
+ interrupt-controller;
+ msi-controller;
+ al,msi-base-spi = <160>;
+ al,msi-num-spis = <800>;
+ interrupt-parent = <&gic>;
+ };
+
+ uart0: serial@fd883000 {
+ compatible = "ns16550a";
+ reg = <0x0 0xfd883000 0x0 0x1000>;
+ clock-frequency = <0>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ };
+
+ pcie@fbd00000 {
+ compatible = "pci-host-ecam-generic";
+ device_type = "pci";
+ #size-cells = <2>;
+ #address-cells = <3>;
+ #interrupt-cells = <1>;
+ reg = <0x0 0xfbd00000 0x0 0x100000>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ /* 8 x legacy interrupts for SATA only */
+ interrupt-map = <0x4000 0 0 1 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
+ <0x4800 0 0 1 &gic 0 58 IRQ_TYPE_LEVEL_HIGH>,
+ <0x5000 0 0 1 &gic 0 59 IRQ_TYPE_LEVEL_HIGH>,
+ <0x5800 0 0 1 &gic 0 60 IRQ_TYPE_LEVEL_HIGH>,
+ <0x6000 0 0 1 &gic 0 61 IRQ_TYPE_LEVEL_HIGH>,
+ <0x6800 0 0 1 &gic 0 62 IRQ_TYPE_LEVEL_HIGH>,
+ <0x7000 0 0 1 &gic 0 63 IRQ_TYPE_LEVEL_HIGH>,
+ <0x7800 0 0 1 &gic 0 64 IRQ_TYPE_LEVEL_HIGH>;
+ ranges = <0x02000000 0x0 0xfe000000 0x0 0xfe000000 0x0 0x1000000>;
+ bus-range = <0x00 0x00>;
+ msi-parent = <&msix>;
+ };
+ };
+};
--
2.17.1
As preparation to add device tree binding for Amazon's Annapurna Labs
Alpine v3 support. Rename al,alpine DT binding to amazon,al.
Signed-off-by: Hanna Hawa <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
.../bindings/arm/{al,alpine.yaml => amazon,al.yaml} | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
rename Documentation/devicetree/bindings/arm/{al,alpine.yaml => amazon,al.yaml} (74%)
diff --git a/Documentation/devicetree/bindings/arm/al,alpine.yaml b/Documentation/devicetree/bindings/arm/amazon,al.yaml
similarity index 74%
rename from Documentation/devicetree/bindings/arm/al,alpine.yaml
rename to Documentation/devicetree/bindings/arm/amazon,al.yaml
index a70dff277e05..58eb4ad55a76 100644
--- a/Documentation/devicetree/bindings/arm/al,alpine.yaml
+++ b/Documentation/devicetree/bindings/arm/amazon,al.yaml
@@ -1,10 +1,10 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
-$id: http://devicetree.org/schemas/arm/al,alpine.yaml#
+$id: http://devicetree.org/schemas/arm/amazon,al.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Annapurna Labs Alpine Platform Device Tree Bindings
+title: Amazon's Annapurna Labs Alpine Platform Device Tree Bindings
maintainers:
- Tsahee Zidenberg <[email protected]>
--
2.17.1
Amazon Annapurna Labs Alpine family includes: Alpine-v1, Alpine-v2.
This patch adds the missing DT binding of Alpine-v2 in amazon,al.yaml.
Signed-off-by: Hanna Hawa <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/amazon,al.yaml | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/amazon,al.yaml b/Documentation/devicetree/bindings/arm/amazon,al.yaml
index 19ee489396f9..7de3a8c6e740 100644
--- a/Documentation/devicetree/bindings/arm/amazon,al.yaml
+++ b/Documentation/devicetree/bindings/arm/amazon,al.yaml
@@ -13,10 +13,15 @@ maintainers:
properties:
compatible:
- items:
- - const: al,alpine
- model:
- items:
- - const: "Annapurna Labs Alpine Dev Board"
+ oneOf:
+ - description: Boards with Alpine V1 SoC
+ items:
+ - const: al,alpine
+
+ - description: Boards with Alpine V2 SoC
+ items:
+ - enum:
+ - al,alpine-v2-evp
+ - const: al,alpine-v2
...
--
2.17.1