2019-12-13 03:15:21

by Yinbo Zhu

Subject: [PATCH v2 1/2] arm64: dts: ls1028a-rdb: enable emmc hs400 mode

This patch is to enable emmc hs400 mode for ls1028ardb

Signed-off-by: Yinbo Zhu <[email protected]>
Acked-by: Shawn Guo <[email protected]>
Acked-by: Yangbo Lu <[email protected]>
---
Change in v2:
add Acked-by

arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
index 9720a190049f..61c4f772e3a6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
@@ -93,6 +93,8 @@

&esdhc1 {
mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ bus-width = <8>;
status = "okay";
};

--
2.17.1

2019-12-13 03:15:21

by Yinbo Zhu

Subject: [PATCH v2 2/2] arm64: dts: ls1028a: fix little-big endian issue for dcfg

dcfg use little endian that SoC register value will be correct

Signed-off-by: Yinbo Zhu <[email protected]>
Acked-by: Shawn Guo <[email protected]>
Acked-by: Yangbo Lu <[email protected]>
---
Change in v2:
Add Acked-by

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 8e8a77eb596a..8b28fda2ca20 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -175,7 +175,7 @@
dcfg: syscon@1e00000 {
compatible = "fsl,ls1028a-dcfg", "syscon";
reg = <0x0 0x1e00000 0x0 0x10000>;
- big-endian;
+ little-endian;
};

scfg: syscon@1fc0000 {
--
2.17.1

2019-12-23 06:44:21

by Shawn Guo

Subject: Re: [PATCH v2 1/2] arm64: dts: ls1028a-rdb: enable emmc hs400 mode

On Fri, Dec 13, 2019 at 10:18:38AM +0800, Yinbo Zhu wrote:
> This patch is to enable emmc hs400 mode for ls1028ardb
>
> Signed-off-by: Yinbo Zhu <[email protected]>
> Acked-by: Shawn Guo <[email protected]>

Did I? You can only add the tag when people explicitly gave it.

Applied, thanks.

Shawn

> Acked-by: Yangbo Lu <[email protected]>
> ---
> Change in v2:
> add Acked-by
>
> arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> index 9720a190049f..61c4f772e3a6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> @@ -93,6 +93,8 @@
>
> &esdhc1 {
> mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> + bus-width = <8>;
> status = "okay";
> };
>
> --
> 2.17.1
>

2019-12-23 06:56:20

by Shawn Guo

Subject: Re: [PATCH v2 2/2] arm64: dts: ls1028a: fix little-big endian issue for dcfg

On Fri, Dec 13, 2019 at 10:18:39AM +0800, Yinbo Zhu wrote:
> dcfg use little endian that SoC register value will be correct
>
> Signed-off-by: Yinbo Zhu <[email protected]>
> Acked-by: Shawn Guo <[email protected]>
> Acked-by: Yangbo Lu <[email protected]>

I reworded the subject and commit log a little, added Fixes tag and
applied a fix.

arm64: dts: ls1028a: fix endian setting for dcfg

DCFG block uses little endian. Fix it so that register access becomes
correct.

Signed-off-by: Yinbo Zhu <[email protected]>
Acked-by: Yangbo Lu <[email protected]>
Fixes: 8897f3255c9c ("arm64: dts: Add support for NXP LS1028A SoC")
Signed-off-by: Shawn Guo <[email protected]>