2019-12-24 06:19:16

by Chen-Yu Tsai

[permalink] [raw]
Subject: [PATCH] ARM: dts: sunxi: Add Libre Computer ALL-H3-IT H5 board

From: Chen-Yu Tsai <[email protected]>

The Libre Computer ALL-H3-IT board is a small single board computer that
is roughly the same size as the Raspberry Pi Zero, or around 20% smaller
than a credit card.

The board features:

- H2, H3, or H5 SoC from Allwinner
- 2 DDR3 DRAM chips
- Realtek RTL8821CU based WiFi module
- 128 Mbit SPI-NOR flash
- micro-SD card slot
- micro HDMI video output
- FPC connector for camera sensor module
- generic Raspberri-Pi style 40 pin GPIO header
- additional pin headers for extra USB host ports, ananlog audio and
IR receiver

Only H5 variant test samples were made available, but the vendor does
have plans to include at least an H3 variant. Thus the device tree is
split much like the ALL-H3-CC, with a common dtsi file for the board
design, and separate dts files including the common board file and the
SoC dtsi file. The other variants will be added as they are made
available.

Signed-off-by: Chen-Yu Tsai <[email protected]>
---

The boards I have are test samples. For some reason the CPU supply
regulator is set at 1.3V, not 1.1V, however the production version will
have it set to 1.1V. The activity LED doesn't work either, but that
seems to be an issue with the LED itself, since the GPIO does toggle
the voltage level measured at the LED.

---
.../devicetree/bindings/arm/sunxi.yaml | 5 +
.../boot/dts/sunxi-libretech-all-h3-it.dtsi | 180 ++++++++++++++++++
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../sun50i-h5-libretech-all-h3-it.dts | 11 ++
4 files changed, 197 insertions(+)
create mode 100644 arch/arm/boot/dts/sunxi-libretech-all-h3-it.dtsi
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-it.dts

diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
index eaa042fc090f..a2edf5299e48 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -342,6 +342,11 @@ properties:
- const: libretech,all-h3-cc-h5
- const: allwinner,sun50i-h5

+ - description: Libre Computer Board ALL-H3-IT H5
+ items:
+ - const: libretech,all-h3-it-h5
+ - const: allwinner,sun50i-h5
+
- description: Lichee Pi One
items:
- const: licheepi,licheepi-one
diff --git a/arch/arm/boot/dts/sunxi-libretech-all-h3-it.dtsi b/arch/arm/boot/dts/sunxi-libretech-all-h3-it.dtsi
new file mode 100644
index 000000000000..204fba3614f9
--- /dev/null
+++ b/arch/arm/boot/dts/sunxi-libretech-all-h3-it.dtsi
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2019 Chen-Yu Tsai <[email protected]>
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ aliases {
+ serial0 = &uart0;
+ spi0 = &spi0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "d";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status_led {
+ label = "librecomputer:blue:status";
+ gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
+ };
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_vcc5v0>;
+ };
+
+ /* This represents the board's 5V input */
+ reg_vcc5v0: vcc5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_vcc_dram: vcc-dram {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-dram";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_vcc5v0>;
+ gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
+ enable-active-high;
+ };
+
+ reg_vcc_io: vcc-io {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-io";
+ /* This is simply a MOSFET switch */
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_vcc3v3>;
+ gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
+ };
+
+ reg_vcc_usbwifi: vcc-usbwifi {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-usbwifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&reg_vcc5v0>;
+ gpio = <&pio 6 4 GPIO_ACTIVE_HIGH>; /* PG4 */
+ enable-active-high;
+ };
+
+ reg_vdd_cpux: vdd-cpux {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-cpux";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_vcc5v0>;
+ gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+ enable-active-high;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
+&cpu1 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
+&cpu2 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
+&cpu3 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc_io>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&pio {
+ vcc-pa-supply = <&reg_vcc_io>;
+ vcc-pc-supply = <&reg_vcc_io>;
+ vcc-pd-supply = <&reg_vcc_io>;
+ vcc-pe-supply = <&reg_vcc_io>;
+ vcc-pf-supply = <&reg_vcc_io>;
+ vcc-pg-supply = <&reg_vcc_io>;
+};
+
+&r_pio {
+ vcc-pl-supply = <&reg_vcc3v3>;
+};
+
+&spi0 {
+ status = "okay";
+
+ spiflash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ usb1_vbus-supply = <&reg_vcc_usbwifi>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 62bc43f187bf..a7fdf04ffca2 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -15,6 +15,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus-v1.2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-emlid-neutis-n5-devboard.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-it.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-it.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-it.dts
new file mode 100644
index 000000000000..e59d68b525fc
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-it.dts
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2019 Chen-Yu Tsai <[email protected]>
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include <arm/sunxi-libretech-all-h3-it.dtsi>
+
+/ {
+ model = "Libre Computer Board ALL-H3-IT H5";
+ compatible = "libretech,all-h3-it-h5", "allwinner,sun50i-h5";
+};
--
2.24.1


2019-12-26 09:54:39

by Maxime Ripard

[permalink] [raw]
Subject: Re: [PATCH] ARM: dts: sunxi: Add Libre Computer ALL-H3-IT H5 board

On Tue, Dec 24, 2019 at 02:15:55PM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai <[email protected]>
>
> The Libre Computer ALL-H3-IT board is a small single board computer that
> is roughly the same size as the Raspberry Pi Zero, or around 20% smaller
> than a credit card.
>
> The board features:
>
> - H2, H3, or H5 SoC from Allwinner
> - 2 DDR3 DRAM chips
> - Realtek RTL8821CU based WiFi module
> - 128 Mbit SPI-NOR flash
> - micro-SD card slot
> - micro HDMI video output
> - FPC connector for camera sensor module
> - generic Raspberri-Pi style 40 pin GPIO header
> - additional pin headers for extra USB host ports, ananlog audio and
> IR receiver
>
> Only H5 variant test samples were made available, but the vendor does
> have plans to include at least an H3 variant. Thus the device tree is
> split much like the ALL-H3-CC, with a common dtsi file for the board
> design, and separate dts files including the common board file and the
> SoC dtsi file. The other variants will be added as they are made
> available.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>

Applied, thanks!
Maxime


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