This patcheset provides updates related to the audio peripheral clocks
It adds the peripheral clock required by the internal audio dac
and reorganize the AIU clocks into a hierarchy to better reflect the
behavior of the SoC.
Jerome Brunet (3):
dt-bindings: clk: meson: add the gxl internal dac gate
clk: meson: gxbb: add the gxl internal dac gate
clk: meson: gxbb: set audio output clock hierarchy
drivers/clk/meson/gxbb.c | 21 +++++++++++++--------
drivers/clk/meson/gxbb.h | 2 +-
include/dt-bindings/clock/gxbb-clkc.h | 1 +
3 files changed, 15 insertions(+), 9 deletions(-)
--
2.24.1
Add the gxl ACODEC clock id to the gxbb clock controller bindings
Signed-off-by: Jerome Brunet <[email protected]>
---
include/dt-bindings/clock/gxbb-clkc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
index db0763e96173..4073eb7a9da1 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -146,5 +146,6 @@
#define CLKID_CTS_VDAC 201
#define CLKID_HDMI_TX 202
#define CLKID_HDMI 205
+#define CLKID_ACODEC 206
#endif /* __GXBB_CLKC_H */
--
2.24.1
Add the ACODEC clock gate to the gxl clk controller driver
Signed-off-by: Jerome Brunet <[email protected]>
---
drivers/clk/meson/gxbb.c | 3 +++
drivers/clk/meson/gxbb.h | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 1f9c056e684c..47916c4f1700 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -2613,6 +2613,7 @@ static MESON_GATE(gxbb_assist_misc, HHI_GCLK_MPEG0, 23);
static MESON_GATE(gxbb_emmc_a, HHI_GCLK_MPEG0, 24);
static MESON_GATE(gxbb_emmc_b, HHI_GCLK_MPEG0, 25);
static MESON_GATE(gxbb_emmc_c, HHI_GCLK_MPEG0, 26);
+static MESON_GATE(gxl_acodec, HHI_GCLK_MPEG0, 28);
static MESON_GATE(gxbb_spi, HHI_GCLK_MPEG0, 30);
static MESON_GATE(gxbb_i2s_spdif, HHI_GCLK_MPEG1, 2);
@@ -3100,6 +3101,7 @@ static struct clk_hw_onecell_data gxl_hw_onecell_data = {
[CLKID_HDMI_SEL] = &gxbb_hdmi_sel.hw,
[CLKID_HDMI_DIV] = &gxbb_hdmi_div.hw,
[CLKID_HDMI] = &gxbb_hdmi.hw,
+ [CLKID_ACODEC] = &gxl_acodec.hw,
[NR_CLKS] = NULL,
},
.num = NR_CLKS,
@@ -3491,6 +3493,7 @@ static struct clk_regmap *const gxl_clk_regmaps[] = {
&gxl_hdmi_pll_od,
&gxl_hdmi_pll_od2,
&gxl_hdmi_pll_dco,
+ &gxl_acodec,
};
static const struct meson_eeclkc_data gxbb_clkc_data = {
diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
index b53584fe66cf..1ee8cb7e2f5a 100644
--- a/drivers/clk/meson/gxbb.h
+++ b/drivers/clk/meson/gxbb.h
@@ -188,7 +188,7 @@
#define CLKID_HDMI_SEL 203
#define CLKID_HDMI_DIV 204
-#define NR_CLKS 206
+#define NR_CLKS 207
/* include the CLKIDs that have been made part of the DT binding */
#include <dt-bindings/clock/gxbb-clkc.h>
--
2.24.1
On 22/01/2020 11:04, Jerome Brunet wrote:
> Add the ACODEC clock gate to the gxl clk controller driver
>
> Signed-off-by: Jerome Brunet <[email protected]>
> ---
> drivers/clk/meson/gxbb.c | 3 +++
> drivers/clk/meson/gxbb.h | 2 +-
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
> index 1f9c056e684c..47916c4f1700 100644
> --- a/drivers/clk/meson/gxbb.c
> +++ b/drivers/clk/meson/gxbb.c
> @@ -2613,6 +2613,7 @@ static MESON_GATE(gxbb_assist_misc, HHI_GCLK_MPEG0, 23);
> static MESON_GATE(gxbb_emmc_a, HHI_GCLK_MPEG0, 24);
> static MESON_GATE(gxbb_emmc_b, HHI_GCLK_MPEG0, 25);
> static MESON_GATE(gxbb_emmc_c, HHI_GCLK_MPEG0, 26);
> +static MESON_GATE(gxl_acodec, HHI_GCLK_MPEG0, 28);
> static MESON_GATE(gxbb_spi, HHI_GCLK_MPEG0, 30);
>
> static MESON_GATE(gxbb_i2s_spdif, HHI_GCLK_MPEG1, 2);
> @@ -3100,6 +3101,7 @@ static struct clk_hw_onecell_data gxl_hw_onecell_data = {
> [CLKID_HDMI_SEL] = &gxbb_hdmi_sel.hw,
> [CLKID_HDMI_DIV] = &gxbb_hdmi_div.hw,
> [CLKID_HDMI] = &gxbb_hdmi.hw,
> + [CLKID_ACODEC] = &gxl_acodec.hw,
> [NR_CLKS] = NULL,
> },
> .num = NR_CLKS,
> @@ -3491,6 +3493,7 @@ static struct clk_regmap *const gxl_clk_regmaps[] = {
> &gxl_hdmi_pll_od,
> &gxl_hdmi_pll_od2,
> &gxl_hdmi_pll_dco,
> + &gxl_acodec,
> };
>
> static const struct meson_eeclkc_data gxbb_clkc_data = {
> diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
> index b53584fe66cf..1ee8cb7e2f5a 100644
> --- a/drivers/clk/meson/gxbb.h
> +++ b/drivers/clk/meson/gxbb.h
> @@ -188,7 +188,7 @@
> #define CLKID_HDMI_SEL 203
> #define CLKID_HDMI_DIV 204
>
> -#define NR_CLKS 206
> +#define NR_CLKS 207
>
> /* include the CLKIDs that have been made part of the DT binding */
> #include <dt-bindings/clock/gxbb-clkc.h>
>
Acked-by: Neil Armstrong <[email protected]>
On 22/01/2020 11:04, Jerome Brunet wrote:
> Add the gxl ACODEC clock id to the gxbb clock controller bindings
>
> Signed-off-by: Jerome Brunet <[email protected]>
> ---
> include/dt-bindings/clock/gxbb-clkc.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
> index db0763e96173..4073eb7a9da1 100644
> --- a/include/dt-bindings/clock/gxbb-clkc.h
> +++ b/include/dt-bindings/clock/gxbb-clkc.h
> @@ -146,5 +146,6 @@
> #define CLKID_CTS_VDAC 201
> #define CLKID_HDMI_TX 202
> #define CLKID_HDMI 205
> +#define CLKID_ACODEC 206
>
> #endif /* __GXBB_CLKC_H */
>
Acked-by: Neil Armstrong <[email protected]>
On Wed 22 Jan 2020 at 11:04, Jerome Brunet <[email protected]> wrote:
> This patcheset provides updates related to the audio peripheral clocks
> It adds the peripheral clock required by the internal audio dac
> and reorganize the AIU clocks into a hierarchy to better reflect the
> behavior of the SoC.
>
> Jerome Brunet (3):
> dt-bindings: clk: meson: add the gxl internal dac gate
> clk: meson: gxbb: add the gxl internal dac gate
> clk: meson: gxbb: set audio output clock hierarchy
>
> drivers/clk/meson/gxbb.c | 21 +++++++++++++--------
> drivers/clk/meson/gxbb.h | 2 +-
> include/dt-bindings/clock/gxbb-clkc.h | 1 +
> 3 files changed, 15 insertions(+), 9 deletions(-)
Applied