There is an external trigger timestamp fifo for PTP timer
of LS1028A. Add property fsl,extts-fifo for that.
Signed-off-by: Yangbo Lu <[email protected]>
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 0bf375e..da39068 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -722,6 +722,7 @@
reg = <0x000400 0 0 0 0>;
clocks = <&clockgen 4 0>;
little-endian;
+ fsl,extts-fifo;
};
};
};
--
2.7.4
On Tue, Feb 11, 2020 at 12:57:58PM +0800, Yangbo Lu wrote:
> There is an external trigger timestamp fifo for PTP timer
> of LS1028A. Add property fsl,extts-fifo for that.
>
> Signed-off-by: Yangbo Lu <[email protected]>
Applied, thanks.