2020-02-20 20:46:37

by Martin Blumenstingl

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Subject: [PATCH] clk: meson: meson8b: set audio output clock hierarchy

The aiu devices peripheral clocks needs the aiu and aiu_glue clocks to
operate. Reflect this hierarchy in the clock tree.

Fixes: e31a1900c1ff73 ("meson: clk: Add support for clock gates")
Suggested-by: Jerome Brunet <[email protected]>
Signed-off-by: Martin Blumenstingl <[email protected]>
---
This takes Jerome's patch for GXBB and ports it to the Meson8* SoCs.
Hence the Suggested-by.


drivers/clk/meson/meson8b.c | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 9fd31f23b2a9..34a70c4b4899 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -2605,14 +2605,6 @@ static MESON_GATE(meson8b_spi, HHI_GCLK_MPEG0, 30);
static MESON_GATE(meson8b_i2s_spdif, HHI_GCLK_MPEG1, 2);
static MESON_GATE(meson8b_eth, HHI_GCLK_MPEG1, 3);
static MESON_GATE(meson8b_demux, HHI_GCLK_MPEG1, 4);
-static MESON_GATE(meson8b_aiu_glue, HHI_GCLK_MPEG1, 6);
-static MESON_GATE(meson8b_iec958, HHI_GCLK_MPEG1, 7);
-static MESON_GATE(meson8b_i2s_out, HHI_GCLK_MPEG1, 8);
-static MESON_GATE(meson8b_amclk, HHI_GCLK_MPEG1, 9);
-static MESON_GATE(meson8b_aififo2, HHI_GCLK_MPEG1, 10);
-static MESON_GATE(meson8b_mixer, HHI_GCLK_MPEG1, 11);
-static MESON_GATE(meson8b_mixer_iface, HHI_GCLK_MPEG1, 12);
-static MESON_GATE(meson8b_adc, HHI_GCLK_MPEG1, 13);
static MESON_GATE(meson8b_blkmv, HHI_GCLK_MPEG1, 14);
static MESON_GATE(meson8b_aiu, HHI_GCLK_MPEG1, 15);
static MESON_GATE(meson8b_uart1, HHI_GCLK_MPEG1, 16);
@@ -2659,6 +2651,19 @@ static MESON_GATE(meson8b_vclk2_vencl, HHI_GCLK_OTHER, 25);
static MESON_GATE(meson8b_vclk2_other, HHI_GCLK_OTHER, 26);
static MESON_GATE(meson8b_edp, HHI_GCLK_OTHER, 31);

+/* AIU gates */
+#define MESON_AIU_GLUE_GATE(_name, _reg, _bit) \
+ MESON_PCLK(_name, _reg, _bit, &meson8b_aiu_glue.hw)
+
+static MESON_PCLK(meson8b_aiu_glue, HHI_GCLK_MPEG1, 6, &meson8b_aiu.hw);
+static MESON_AIU_GLUE_GATE(meson8b_iec958, HHI_GCLK_MPEG1, 7);
+static MESON_AIU_GLUE_GATE(meson8b_i2s_out, HHI_GCLK_MPEG1, 8);
+static MESON_AIU_GLUE_GATE(meson8b_amclk, HHI_GCLK_MPEG1, 9);
+static MESON_AIU_GLUE_GATE(meson8b_aififo2, HHI_GCLK_MPEG1, 10);
+static MESON_AIU_GLUE_GATE(meson8b_mixer, HHI_GCLK_MPEG1, 11);
+static MESON_AIU_GLUE_GATE(meson8b_mixer_iface, HHI_GCLK_MPEG1, 12);
+static MESON_AIU_GLUE_GATE(meson8b_adc, HHI_GCLK_MPEG1, 13);
+
/* Always On (AO) domain gates */

static MESON_GATE(meson8b_ao_media_cpu, HHI_GCLK_AO, 0);
--
2.25.1


2020-02-21 08:30:04

by Neil Armstrong

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Subject: Re: [PATCH] clk: meson: meson8b: set audio output clock hierarchy

On 20/02/2020 21:44, Martin Blumenstingl wrote:
> The aiu devices peripheral clocks needs the aiu and aiu_glue clocks to
> operate. Reflect this hierarchy in the clock tree.
>
> Fixes: e31a1900c1ff73 ("meson: clk: Add support for clock gates")
> Suggested-by: Jerome Brunet <[email protected]>
> Signed-off-by: Martin Blumenstingl <[email protected]>
> ---
> This takes Jerome's patch for GXBB and ports it to the Meson8* SoCs.
> Hence the Suggested-by.
>
>
> drivers/clk/meson/meson8b.c | 21 +++++++++++++--------
> 1 file changed, 13 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
> index 9fd31f23b2a9..34a70c4b4899 100644
> --- a/drivers/clk/meson/meson8b.c
> +++ b/drivers/clk/meson/meson8b.c
> @@ -2605,14 +2605,6 @@ static MESON_GATE(meson8b_spi, HHI_GCLK_MPEG0, 30);
> static MESON_GATE(meson8b_i2s_spdif, HHI_GCLK_MPEG1, 2);
> static MESON_GATE(meson8b_eth, HHI_GCLK_MPEG1, 3);
> static MESON_GATE(meson8b_demux, HHI_GCLK_MPEG1, 4);
> -static MESON_GATE(meson8b_aiu_glue, HHI_GCLK_MPEG1, 6);
> -static MESON_GATE(meson8b_iec958, HHI_GCLK_MPEG1, 7);
> -static MESON_GATE(meson8b_i2s_out, HHI_GCLK_MPEG1, 8);
> -static MESON_GATE(meson8b_amclk, HHI_GCLK_MPEG1, 9);
> -static MESON_GATE(meson8b_aififo2, HHI_GCLK_MPEG1, 10);
> -static MESON_GATE(meson8b_mixer, HHI_GCLK_MPEG1, 11);
> -static MESON_GATE(meson8b_mixer_iface, HHI_GCLK_MPEG1, 12);
> -static MESON_GATE(meson8b_adc, HHI_GCLK_MPEG1, 13);
> static MESON_GATE(meson8b_blkmv, HHI_GCLK_MPEG1, 14);
> static MESON_GATE(meson8b_aiu, HHI_GCLK_MPEG1, 15);
> static MESON_GATE(meson8b_uart1, HHI_GCLK_MPEG1, 16);
> @@ -2659,6 +2651,19 @@ static MESON_GATE(meson8b_vclk2_vencl, HHI_GCLK_OTHER, 25);
> static MESON_GATE(meson8b_vclk2_other, HHI_GCLK_OTHER, 26);
> static MESON_GATE(meson8b_edp, HHI_GCLK_OTHER, 31);
>
> +/* AIU gates */
> +#define MESON_AIU_GLUE_GATE(_name, _reg, _bit) \
> + MESON_PCLK(_name, _reg, _bit, &meson8b_aiu_glue.hw)
> +
> +static MESON_PCLK(meson8b_aiu_glue, HHI_GCLK_MPEG1, 6, &meson8b_aiu.hw);
> +static MESON_AIU_GLUE_GATE(meson8b_iec958, HHI_GCLK_MPEG1, 7);
> +static MESON_AIU_GLUE_GATE(meson8b_i2s_out, HHI_GCLK_MPEG1, 8);
> +static MESON_AIU_GLUE_GATE(meson8b_amclk, HHI_GCLK_MPEG1, 9);
> +static MESON_AIU_GLUE_GATE(meson8b_aififo2, HHI_GCLK_MPEG1, 10);
> +static MESON_AIU_GLUE_GATE(meson8b_mixer, HHI_GCLK_MPEG1, 11);
> +static MESON_AIU_GLUE_GATE(meson8b_mixer_iface, HHI_GCLK_MPEG1, 12);
> +static MESON_AIU_GLUE_GATE(meson8b_adc, HHI_GCLK_MPEG1, 13);
> +
> /* Always On (AO) domain gates */
>
> static MESON_GATE(meson8b_ao_media_cpu, HHI_GCLK_AO, 0);
>

Reviewed-by: Neil Armstrong <[email protected]>

2020-02-21 10:47:32

by Jerome Brunet

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Subject: Re: [PATCH] clk: meson: meson8b: set audio output clock hierarchy


On Fri 21 Feb 2020 at 09:28, Neil Armstrong <[email protected]> wrote:

> On 20/02/2020 21:44, Martin Blumenstingl wrote:
>> The aiu devices peripheral clocks needs the aiu and aiu_glue clocks to
>> operate. Reflect this hierarchy in the clock tree.
>>
>> Fixes: e31a1900c1ff73 ("meson: clk: Add support for clock gates")
>> Suggested-by: Jerome Brunet <[email protected]>
>> Signed-off-by: Martin Blumenstingl <[email protected]>

Applied, Thx !