Arguments to GENMASK should be msb >= lsb.
Signed-off-by: Ondrej Jirman <[email protected]>
---
I just grepped the whole kernel tree for GENMASK argument order issues,
and this is one of the three that popped up. No testing was done.
drivers/phy/amlogic/phy-meson-g12a-usb2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/phy/amlogic/phy-meson-g12a-usb2.c b/drivers/phy/amlogic/phy-meson-g12a-usb2.c
index 9065ffc85eb47..cd7eccab26490 100644
--- a/drivers/phy/amlogic/phy-meson-g12a-usb2.c
+++ b/drivers/phy/amlogic/phy-meson-g12a-usb2.c
@@ -66,7 +66,7 @@
#define PHY_CTRL_R14 0x38
#define PHY_CTRL_R14_I_RDP_EN BIT(0)
#define PHY_CTRL_R14_I_RPU_SW1_EN BIT(1)
- #define PHY_CTRL_R14_I_RPU_SW2_EN GENMASK(2, 3)
+ #define PHY_CTRL_R14_I_RPU_SW2_EN GENMASK(3, 2)
#define PHY_CTRL_R14_PG_RSTN BIT(4)
#define PHY_CTRL_R14_I_C2L_DATA_16_8 BIT(5)
#define PHY_CTRL_R14_I_C2L_ASSERT_SINGLE_EN_ZERO BIT(6)
--
2.25.1
On Sun, 2020-02-23 at 00:51 +0100, Ondrej Jirman wrote:
> Arguments to GENMASK should be msb >= lsb.
>
> Signed-off-by: Ondrej Jirman <[email protected]>
> ---
> I just grepped the whole kernel tree for GENMASK argument order issues,
> and this is one of the three that popped up. No testing was done.
Both of these were submitted last year.
https://lkml.org/lkml/2019/7/10/20
I hope they get applied one day.
Neither patch has an affect today as none of the
#defines are used.
Perhaps deleting the #defines is better.
> drivers/phy/amlogic/phy-meson-g12a-usb2.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/phy/amlogic/phy-meson-g12a-usb2.c b/drivers/phy/amlogic/phy-meson-g12a-usb2.c
> index 9065ffc85eb47..cd7eccab26490 100644
> --- a/drivers/phy/amlogic/phy-meson-g12a-usb2.c
> +++ b/drivers/phy/amlogic/phy-meson-g12a-usb2.c
> @@ -66,7 +66,7 @@
> #define PHY_CTRL_R14 0x38
> #define PHY_CTRL_R14_I_RDP_EN BIT(0)
> #define PHY_CTRL_R14_I_RPU_SW1_EN BIT(1)
> - #define PHY_CTRL_R14_I_RPU_SW2_EN GENMASK(2, 3)
> + #define PHY_CTRL_R14_I_RPU_SW2_EN GENMASK(3, 2)
> #define PHY_CTRL_R14_PG_RSTN BIT(4)
> #define PHY_CTRL_R14_I_C2L_DATA_16_8 BIT(5)
> #define PHY_CTRL_R14_I_C2L_ASSERT_SINGLE_EN_ZERO BIT(6)