Currently ipq806x soc use generic bitbang driver to
comunicate with the gmac ethernet interface.
Add a dedicated driver created by chunkeey to fix this.
Signed-off-by: Christian Lamparter <[email protected]>
Co-developed-by: Christian Lamparter <[email protected]>
Signed-off-by: Ansuel Smith <[email protected]>
---
Changes in v7:
- Add myself as module author and copyright
- Reduced usleep_range to 8-10 as suggested by chunkeey
Changes in v6:
- Fix error in commit description
- Add co-developed tag
Changes in v5:
- Rename define to more rappresentative name
Changes in v4:
- Fix wrong print value in dev_err
Changes in v3:
- Fix wrong return logic on error
Changes in v2:
- Use regmap_read_poll_timeout
- Reject clause 45
drivers/net/phy/Kconfig | 8 ++
drivers/net/phy/Makefile | 1 +
drivers/net/phy/mdio-ipq8064.c | 169 +++++++++++++++++++++++++++++++++
3 files changed, 178 insertions(+)
create mode 100644 drivers/net/phy/mdio-ipq8064.c
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 9dabe03a668c..ec2a5493a7e8 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -157,6 +157,14 @@ config MDIO_I2C
This is library mode.
+config MDIO_IPQ8064
+ tristate "Qualcomm IPQ8064 MDIO interface support"
+ depends on HAS_IOMEM && OF_MDIO
+ depends on MFD_SYSCON
+ help
+ This driver supports the MDIO interface found in the network
+ interface units of the IPQ8064 SoC
+
config MDIO_MOXART
tristate "MOXA ART MDIO interface support"
depends on ARCH_MOXART || COMPILE_TEST
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index fe5badf13b65..8f02bd2089f3 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o
obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o
obj-$(CONFIG_MDIO_I2C) += mdio-i2c.o
+obj-$(CONFIG_MDIO_IPQ8064) += mdio-ipq8064.o
obj-$(CONFIG_MDIO_MOXART) += mdio-moxart.o
obj-$(CONFIG_MDIO_MSCC_MIIM) += mdio-mscc-miim.o
obj-$(CONFIG_MDIO_OCTEON) += mdio-octeon.o
diff --git a/drivers/net/phy/mdio-ipq8064.c b/drivers/net/phy/mdio-ipq8064.c
new file mode 100644
index 000000000000..9713d6e8c076
--- /dev/null
+++ b/drivers/net/phy/mdio-ipq8064.c
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Qualcomm IPQ8064 MDIO interface driver
+ *
+ * Copyright (C) 2019 Christian Lamparter <[email protected]>
+ * Copyright (C) 2020 Ansuel Smith <[email protected]>
+ */
+
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <linux/of_mdio.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/syscon.h>
+
+/* MII address register definitions */
+#define MII_ADDR_REG_ADDR 0x10
+#define MII_BUSY BIT(0)
+#define MII_WRITE BIT(1)
+#define MII_CLKRANGE_60_100M (0 << 2)
+#define MII_CLKRANGE_100_150M (1 << 2)
+#define MII_CLKRANGE_20_35M (2 << 2)
+#define MII_CLKRANGE_35_60M (3 << 2)
+#define MII_CLKRANGE_150_250M (4 << 2)
+#define MII_CLKRANGE_250_300M (5 << 2)
+#define MII_CLKRANGE_MASK GENMASK(4, 2)
+#define MII_REG_SHIFT 6
+#define MII_REG_MASK GENMASK(10, 6)
+#define MII_ADDR_SHIFT 11
+#define MII_ADDR_MASK GENMASK(15, 11)
+
+#define MII_DATA_REG_ADDR 0x14
+
+#define MII_MDIO_DELAY_USEC (1000)
+#define MII_MDIO_RETRY_MSEC (10)
+
+struct ipq8064_mdio {
+ struct regmap *base; /* NSS_GMAC0_BASE */
+};
+
+static int
+ipq8064_mdio_wait_busy(struct ipq8064_mdio *priv)
+{
+ u32 busy;
+
+ return regmap_read_poll_timeout(priv->base, MII_ADDR_REG_ADDR, busy,
+ !(busy & MII_BUSY), MII_MDIO_DELAY_USEC,
+ MII_MDIO_RETRY_MSEC * USEC_PER_MSEC);
+}
+
+static int
+ipq8064_mdio_read(struct mii_bus *bus, int phy_addr, int reg_offset)
+{
+ struct ipq8064_mdio *priv = bus->priv;
+ u32 miiaddr = MII_BUSY | MII_CLKRANGE_250_300M;
+ u32 ret_val;
+ int err;
+
+ /* Reject clause 45 */
+ if (reg_offset & MII_ADDR_C45)
+ return -EOPNOTSUPP;
+
+ miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
+ ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK);
+
+ regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);
+ usleep_range(8, 10);
+
+ err = ipq8064_mdio_wait_busy(priv);
+ if (err)
+ return err;
+
+ regmap_read(priv->base, MII_DATA_REG_ADDR, &ret_val);
+ return (int)ret_val;
+}
+
+static int
+ipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data)
+{
+ struct ipq8064_mdio *priv = bus->priv;
+ u32 miiaddr = MII_WRITE | MII_BUSY | MII_CLKRANGE_250_300M;
+
+ /* Reject clause 45 */
+ if (reg_offset & MII_ADDR_C45)
+ return -EOPNOTSUPP;
+
+ regmap_write(priv->base, MII_DATA_REG_ADDR, data);
+
+ miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
+ ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK);
+
+ regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);
+ usleep_range(8, 10);
+
+ return ipq8064_mdio_wait_busy(priv);
+}
+
+static int
+ipq8064_mdio_probe(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ struct ipq8064_mdio *priv;
+ struct mii_bus *bus;
+ int ret;
+
+ bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*priv));
+ if (!bus)
+ return -ENOMEM;
+
+ bus->name = "ipq8064_mdio_bus";
+ bus->read = ipq8064_mdio_read;
+ bus->write = ipq8064_mdio_write;
+ snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(&pdev->dev));
+ bus->parent = &pdev->dev;
+
+ priv = bus->priv;
+ priv->base = syscon_node_to_regmap(np);
+ if (IS_ERR(priv->base) && priv->base != ERR_PTR(-EPROBE_DEFER))
+ priv->base = syscon_regmap_lookup_by_phandle(np, "master");
+
+ if (priv->base == ERR_PTR(-EPROBE_DEFER)) {
+ return -EPROBE_DEFER;
+ } else if (IS_ERR(priv->base)) {
+ dev_err(&pdev->dev, "error getting syscon regmap, error=%pe\n",
+ priv->base);
+ return PTR_ERR(priv->base);
+ }
+
+ ret = of_mdiobus_register(bus, np);
+ if (ret)
+ return ret;
+
+ platform_set_drvdata(pdev, bus);
+ return 0;
+}
+
+static int
+ipq8064_mdio_remove(struct platform_device *pdev)
+{
+ struct mii_bus *bus = platform_get_drvdata(pdev);
+
+ mdiobus_unregister(bus);
+
+ return 0;
+}
+
+static const struct of_device_id ipq8064_mdio_dt_ids[] = {
+ { .compatible = "qcom,ipq8064-mdio" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, ipq8064_mdio_dt_ids);
+
+static struct platform_driver ipq8064_mdio_driver = {
+ .probe = ipq8064_mdio_probe,
+ .remove = ipq8064_mdio_remove,
+ .driver = {
+ .name = "ipq8064-mdio",
+ .of_match_table = ipq8064_mdio_dt_ids,
+ },
+};
+
+module_platform_driver(ipq8064_mdio_driver);
+
+MODULE_DESCRIPTION("Qualcomm IPQ8064 MDIO interface driver");
+MODULE_AUTHOR("Christian Lamparter <[email protected]>");
+MODULE_AUTHOR("Ansuel Smith <[email protected]>");
+MODULE_LICENSE("GPL");
--
2.25.0
Add documentations for ipq806x mdio driver.
Signed-off-by: Ansuel Smith <[email protected]>
---
Changes in v7:
- Fix dt_binding_check problem
.../bindings/net/qcom,ipq8064-mdio.yaml | 55 +++++++++++++++++++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml
diff --git a/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml
new file mode 100644
index 000000000000..3178cbfdc661
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/qcom,ipq8064-mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm ipq806x MDIO bus controller
+
+maintainers:
+ - Ansuel Smith <[email protected]>
+
+description: |+
+ The ipq806x soc have a MDIO dedicated controller that is
+ used to comunicate with the gmac phy conntected.
+ Child nodes of this MDIO bus controller node are standard
+ Ethernet PHY device nodes as described in
+ Documentation/devicetree/bindings/net/phy.txt
+
+allOf:
+ - $ref: "mdio.yaml#"
+
+properties:
+ compatible:
+ const: qcom,ipq8064-mdio
+ reg:
+ maxItems: 1
+ description: address and length of the register set for the device
+ clocks:
+ maxItems: 1
+ description: A reference to the clock supplying the MDIO bus controller
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - "#address-cells"
+ - "#size-cells"
+
+examples:
+ - |
+ mdio0: mdio@37000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+
+ switch@10 {
+ compatible = "qca,qca8337";
+ /* ... */
+ };
+ };
--
2.25.0
On Mon, Feb 24, 2020 at 10:10:31PM +0100, Ansuel Smith wrote:
> Add documentations for ipq806x mdio driver.
>
> Signed-off-by: Ansuel Smith <[email protected]>
> ---
> Changes in v7:
> - Fix dt_binding_check problem
>
> .../bindings/net/qcom,ipq8064-mdio.yaml | 55 +++++++++++++++++++
> 1 file changed, 55 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml
> new file mode 100644
> index 000000000000..3178cbfdc661
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: GPL-2.0-or-later
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/qcom,ipq8064-mdio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm ipq806x MDIO bus controller
> +
> +maintainers:
> + - Ansuel Smith <[email protected]>
> +
> +description: |+
> + The ipq806x soc have a MDIO dedicated controller that is
> + used to comunicate with the gmac phy conntected.
used to communicate with the connected gmac phy.
Andrew
> +static int
> +ipq8064_mdio_read(struct mii_bus *bus, int phy_addr, int reg_offset)
> +{
> + struct ipq8064_mdio *priv = bus->priv;
> + u32 miiaddr = MII_BUSY | MII_CLKRANGE_250_300M;
> + u32 ret_val;
> + int err;
Hi Ansuel
Reverse Christmas tree. priv needs to move down a line.
> +
> + /* Reject clause 45 */
> + if (reg_offset & MII_ADDR_C45)
> + return -EOPNOTSUPP;
> +
> + miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
> + ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK);
> +
> + regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);
> + usleep_range(8, 10);
> +
> + err = ipq8064_mdio_wait_busy(priv);
> + if (err)
> + return err;
> +
> + regmap_read(priv->base, MII_DATA_REG_ADDR, &ret_val);
> + return (int)ret_val;
> +}
> +
> +static int
> +ipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data)
> +{
> + struct ipq8064_mdio *priv = bus->priv;
> + u32 miiaddr = MII_WRITE | MII_BUSY | MII_CLKRANGE_250_300M;
Same here.
> +static int
> +ipq8064_mdio_probe(struct platform_device *pdev)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + struct ipq8064_mdio *priv;
> + struct mii_bus *bus;
> + int ret;
> +
> + bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*priv));
> + if (!bus)
> + return -ENOMEM;
> +
> + bus->name = "ipq8064_mdio_bus";
> + bus->read = ipq8064_mdio_read;
> + bus->write = ipq8064_mdio_write;
> + snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(&pdev->dev));
> + bus->parent = &pdev->dev;
> +
> + priv = bus->priv;
> + priv->base = syscon_node_to_regmap(np);
> + if (IS_ERR(priv->base) && priv->base != ERR_PTR(-EPROBE_DEFER))
> + priv->base = syscon_regmap_lookup_by_phandle(np, "master");
"master" is not documented in the binding. Do we really need two
different ways to get the base address?
Andrew
On Mon, Feb 24, 2020 at 3:10 PM Ansuel Smith <[email protected]> wrote:
>
typo in the subject. Use 'dt-bindings: net: ...' for the subject prefix.
> Add documentations for ipq806x mdio driver.
>
> Signed-off-by: Ansuel Smith <[email protected]>
> ---
> Changes in v7:
> - Fix dt_binding_check problem
Um, no you didn't...
>
> .../bindings/net/qcom,ipq8064-mdio.yaml | 55 +++++++++++++++++++
> 1 file changed, 55 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml
> new file mode 100644
> index 000000000000..3178cbfdc661
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: GPL-2.0-or-later
Dual license new bindings please:
(GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/qcom,ipq8064-mdio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm ipq806x MDIO bus controller
> +
> +maintainers:
> + - Ansuel Smith <[email protected]>
> +
> +description: |+
Don't need '|+' unless you need specific formatting.
> + The ipq806x soc have a MDIO dedicated controller that is
> + used to comunicate with the gmac phy conntected.
> + Child nodes of this MDIO bus controller node are standard
> + Ethernet PHY device nodes as described in
> + Documentation/devicetree/bindings/net/phy.txt
> +
> +allOf:
> + - $ref: "mdio.yaml#"
> +
> +properties:
> + compatible:
> + const: qcom,ipq8064-mdio
blank line between properties please.
> + reg:
> + maxItems: 1
> + description: address and length of the register set for the device
That's every 'reg', you can drop this.
> + clocks:
> + maxItems: 1
> + description: A reference to the clock supplying the MDIO bus controller
That's every 'clocks', you can drop this.
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - "#address-cells"
> + - "#size-cells"
> +
> +examples:
> + - |
> + mdio0: mdio@37000000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + compatible = "qcom,ipq8064-mdio", "syscon";
'syscon' doesn't match the schema and is wrong.
> + reg = <0x37000000 0x200000>;
> + resets = <&gcc GMAC_CORE1_RESET>;
> + reset-names = "stmmaceth";
Not documented.
> + clocks = <&gcc GMAC_CORE1_CLK>;
You need to include the header for these defines.
> +
> + switch@10 {
> + compatible = "qca,qca8337";
> + /* ... */
> + };
> + };
> --
> 2.25.0
>
> On Mon, Feb 24, 2020 at 3:10 PM Ansuel Smith <[email protected]>
> wrote:
> >
>
> typo in the subject. Use 'dt-bindings: net: ...' for the subject prefix.
>
> > Add documentations for ipq806x mdio driver.
> >
> > Signed-off-by: Ansuel Smith <[email protected]>
> > ---
> > Changes in v7:
> > - Fix dt_binding_check problem
>
> Um, no you didn't...
>
Does make dt_check_binding still gives errors?
If yes can you give me some advice on how to test only this since it gives me
errors on checking other upstream Documentation ?
I will fix the other problem in v8. Sorry for the mess and thanks.
> >
> > .../bindings/net/qcom,ipq8064-mdio.yaml | 55
> +++++++++++++++++++
> > 1 file changed, 55 insertions(+)
> > create mode 100644
> Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/net/qcom,ipq8064-
> mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq8064-
> mdio.yaml
> > new file mode 100644
> > index 000000000000..3178cbfdc661
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/qcom,ipq8064-
> mdio.yaml
> > @@ -0,0 +1,55 @@
> > +# SPDX-License-Identifier: GPL-2.0-or-later
>
> Dual license new bindings please:
>
> (GPL-2.0-only OR BSD-2-Clause)
>
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/net/qcom,ipq8064-mdio.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm ipq806x MDIO bus controller
> > +
> > +maintainers:
> > + - Ansuel Smith <[email protected]>
> > +
> > +description: |+
>
> Don't need '|+' unless you need specific formatting.
>
> > + The ipq806x soc have a MDIO dedicated controller that is
> > + used to comunicate with the gmac phy conntected.
> > + Child nodes of this MDIO bus controller node are standard
> > + Ethernet PHY device nodes as described in
> > + Documentation/devicetree/bindings/net/phy.txt
> > +
> > +allOf:
> > + - $ref: "mdio.yaml#"
> > +
> > +properties:
> > + compatible:
> > + const: qcom,ipq8064-mdio
>
> blank line between properties please.
>
> > + reg:
> > + maxItems: 1
> > + description: address and length of the register set for the device
>
> That's every 'reg', you can drop this.
>
> > + clocks:
> > + maxItems: 1
> > + description: A reference to the clock supplying the MDIO bus
> controller
>
> That's every 'clocks', you can drop this.
>
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - "#address-cells"
> > + - "#size-cells"
> > +
> > +examples:
> > + - |
> > + mdio0: mdio@37000000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + compatible = "qcom,ipq8064-mdio", "syscon";
>
> 'syscon' doesn't match the schema and is wrong.
>
> > + reg = <0x37000000 0x200000>;
>
> > + resets = <&gcc GMAC_CORE1_RESET>;
> > + reset-names = "stmmaceth";
>
> Not documented.
>
> > + clocks = <&gcc GMAC_CORE1_CLK>;
>
> You need to include the header for these defines.
>
> > +
> > + switch@10 {
> > + compatible = "qca,qca8337";
> > + /* ... */
> > + };
> > + };
> > --
> > 2.25.0
> >
On Tue, Feb 25, 2020 at 12:40 PM <[email protected]> wrote:
>
> > On Mon, Feb 24, 2020 at 3:10 PM Ansuel Smith <[email protected]>
> > wrote:
> > >
> >
> > typo in the subject. Use 'dt-bindings: net: ...' for the subject prefix.
> >
> > > Add documentations for ipq806x mdio driver.
> > >
> > > Signed-off-by: Ansuel Smith <[email protected]>
> > > ---
> > > Changes in v7:
> > > - Fix dt_binding_check problem
> >
> > Um, no you didn't...
> >
>
> Does make dt_check_binding still gives errors?
> If yes can you give me some advice on how to test only this since it gives me
> errors on checking other upstream Documentation ?
Don't use linux-next. Linus' master is only warnings. If you have
errors on that, then you may need to update dtschema.
Also, using 'make -k' helps if there are make errors.
Rob