2020-03-03 09:35:07

by Greentime Hu

[permalink] [raw]
Subject: [PATCH 1/2] riscv: uaccess should be used in nommu mode

It might have the unaligned access exception when trying to exchange data
with user space program. In this case, it failed in tty_ioctl(). Therefore
we should enable uaccess.S for NOMMU mode since the generic code doesn't
handle the unaligned access cases.

0x8013a212 <tty_ioctl+462>: ld a5,460(s1)

[ 0.115279] Oops - load address misaligned [#1]
[ 0.115284] CPU: 0 PID: 29 Comm: sh Not tainted 5.4.0-rc5-00020-gb4c27160d562-dirty #36
[ 0.115294] epc: 000000008013a212 ra : 000000008013a212 sp : 000000008f48dd50
[ 0.115303] gp : 00000000801cac28 tp : 000000008fb80000 t0 : 00000000000000e8
[ 0.115312] t1 : 000000008f58f108 t2 : 0000000000000009 s0 : 000000008f48ddf0
[ 0.115321] s1 : 000000008f8c6220 a0 : 0000000000000001 a1 : 000000008f48dd28
[ 0.115330] a2 : 000000008fb80000 a3 : 00000000801a7398 a4 : 0000000000000000
[ 0.115339] a5 : 0000000000000000 a6 : 000000008f58f0c6 a7 : 000000000000001d
[ 0.115348] s2 : 000000008f8c6308 s3 : 000000008f78b7c8 s4 : 000000008fb834c0
[ 0.115357] s5 : 0000000000005413 s6 : 0000000000000000 s7 : 000000008f58f2b0
[ 0.115366] s8 : 000000008f858008 s9 : 000000008f776818 s10: 000000008f776830
[ 0.115375] s11: 000000008fb840a8 t3 : 1999999999999999 t4 : 000000008f78704c
[ 0.115384] t5 : 0000000000000005 t6 : 0000000000000002
[ 0.115391] status: 0000000200001880 badaddr: 000000008f8c63ec cause: 0000000000000004
[ 0.115401] ---[ end trace 00d490c6a8b6c9ac ]---

This failure could be fixed after this patch applied.

[ 0.002282] Run /init as init process
Initializing random number generator... [ 0.005573] random: dd: uninitialized urandom read (512 bytes read)
done.

Welcome to Buildroot
buildroot login: root
Password:
Jan 1 00:00:00 login[62]: root login on 'ttySIF0'
~ #

Signed-off-by: Greentime Hu <[email protected]>
---
arch/riscv/Kconfig | 1 -
arch/riscv/include/asm/uaccess.h | 36 ++++++++++++++++----------------
arch/riscv/lib/Makefile | 2 +-
3 files changed, 19 insertions(+), 20 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 73f029eae0cc..92d63a63aec8 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -50,7 +50,6 @@ config RISCV
select PCI_DOMAINS_GENERIC if PCI
select PCI_MSI if PCI
select RISCV_TIMER
- select UACCESS_MEMCPY if !MMU
select GENERIC_IRQ_MULTI_HANDLER
select GENERIC_ARCH_TOPOLOGY if SMP
select ARCH_HAS_PTE_SPECIAL
diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
index f462a183a9c2..8ce9d607b53d 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -11,6 +11,24 @@
/*
* User space memory access functions
*/
+
+extern unsigned long __must_check __asm_copy_to_user(void __user *to,
+ const void *from, unsigned long n);
+extern unsigned long __must_check __asm_copy_from_user(void *to,
+ const void __user *from, unsigned long n);
+
+static inline unsigned long
+raw_copy_from_user(void *to, const void __user *from, unsigned long n)
+{
+ return __asm_copy_from_user(to, from, n);
+}
+
+static inline unsigned long
+raw_copy_to_user(void __user *to, const void *from, unsigned long n)
+{
+ return __asm_copy_to_user(to, from, n);
+}
+
#ifdef CONFIG_MMU
#include <linux/errno.h>
#include <linux/compiler.h>
@@ -367,24 +385,6 @@ do { \
-EFAULT; \
})

-
-extern unsigned long __must_check __asm_copy_to_user(void __user *to,
- const void *from, unsigned long n);
-extern unsigned long __must_check __asm_copy_from_user(void *to,
- const void __user *from, unsigned long n);
-
-static inline unsigned long
-raw_copy_from_user(void *to, const void __user *from, unsigned long n)
-{
- return __asm_copy_from_user(to, from, n);
-}
-
-static inline unsigned long
-raw_copy_to_user(void __user *to, const void *from, unsigned long n)
-{
- return __asm_copy_to_user(to, from, n);
-}
-
extern long strncpy_from_user(char *dest, const char __user *src, long count);

extern long __must_check strlen_user(const char __user *str);
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index 47e7a8204460..0d0db80800c4 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -2,5 +2,5 @@
lib-y += delay.o
lib-y += memcpy.o
lib-y += memset.o
-lib-$(CONFIG_MMU) += uaccess.o
+lib-y += uaccess.o
lib-$(CONFIG_64BIT) += tishift.o
--
2.25.1


2020-03-03 09:35:11

by Greentime Hu

[permalink] [raw]
Subject: [PATCH 2/2] riscv: fix the IPI missing issue in nommu mode

This patch fixes the IPI(inner processor interrupt) missing issue. It
failed because it used hartid_mask to iterate for_each_cpu(), however the
cpu_mask and hartid_mask may not be always the same. It will never send the
IPI to hartid 4 because it will be skipped in for_each_cpu loop in my case.

We can reproduce this case in Qemu sifive_u machine by this command.
qemu-system-riscv64 -nographic -smp 5 -m 1G -M sifive_u -kernel \
arch/riscv/boot/loader

It will hang in csd_lock_wait(csd) because the csd_unlock(csd) is not
called. It is not called because hartid 4 doesn't receive the IPI to
release this lock. The caller hart doesn't send the IPI to hartid 4 is
because of hartid 4 is skipped in for_each_cpu(). It will be skipped is
because "(cpu) < nr_cpu_ids" is not true. The hartid is 4 and nr_cpu_ids
is 4. Therefore it should use cpumask in for_each_cpu() instead of
hartid_mask.

/* Send a message to all CPUs in the map */
arch_send_call_function_ipi_mask(cfd->cpumask_ipi);

if (wait) {
for_each_cpu(cpu, cfd->cpumask) {
call_single_data_t *csd;
csd = per_cpu_ptr(cfd->csd, cpu);
csd_lock_wait(csd);
}
}

for ((cpu) = -1; \
(cpu) = cpumask_next((cpu), (mask)), \
(cpu) < nr_cpu_ids;)

It could boot to login console after this patch applied.

Fixes: b2d36b5668f6 ("riscv: provide native clint access for M-mode")
Signed-off-by: Greentime Hu <[email protected]>
---
arch/riscv/include/asm/clint.h | 8 ++++----
arch/riscv/kernel/smp.c | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/riscv/include/asm/clint.h b/arch/riscv/include/asm/clint.h
index 6eaa2eedd694..a279b17a6aad 100644
--- a/arch/riscv/include/asm/clint.h
+++ b/arch/riscv/include/asm/clint.h
@@ -15,12 +15,12 @@ static inline void clint_send_ipi_single(unsigned long hartid)
writel(1, clint_ipi_base + hartid);
}

-static inline void clint_send_ipi_mask(const struct cpumask *hartid_mask)
+static inline void clint_send_ipi_mask(const struct cpumask *mask)
{
- int hartid;
+ int cpu;

- for_each_cpu(hartid, hartid_mask)
- clint_send_ipi_single(hartid);
+ for_each_cpu(cpu, mask)
+ clint_send_ipi_single(cpuid_to_hartid_map(cpu));
}

static inline void clint_clear_ipi(unsigned long hartid)
diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
index eb878abcaaf8..e0a6293093f1 100644
--- a/arch/riscv/kernel/smp.c
+++ b/arch/riscv/kernel/smp.c
@@ -96,7 +96,7 @@ static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
if (IS_ENABLED(CONFIG_RISCV_SBI))
sbi_send_ipi(cpumask_bits(&hartid_mask));
else
- clint_send_ipi_mask(&hartid_mask);
+ clint_send_ipi_mask(mask);
}

static void send_ipi_single(int cpu, enum ipi_message_type op)
--
2.25.1

2020-03-19 01:45:43

by Palmer Dabbelt

[permalink] [raw]
Subject: Re: [PATCH 1/2] riscv: uaccess should be used in nommu mode

On Tue, 03 Mar 2020 01:34:17 PST (-0800), [email protected] wrote:
> It might have the unaligned access exception when trying to exchange data
> with user space program. In this case, it failed in tty_ioctl(). Therefore
> we should enable uaccess.S for NOMMU mode since the generic code doesn't
> handle the unaligned access cases.
>
> 0x8013a212 <tty_ioctl+462>: ld a5,460(s1)
>
> [ 0.115279] Oops - load address misaligned [#1]
> [ 0.115284] CPU: 0 PID: 29 Comm: sh Not tainted 5.4.0-rc5-00020-gb4c27160d562-dirty #36
> [ 0.115294] epc: 000000008013a212 ra : 000000008013a212 sp : 000000008f48dd50
> [ 0.115303] gp : 00000000801cac28 tp : 000000008fb80000 t0 : 00000000000000e8
> [ 0.115312] t1 : 000000008f58f108 t2 : 0000000000000009 s0 : 000000008f48ddf0
> [ 0.115321] s1 : 000000008f8c6220 a0 : 0000000000000001 a1 : 000000008f48dd28
> [ 0.115330] a2 : 000000008fb80000 a3 : 00000000801a7398 a4 : 0000000000000000
> [ 0.115339] a5 : 0000000000000000 a6 : 000000008f58f0c6 a7 : 000000000000001d
> [ 0.115348] s2 : 000000008f8c6308 s3 : 000000008f78b7c8 s4 : 000000008fb834c0
> [ 0.115357] s5 : 0000000000005413 s6 : 0000000000000000 s7 : 000000008f58f2b0
> [ 0.115366] s8 : 000000008f858008 s9 : 000000008f776818 s10: 000000008f776830
> [ 0.115375] s11: 000000008fb840a8 t3 : 1999999999999999 t4 : 000000008f78704c
> [ 0.115384] t5 : 0000000000000005 t6 : 0000000000000002
> [ 0.115391] status: 0000000200001880 badaddr: 000000008f8c63ec cause: 0000000000000004
> [ 0.115401] ---[ end trace 00d490c6a8b6c9ac ]---
>
> This failure could be fixed after this patch applied.
>
> [ 0.002282] Run /init as init process
> Initializing random number generator... [ 0.005573] random: dd: uninitialized urandom read (512 bytes read)
> done.
>
> Welcome to Buildroot
> buildroot login: root
> Password:
> Jan 1 00:00:00 login[62]: root login on 'ttySIF0'
> ~ #
>
> Signed-off-by: Greentime Hu <[email protected]>
> ---
> arch/riscv/Kconfig | 1 -
> arch/riscv/include/asm/uaccess.h | 36 ++++++++++++++++----------------
> arch/riscv/lib/Makefile | 2 +-
> 3 files changed, 19 insertions(+), 20 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 73f029eae0cc..92d63a63aec8 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -50,7 +50,6 @@ config RISCV
> select PCI_DOMAINS_GENERIC if PCI
> select PCI_MSI if PCI
> select RISCV_TIMER
> - select UACCESS_MEMCPY if !MMU
> select GENERIC_IRQ_MULTI_HANDLER
> select GENERIC_ARCH_TOPOLOGY if SMP
> select ARCH_HAS_PTE_SPECIAL
> diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
> index f462a183a9c2..8ce9d607b53d 100644
> --- a/arch/riscv/include/asm/uaccess.h
> +++ b/arch/riscv/include/asm/uaccess.h
> @@ -11,6 +11,24 @@
> /*
> * User space memory access functions
> */
> +
> +extern unsigned long __must_check __asm_copy_to_user(void __user *to,
> + const void *from, unsigned long n);
> +extern unsigned long __must_check __asm_copy_from_user(void *to,
> + const void __user *from, unsigned long n);
> +
> +static inline unsigned long
> +raw_copy_from_user(void *to, const void __user *from, unsigned long n)
> +{
> + return __asm_copy_from_user(to, from, n);
> +}
> +
> +static inline unsigned long
> +raw_copy_to_user(void __user *to, const void *from, unsigned long n)
> +{
> + return __asm_copy_to_user(to, from, n);
> +}
> +
> #ifdef CONFIG_MMU
> #include <linux/errno.h>
> #include <linux/compiler.h>
> @@ -367,24 +385,6 @@ do { \
> -EFAULT; \
> })
>
> -
> -extern unsigned long __must_check __asm_copy_to_user(void __user *to,
> - const void *from, unsigned long n);
> -extern unsigned long __must_check __asm_copy_from_user(void *to,
> - const void __user *from, unsigned long n);
> -
> -static inline unsigned long
> -raw_copy_from_user(void *to, const void __user *from, unsigned long n)
> -{
> - return __asm_copy_from_user(to, from, n);
> -}
> -
> -static inline unsigned long
> -raw_copy_to_user(void __user *to, const void *from, unsigned long n)
> -{
> - return __asm_copy_to_user(to, from, n);
> -}
> -
> extern long strncpy_from_user(char *dest, const char __user *src, long count);
>
> extern long __must_check strlen_user(const char __user *str);
> diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
> index 47e7a8204460..0d0db80800c4 100644
> --- a/arch/riscv/lib/Makefile
> +++ b/arch/riscv/lib/Makefile
> @@ -2,5 +2,5 @@
> lib-y += delay.o
> lib-y += memcpy.o
> lib-y += memset.o
> -lib-$(CONFIG_MMU) += uaccess.o
> +lib-y += uaccess.o
> lib-$(CONFIG_64BIT) += tishift.o

Reviewed-by: Palmer Dabbelt <[email protected]>

2020-03-19 01:46:17

by Palmer Dabbelt

[permalink] [raw]
Subject: Re: [PATCH 2/2] riscv: fix the IPI missing issue in nommu mode

On Tue, 03 Mar 2020 01:34:18 PST (-0800), [email protected] wrote:
> This patch fixes the IPI(inner processor interrupt) missing issue. It
> failed because it used hartid_mask to iterate for_each_cpu(), however the
> cpu_mask and hartid_mask may not be always the same. It will never send the
> IPI to hartid 4 because it will be skipped in for_each_cpu loop in my case.
>
> We can reproduce this case in Qemu sifive_u machine by this command.
> qemu-system-riscv64 -nographic -smp 5 -m 1G -M sifive_u -kernel \
> arch/riscv/boot/loader
>
> It will hang in csd_lock_wait(csd) because the csd_unlock(csd) is not
> called. It is not called because hartid 4 doesn't receive the IPI to
> release this lock. The caller hart doesn't send the IPI to hartid 4 is
> because of hartid 4 is skipped in for_each_cpu(). It will be skipped is
> because "(cpu) < nr_cpu_ids" is not true. The hartid is 4 and nr_cpu_ids
> is 4. Therefore it should use cpumask in for_each_cpu() instead of
> hartid_mask.
>
> /* Send a message to all CPUs in the map */
> arch_send_call_function_ipi_mask(cfd->cpumask_ipi);
>
> if (wait) {
> for_each_cpu(cpu, cfd->cpumask) {
> call_single_data_t *csd;
> csd = per_cpu_ptr(cfd->csd, cpu);
> csd_lock_wait(csd);
> }
> }
>
> for ((cpu) = -1; \
> (cpu) = cpumask_next((cpu), (mask)), \
> (cpu) < nr_cpu_ids;)
>
> It could boot to login console after this patch applied.
>
> Fixes: b2d36b5668f6 ("riscv: provide native clint access for M-mode")
> Signed-off-by: Greentime Hu <[email protected]>
> ---
> arch/riscv/include/asm/clint.h | 8 ++++----
> arch/riscv/kernel/smp.c | 2 +-
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/riscv/include/asm/clint.h b/arch/riscv/include/asm/clint.h
> index 6eaa2eedd694..a279b17a6aad 100644
> --- a/arch/riscv/include/asm/clint.h
> +++ b/arch/riscv/include/asm/clint.h
> @@ -15,12 +15,12 @@ static inline void clint_send_ipi_single(unsigned long hartid)
> writel(1, clint_ipi_base + hartid);
> }
>
> -static inline void clint_send_ipi_mask(const struct cpumask *hartid_mask)
> +static inline void clint_send_ipi_mask(const struct cpumask *mask)
> {
> - int hartid;
> + int cpu;
>
> - for_each_cpu(hartid, hartid_mask)
> - clint_send_ipi_single(hartid);
> + for_each_cpu(cpu, mask)
> + clint_send_ipi_single(cpuid_to_hartid_map(cpu));
> }
>
> static inline void clint_clear_ipi(unsigned long hartid)
> diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
> index eb878abcaaf8..e0a6293093f1 100644
> --- a/arch/riscv/kernel/smp.c
> +++ b/arch/riscv/kernel/smp.c
> @@ -96,7 +96,7 @@ static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
> if (IS_ENABLED(CONFIG_RISCV_SBI))
> sbi_send_ipi(cpumask_bits(&hartid_mask));
> else
> - clint_send_ipi_mask(&hartid_mask);
> + clint_send_ipi_mask(mask);
> }
>
> static void send_ipi_single(int cpu, enum ipi_message_type op)

Thanks. We should really stop putting hart IDs in cpumasks, as that's just
nonsense.

Reviewed-by: Palmer Dabbelt <[email protected]>

I'm taking these both onto fixes.