2020-03-05 08:29:23

by Lokesh Vutla

Subject: [PATCH v3 4/6] clocksource: timer-ti-dm: Do not update counter on updating the period

Write to trigger register(OMAP_TIMER_TRIGGER_REG) will load the value
in Load register(OMAP_TIMER_LOAD_REG) into Counter register
(OMAP_TIMER_COUNTER_REG).

omap_dm_timer_set_load() writes into trigger register every time load
register is updated. When timer is configured in pwm mode, this causes
disruption in current pwm cycle, which is not expected especially when
pwm is used as PPS signal for synchronized PTP clocks. So do not write
into trigger register on updating the period.

Tested-by: Tony Lindgren <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
---
drivers/clocksource/timer-ti-dm.c | 1 -
1 file changed, 1 deletion(-)

diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c
index e6b6123ec567..8f6d477d2078 100644
--- a/drivers/clocksource/timer-ti-dm.c
+++ b/drivers/clocksource/timer-ti-dm.c
@@ -548,7 +548,6 @@ static int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);

- omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
omap_dm_timer_disable(timer);
return 0;
}
--
2.23.0

2020-03-19 08:48:22

by tip-bot2 for Jacob Pan

Subject: [tip: timers/core] clocksource/drivers/timer-ti-dm: Do not update counter on updating the period

The following commit has been merged into the timers/core branch of tip:

Commit-ID: aff7665dc64b60c1f93d6e52fde297ae6b8999ae
Gitweb: https://git.kernel.org/tip/aff7665dc64b60c1f93d6e52fde297ae6b8999ae
Author: Lokesh Vutla <[email protected]>
AuthorDate: Thu, 05 Mar 2020 13:57:13 +05:30
Committer: Daniel Lezcano <[email protected]>
CommitterDate: Mon, 16 Mar 2020 12:40:36 +01:00

clocksource/drivers/timer-ti-dm: Do not update counter on updating the period

Write to trigger register(OMAP_TIMER_TRIGGER_REG) will load the value
in Load register(OMAP_TIMER_LOAD_REG) into Counter register
(OMAP_TIMER_COUNTER_REG).

omap_dm_timer_set_load() writes into trigger register every time load
register is updated. When timer is configured in pwm mode, this causes
disruption in current pwm cycle, which is not expected especially when
pwm is used as PPS signal for synchronized PTP clocks. So do not write
into trigger register on updating the period.

Tested-by: Tony Lindgren <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
drivers/clocksource/timer-ti-dm.c | 1 -
1 file changed, 1 deletion(-)

diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c
index 1d1bea7..b565b84 100644
--- a/drivers/clocksource/timer-ti-dm.c
+++ b/drivers/clocksource/timer-ti-dm.c
@@ -579,7 +579,6 @@ static int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);

- omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
omap_dm_timer_disable(timer);
return 0;
}