Convert the ingenic,cgu.txt doc file to ingenic,cgu.yaml.
The binding documentation has been updated as well. The node can have a
child node that corresponds to the USB PHY, which happens to be present
in the middle of the CGU registers.
Signed-off-by: Paul Cercueil <[email protected]>
---
.../devicetree/bindings/clock/ingenic,cgu.txt | 57 --------
.../bindings/clock/ingenic,cgu.yaml | 122 ++++++++++++++++++
2 files changed, 122 insertions(+), 57 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/clock/ingenic,cgu.txt
create mode 100644 Documentation/devicetree/bindings/clock/ingenic,cgu.yaml
diff --git a/Documentation/devicetree/bindings/clock/ingenic,cgu.txt b/Documentation/devicetree/bindings/clock/ingenic,cgu.txt
deleted file mode 100644
index 75598e655067..000000000000
--- a/Documentation/devicetree/bindings/clock/ingenic,cgu.txt
+++ /dev/null
@@ -1,57 +0,0 @@
-Ingenic SoC CGU binding
-
-The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
-typically includes a variety of PLLs, multiplexers, dividers & gates in order
-to provide many different clock signals derived from only 2 external source
-clocks.
-
-Required properties:
-- compatible : Should be one of:
- * ingenic,jz4740-cgu
- * ingenic,jz4725b-cgu
- * ingenic,jz4770-cgu
- * ingenic,jz4780-cgu
- * ingenic,x1000-cgu
-- reg : The address & length of the CGU registers.
-- clocks : List of phandle & clock specifiers for clocks external to the CGU.
- Two such external clocks should be specified - first the external crystal
- "ext" and second the RTC clock source "rtc".
-- clock-names : List of name strings for the external clocks.
-- #clock-cells: Should be 1.
- Clock consumers specify this argument to identify a clock. The valid values
- may be found in <dt-bindings/clock/<soctype>-cgu.h>.
-
-Example SoC include file:
-
-/ {
- cgu: jz4740-cgu {
- compatible = "ingenic,jz4740-cgu";
- reg = <0x10000000 0x100>;
- #clock-cells = <1>;
- };
-
- uart0: serial@10030000 {
- clocks = <&cgu JZ4740_CLK_UART0>;
- };
-};
-
-Example board file:
-
-/ {
- ext: clock@0 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <12000000>;
- };
-
- rtc: clock@1 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
-
- &cgu {
- clocks = <&ext> <&rtc>;
- clock-names: "ext", "rtc";
- };
-};
diff --git a/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml b/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml
new file mode 100644
index 000000000000..0281cd1d7e1b
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml
@@ -0,0 +1,122 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/ingenic,cgu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic SoCs CGU devicetree bindings
+
+description: |
+ The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
+ typically includes a variety of PLLs, multiplexers, dividers & gates in order
+ to provide many different clock signals derived from only 2 external source
+ clocks.
+
+maintainers:
+ - Paul Cercueil <[email protected]>
+
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ingenic,jz4740-cgu
+ - ingenic,jz4725b-cgu
+ - ingenic,jz4770-cgu
+ - ingenic,jz4780-cgu
+ - ingenic,x1000-cgu
+ required:
+ - compatible
+
+properties:
+ $nodename:
+ pattern: "^clock-controller@[0-9a-f]+$"
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ "#clock-cells":
+ const: 1
+
+ ranges: true
+
+ compatible:
+ items:
+ - enum:
+ - ingenic,jz4740-cgu
+ - ingenic,jz4725b-cgu
+ - ingenic,jz4770-cgu
+ - ingenic,jz4780-cgu
+ - ingenic,x1000-cgu
+ - const: simple-mfd
+ minItems: 1
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: External oscillator clock
+ - description: Internal 32 kHz RTC clock
+
+ clock-names:
+ items:
+ - const: ext
+ - enum:
+ - rtc
+ - osc32k # Different name, same clock
+
+ assigned-clocks:
+ minItems: 1
+ maxItems: 64
+
+ assigned-clock-parents:
+ minItems: 1
+ maxItems: 64
+
+ assigned-clock-rates:
+ minItems: 1
+ maxItems: 64
+
+required:
+ - "#clock-cells"
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+patternProperties:
+ "^usb-phy@[a-f0-9]+$":
+ allOf: [ $ref: "../usb/ingenic,jz4770-phy.yaml#" ]
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/jz4770-cgu.h>
+ cgu: clock-controller@10000000 {
+ compatible = "ingenic,jz4770-cgu", "simple-mfd";
+ reg = <0x10000000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x10000000 0x100>;
+
+ clocks = <&ext>, <&osc32k>;
+ clock-names = "ext", "osc32k";
+
+ #clock-cells = <1>;
+
+ otg_phy: usb-phy@3c {
+ compatible = "ingenic,jz4770-phy";
+ reg = <0x3c 0x10>;
+
+ clocks = <&cgu JZ4770_CLK_OTG_PHY>;
+
+ vcc-supply = <&ldo5>;
+
+ #phy-cells = <0>;
+ };
+ };
--
2.26.2
Convert the ingenic,intc.txt doc file to ingenic,intc.yaml.
Some compatible strings now require a fallback, as the controller
generally works the same across the SoCs families.
Signed-off-by: Paul Cercueil <[email protected]>
---
.../interrupt-controller/ingenic,intc.txt | 28 ---------
.../interrupt-controller/ingenic,intc.yaml | 63 +++++++++++++++++++
2 files changed, 63 insertions(+), 28 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml
diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
deleted file mode 100644
index d4373d0f7121..000000000000
--- a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
+++ /dev/null
@@ -1,28 +0,0 @@
-Ingenic SoC Interrupt Controller
-
-Required properties:
-
-- compatible : should be "ingenic,<socname>-intc". Valid strings are:
- ingenic,jz4740-intc
- ingenic,jz4725b-intc
- ingenic,jz4770-intc
- ingenic,jz4775-intc
- ingenic,jz4780-intc
-- reg : Specifies base physical address and size of the registers.
-- interrupt-controller : Identifies the node as an interrupt controller
-- #interrupt-cells : Specifies the number of cells needed to encode an
- interrupt source. The value shall be 1.
-- interrupts : Specifies the CPU interrupt the controller is connected to.
-
-Example:
-
-intc: interrupt-controller@10001000 {
- compatible = "ingenic,jz4740-intc";
- reg = <0x10001000 0x14>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&cpuintc>;
- interrupts = <2>;
-};
diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml
new file mode 100644
index 000000000000..28b27e1a6e9d
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/ingenic,intc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic SoCs interrupt controller devicetree bindings
+
+maintainers:
+ - Paul Cercueil <[email protected]>
+
+properties:
+ $nodename:
+ pattern: "^interrupt-controller@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - enum:
+ - ingenic,jz4740-intc
+ - ingenic,jz4760-intc
+ - ingenic,jz4780-intc
+ - items:
+ - enum:
+ - ingenic,jz4775-intc
+ - ingenic,jz4770-intc
+ - const: ingenic,jz4760-intc
+ - items:
+ - const: ingenic,x1000-intc
+ - const: ingenic,jz4780-intc
+ - items:
+ - const: ingenic,jz4725b-intc
+ - const: ingenic,jz4740-intc
+
+ "#interrupt-cells":
+ const: 1
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#interrupt-cells"
+ - interrupt-controller
+
+examples:
+ - |
+ intc: interrupt-controller@10001000 {
+ compatible = "ingenic,jz4770-intc", "ingenic,jz4760-intc";
+ reg = <0x10001000 0x40>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+ };
--
2.26.2
Convert the ingenic,jz4780-nemc.txt doc file to ingenic,nemc.yaml.
The ingenic,jz4725b-nemc compatible string was added in the process,
with a fallback to ingenic,jz4740-nemc.
Signed-off-by: Paul Cercueil <[email protected]>
---
.../ingenic,jz4780-nemc.txt | 76 ---------------
.../ingenic,nemc-client.yaml | 45 +++++++++
.../memory-controllers/ingenic,nemc.yaml | 95 +++++++++++++++++++
3 files changed, 140 insertions(+), 76 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt
create mode 100644 Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-client.yaml
create mode 100644 Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml
diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt b/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt
deleted file mode 100644
index 59b8dcc118ee..000000000000
--- a/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt
+++ /dev/null
@@ -1,76 +0,0 @@
-* Ingenic JZ4780 NAND/external memory controller (NEMC)
-
-This file documents the device tree bindings for the NEMC external memory
-controller in Ingenic JZ4780
-
-Required properties:
-- compatible: Should be set to one of:
- "ingenic,jz4740-nemc" (JZ4740)
- "ingenic,jz4780-nemc" (JZ4780)
-- reg: Should specify the NEMC controller registers location and length.
-- clocks: Clock for the NEMC controller.
-- #address-cells: Must be set to 2.
-- #size-cells: Must be set to 1.
-- ranges: A set of ranges for each bank describing the physical memory layout.
- Each should specify the following 4 integer values:
-
- <cs number> 0 <physical address of mapping> <size of mapping>
-
-Each child of the NEMC node describes a device connected to the NEMC.
-
-Required child node properties:
-- reg: Should contain at least one register specifier, given in the following
- format:
-
- <cs number> <offset> <size>
-
- Multiple registers can be specified across multiple banks. This is needed,
- for example, for packaged NAND devices with multiple dies. Such devices
- should be grouped into a single node.
-
-Optional child node properties:
-- ingenic,nemc-bus-width: Specifies the bus width in bits. Defaults to 8 bits.
-- ingenic,nemc-tAS: Address setup time in nanoseconds.
-- ingenic,nemc-tAH: Address hold time in nanoseconds.
-- ingenic,nemc-tBP: Burst pitch time in nanoseconds.
-- ingenic,nemc-tAW: Access wait time in nanoseconds.
-- ingenic,nemc-tSTRV: Static memory recovery time in nanoseconds.
-
-If a child node references multiple banks in its "reg" property, the same value
-for all optional parameters will be configured for all banks. If any optional
-parameters are omitted, they will be left unchanged from whatever they are
-configured to when the NEMC device is probed (which may be the reset value as
-given in the hardware reference manual, or a value configured by the boot
-loader).
-
-Example (NEMC node with a NAND child device attached at CS1):
-
-nemc: nemc@13410000 {
- compatible = "ingenic,jz4780-nemc";
- reg = <0x13410000 0x10000>;
-
- #address-cells = <2>;
- #size-cells = <1>;
-
- ranges = <1 0 0x1b000000 0x1000000
- 2 0 0x1a000000 0x1000000
- 3 0 0x19000000 0x1000000
- 4 0 0x18000000 0x1000000
- 5 0 0x17000000 0x1000000
- 6 0 0x16000000 0x1000000>;
-
- clocks = <&cgu JZ4780_CLK_NEMC>;
-
- nand: nand@1 {
- compatible = "ingenic,jz4780-nand";
- reg = <1 0 0x1000000>;
-
- ingenic,nemc-tAS = <10>;
- ingenic,nemc-tAH = <5>;
- ingenic,nemc-tBP = <10>;
- ingenic,nemc-tAW = <15>;
- ingenic,nemc-tSTRV = <100>;
-
- ...
- };
-};
diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-client.yaml b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-client.yaml
new file mode 100644
index 000000000000..682e6f7e74fa
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-client.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc-client.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title:
+ Ingenic SoCs NAND / External Memory Controller (NEMC)
+ client-specific properties
+
+maintainers:
+ - Paul Cercueil <[email protected]>
+
+description:
+ This document lists the various properties that child nodes of the NEMC node
+ can use.
+
+properties:
+ ingenic,nemc-bus-width:
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - enum: [8, 16]
+ description: Specifies the bus width in bits.
+
+ ingenic,nemc-tAS:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Address setup time in nanoseconds.
+
+ ingenic,nemc-tAH:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Address hold time in nanoseconds.
+
+ ingenic,nemc-tBP:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Burst pitch time in nanoseconds.
+
+ ingenic,nemc-tAW:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Address wait time in nanoseconds.
+
+ ingenic,nemc-tSTRV:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Static memory recovery time in nanoseconds.
+
+...
diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml
new file mode 100644
index 000000000000..c7fd28462fd8
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic SoCs NAND / External Memory Controller (NEMC) devicetree bindings
+
+maintainers:
+ - Paul Cercueil <[email protected]>
+
+properties:
+ $nodename:
+ pattern: "^memory-controller@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - enum:
+ - ingenic,jz4740-nemc
+ - ingenic,jz4780-nemc
+ - items:
+ - const: ingenic,jz4725b-nemc
+ - const: ingenic,jz4740-nemc
+
+ "#address-cells":
+ const: 2
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+patternProperties:
+ "^(nand-controller|ethernet)@[0-9]+$":
+ type: object
+ allOf:
+ - $ref: ingenic,nemc-client.yaml#
+
+required:
+ - compatible
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+ - reg
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/jz4780-cgu.h>
+ #include <dt-bindings/gpio/gpio.h>
+ nemc: memory-controller@13410000 {
+ compatible = "ingenic,jz4780-nemc";
+ reg = <0x13410000 0x10000>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <1 0 0x1b000000 0x1000000>,
+ <2 0 0x1a000000 0x1000000>,
+ <3 0 0x19000000 0x1000000>,
+ <4 0 0x18000000 0x1000000>,
+ <5 0 0x17000000 0x1000000>,
+ <6 0 0x16000000 0x1000000>;
+
+ clocks = <&cgu JZ4780_CLK_NEMC>;
+
+ ethernet@6 {
+ compatible = "davicom,dm9000";
+ davicom,no-eeprom;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_nemc_cs6>;
+
+ reg = <6 0 1>, /* addr */
+ <6 2 1>; /* data */
+
+ ingenic,nemc-tAS = <15>;
+ ingenic,nemc-tAH = <10>;
+ ingenic,nemc-tBP = <20>;
+ ingenic,nemc-tAW = <50>;
+ ingenic,nemc-tSTRV = <100>;
+
+ reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
+ vcc-supply = <ð0_power>;
+
+ interrupt-parent = <&gpe>;
+ interrupts = <19 4>;
+ };
+ };
--
2.26.2
Convert the ingenic,pinctrl.txt doc file to ingenic,pinctrl.yaml.
In the process, some compatible strings now require a fallback, as the
corresponding SoCs are pin-compatible with their fallback variant.
Signed-off-by: Paul Cercueil <[email protected]>
---
.../bindings/pinctrl/ingenic,pinctrl.txt | 81 ----------
.../bindings/pinctrl/ingenic,pinctrl.yaml | 138 ++++++++++++++++++
2 files changed, 138 insertions(+), 81 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
create mode 100644 Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
deleted file mode 100644
index d9b2100c98e8..000000000000
--- a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
+++ /dev/null
@@ -1,81 +0,0 @@
-Ingenic XBurst pin controller
-
-Please refer to pinctrl-bindings.txt in this directory for details of the
-common pinctrl bindings used by client devices, including the meaning of the
-phrase "pin configuration node".
-
-For the XBurst SoCs, pin control is tightly bound with GPIO ports. All pins may
-be used as GPIOs, multiplexed device functions are configured within the
-GPIO port configuration registers and it is typical to refer to pins using the
-naming scheme "PxN" where x is a character identifying the GPIO port with
-which the pin is associated and N is an integer from 0 to 31 identifying the
-pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and
-PB31 is the last pin in GPIO port B. The jz4740, the x1000 and the x1830
-contains 4 GPIO ports, PA to PD, for a total of 128 pins. The jz4760, the
-jz4770 and the jz4780 contains 6 GPIO ports, PA to PF, for a total of 192 pins.
-
-
-Required properties:
---------------------
-
- - compatible: One of:
- - "ingenic,jz4740-pinctrl"
- - "ingenic,jz4725b-pinctrl"
- - "ingenic,jz4760-pinctrl"
- - "ingenic,jz4760b-pinctrl"
- - "ingenic,jz4770-pinctrl"
- - "ingenic,jz4780-pinctrl"
- - "ingenic,x1000-pinctrl"
- - "ingenic,x1000e-pinctrl"
- - "ingenic,x1500-pinctrl"
- - "ingenic,x1830-pinctrl"
- - reg: Address range of the pinctrl registers.
-
-
-Required properties for sub-nodes (GPIO chips):
------------------------------------------------
-
- - compatible: Must contain one of:
- - "ingenic,jz4740-gpio"
- - "ingenic,jz4760-gpio"
- - "ingenic,jz4770-gpio"
- - "ingenic,jz4780-gpio"
- - "ingenic,x1000-gpio"
- - "ingenic,x1830-gpio"
- - reg: The GPIO bank number.
- - interrupt-controller: Marks the device node as an interrupt controller.
- - interrupts: Interrupt specifier for the controllers interrupt.
- - #interrupt-cells: Should be 2. Refer to
- ../interrupt-controller/interrupts.txt for more details.
- - gpio-controller: Marks the device node as a GPIO controller.
- - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
- cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
- GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
- - gpio-ranges: Range of pins managed by the GPIO controller. Refer to
- ../gpio/gpio.txt for more details.
-
-
-Example:
---------
-
-pinctrl: pin-controller@10010000 {
- compatible = "ingenic,jz4740-pinctrl";
- reg = <0x10010000 0x400>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- gpa: gpio@0 {
- compatible = "ingenic,jz4740-gpio";
- reg = <0>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 0 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupt-parent = <&intc>;
- interrupts = <28>;
- };
-};
diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
new file mode 100644
index 000000000000..adf462cc2737
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
@@ -0,0 +1,138 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/ingenic,pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic SoCs pin controller devicetree bindings
+
+description: >
+ Please refer to pinctrl-bindings.txt in this directory for details of the
+ common pinctrl bindings used by client devices, including the meaning of the
+ phrase "pin configuration node".
+
+ For the Ingenic SoCs, pin control is tightly bound with GPIO ports. All pins
+ may be used as GPIOs, multiplexed device functions are configured within the
+ GPIO port configuration registers and it is typical to refer to pins using the
+ naming scheme "PxN" where x is a character identifying the GPIO port with
+ which the pin is associated and N is an integer from 0 to 31 identifying the
+ pin within that GPIO port. For example PA0 is the first pin in GPIO port A,
+ and PB31 is the last pin in GPIO port B. The JZ4740, the X1000 and the X1830
+ contains 4 GPIO ports, PA to PD, for a total of 128 pins. The JZ4760, the
+ JZ4770 and the JZ4780 contains 6 GPIO ports, PA to PF, for a total of 192
+ pins.
+
+maintainers:
+ - Paul Cercueil <[email protected]>
+
+properties:
+ nodename:
+ pattern: "^pin-controller@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - enum:
+ - ingenic,jz4740-pinctrl
+ - ingenic,jz4725b-pinctrl
+ - ingenic,jz4760-pinctrl
+ - ingenic,jz4770-pinctrl
+ - ingenic,jz4780-pinctrl
+ - ingenic,x1000-pinctrl
+ - ingenic,x1500-pinctrl
+ - ingenic,x1830-pinctrl
+ - items:
+ - const: ingenic,jz4760b-pinctrl
+ - const: ingenic,jz4760-pinctrl
+ - items:
+ - const: ingenic,x1000e-pinctrl
+ - const: ingenic,x1000-pinctrl
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+patternProperties:
+ "^gpio@[0-9]$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - ingenic,jz4740-gpio
+ - ingenic,jz4725b-gpio
+ - ingenic,jz4760-gpio
+ - ingenic,jz4770-gpio
+ - ingenic,jz4780-gpio
+ - ingenic,x1000-gpio
+ - ingenic,x1500-gpio
+ - ingenic,x1830-gpio
+
+ reg:
+ items:
+ - description: The GPIO bank number
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+
+ gpio-ranges:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+ const: 2
+ description:
+ Refer to ../interrupt-controller/interrupts.txt for more details.
+
+ interrupts:
+ maxItems: 1
+
+ required:
+ - compatible
+ - reg
+ - gpio-controller
+ - "#gpio-cells"
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ pin-controller@10010000 {
+ compatible = "ingenic,jz4770-pinctrl";
+ reg = <0x10010000 0x600>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio@0 {
+ compatible = "ingenic,jz4770-gpio";
+ reg = <0>;
+
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <17>;
+ };
+ };
--
2.26.2
Convert the i2c-jz4780.txt file to ingenic,i2c.yaml.
Two things were changed in the process:
- the clock-frequency property can now only be set to the two values
that can be set by the hardware;
- the dmas and dma-names properties are now required.
Signed-off-by: Paul Cercueil <[email protected]>
---
.../devicetree/bindings/i2c/i2c-jz4780.txt | 33 --------
.../devicetree/bindings/i2c/ingenic,i2c.yaml | 83 +++++++++++++++++++
2 files changed, 83 insertions(+), 33 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-jz4780.txt
create mode 100644 Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml
diff --git a/Documentation/devicetree/bindings/i2c/i2c-jz4780.txt b/Documentation/devicetree/bindings/i2c/i2c-jz4780.txt
deleted file mode 100644
index d229eff5ca1b..000000000000
--- a/Documentation/devicetree/bindings/i2c/i2c-jz4780.txt
+++ /dev/null
@@ -1,33 +0,0 @@
-* Ingenic JZ4780 I2C Bus controller
-
-Required properties:
-- compatible: should be one of the following:
- - "ingenic,jz4780-i2c" for the JZ4780
- - "ingenic,x1000-i2c" for the X1000
-- reg: Should contain the address & size of the I2C controller registers.
-- interrupts: Should specify the interrupt provided by parent.
-- clocks: Should contain a single clock specifier for the JZ4780 I2C clock.
-- clock-frequency: desired I2C bus clock frequency in Hz.
-
-Recommended properties:
-- pinctrl-names: should be "default";
-- pinctrl-0: phandle to pinctrl function
-
-Example
-
-/ {
- i2c4: i2c4@10054000 {
- compatible = "ingenic,jz4780-i2c";
- reg = <0x10054000 0x1000>;
-
- interrupt-parent = <&intc>;
- interrupts = <56>;
-
- clocks = <&cgu JZ4780_CLK_SMB4>;
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pins_i2c4_data>;
-
- };
-};
-
diff --git a/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml b/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml
new file mode 100644
index 000000000000..4759b9a3eb18
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/ingenic,i2c.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic SoCs I2C controller devicetree bindings
+
+maintainers:
+ - Paul Cercueil <[email protected]>
+
+properties:
+ $nodename:
+ pattern: "^i2c@[0-9a-f]+$"
+
+ compatible:
+ enum:
+ - ingenic,jz4780-i2c
+ - ingenic,x1000-i2c
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-frequency:
+ enum: [ 100000, 400000 ]
+
+ dmas:
+ items:
+ - description: DMA controller phandle and request line for RX
+ - description: DMA controller phandle and request line for TX
+
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-frequency
+ - dmas
+ - dma-names
+
+examples:
+ - |
+ #include <dt-bindings/clock/jz4780-cgu.h>
+ #include <dt-bindings/dma/jz4780-dma.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ i2c@10054000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10054000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <56>;
+
+ clocks = <&cgu JZ4780_CLK_SMB4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c4_data>;
+
+ dmas = <&dma JZ4780_DMA_SMB4_RX 0xffffffff>,
+ <&dma JZ4780_DMA_SMB4_TX 0xffffffff>;
+ dma-names = "rx", "tx";
+
+ clock-frequency = <400000>;
+
+ rtc@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+
+ interrupt-parent = <&gpf>;
+ interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
+ };
+ };
--
2.26.2
Convert the ingenic,jz4780-nand.txt doc file to ingenic,nand.yaml.
Signed-off-by: Paul Cercueil <[email protected]>
---
.../bindings/mtd/ingenic,jz4780-nand.txt | 92 ------------
.../devicetree/bindings/mtd/ingenic,nand.yaml | 133 ++++++++++++++++++
2 files changed, 133 insertions(+), 92 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
create mode 100644 Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
diff --git a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
deleted file mode 100644
index c02259353327..000000000000
--- a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
+++ /dev/null
@@ -1,92 +0,0 @@
-* Ingenic JZ4780 NAND/ECC
-
-This file documents the device tree bindings for NAND flash devices on the
-JZ4780. NAND devices are connected to the NEMC controller (described in
-memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must
-be children of the NEMC node.
-
-Required NAND controller device properties:
-- compatible: Should be one of:
- * ingenic,jz4740-nand
- * ingenic,jz4725b-nand
- * ingenic,jz4780-nand
-- reg: For each bank with a NAND chip attached, should specify a bank number,
- an offset of 0 and a size of 0x1000000 (i.e. the whole NEMC bank).
-
-Optional NAND controller device properties:
-- ecc-engine: To make use of the hardware ECC controller, this
- property must contain a phandle for the ECC controller node. The required
- properties for this node are described below. If this is not specified,
- software ECC will be used instead.
-
-Optional children nodes:
-- Individual NAND chips are children of the NAND controller node.
-
-Required children node properties:
-- reg: An integer ranging from 1 to 6 representing the CS line to use.
-
-Optional children node properties:
-- nand-ecc-step-size: ECC block size in bytes.
-- nand-ecc-strength: ECC strength (max number of correctable bits).
-- nand-ecc-mode: String, operation mode of the NAND ecc mode. "hw" by default
-- nand-on-flash-bbt: boolean to enable on flash bbt option, if not present false
-- rb-gpios: GPIO specifier for the busy pin.
-- wp-gpios: GPIO specifier for the write protect pin.
-
-Optional child node of NAND chip nodes:
-- partitions: see Documentation/devicetree/bindings/mtd/partition.txt
-
-Example:
-
-nemc: nemc@13410000 {
- ...
-
- nandc: nand-controller@1 {
- compatible = "ingenic,jz4780-nand";
- reg = <1 0 0x1000000>; /* Bank 1 */
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- ecc-engine = <&bch>;
-
- nand@1 {
- reg = <1>;
-
- nand-ecc-step-size = <1024>;
- nand-ecc-strength = <24>;
- nand-ecc-mode = "hw";
- nand-on-flash-bbt;
-
- rb-gpios = <&gpa 20 GPIO_ACTIVE_LOW>;
- wp-gpios = <&gpf 22 GPIO_ACTIVE_LOW>;
-
- partitions {
- #address-cells = <2>;
- #size-cells = <2>;
- ...
- }
- };
- };
-};
-
-The ECC controller is a separate SoC component used for error correction on
-NAND devices. The following is a description of the device properties for a
-ECC controller.
-
-Required ECC properties:
-- compatible: Should be one of:
- * ingenic,jz4740-ecc
- * ingenic,jz4725b-bch
- * ingenic,jz4780-bch
-- reg: Should specify the ECC controller registers location and length.
-- clocks: Clock for the ECC controller.
-
-Example:
-
-bch: bch@134d0000 {
- compatible = "ingenic,jz4780-bch";
- reg = <0x134d0000 0x10000>;
-
- clocks = <&cgu JZ4780_CLK_BCH>;
-};
diff --git a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
new file mode 100644
index 000000000000..0e4cb1b55385
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
@@ -0,0 +1,133 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/ingenic,nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic SoCs NAND controller devicetree bindings
+
+maintainers:
+ - Paul Cercueil <[email protected]>
+
+allOf:
+ - $ref: ../memory-controllers/ingenic,nemc-client.yaml#
+ - $ref: nand-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - ingenic,jz4740-nand
+ - ingenic,jz4725b-nand
+ - ingenic,jz4780-nand
+
+ reg:
+ items:
+ - description: Bank number, offset and size of first attached NAND chip
+ - description: Bank number, offset and size of second attached NAND chip
+ - description: Bank number, offset and size of third attached NAND chip
+ - description: Bank number, offset and size of fourth attached NAND chip
+ minItems: 1
+
+ ecc-engine: true
+
+patternProperties:
+ "^nand@[a-f0-9]$":
+ type: object
+ properties:
+ rb-gpios:
+ description: GPIO specifier for the busy pin.
+ maxItems: 1
+
+ wp-gpios:
+ description: GPIO specifier for the write-protect pin.
+ maxItems: 1
+
+ "^partitions$":
+ type: object
+ description:
+ Node containing description of fixed partitions.
+ See Documentation/devicetree/bindings/mtd/partition.txt
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ #include <dt-bindings/clock/jz4780-cgu.h>
+ nemc: memory-controller@13410000 {
+ compatible = "ingenic,jz4780-nemc";
+ reg = <0x13410000 0x10000>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <1 0 0x1b000000 0x1000000>,
+ <2 0 0x1a000000 0x1000000>,
+ <3 0 0x19000000 0x1000000>,
+ <4 0 0x18000000 0x1000000>,
+ <5 0 0x17000000 0x1000000>,
+ <6 0 0x16000000 0x1000000>;
+
+ clocks = <&cgu JZ4780_CLK_NEMC>;
+
+ nand-controller@1 {
+ compatible = "ingenic,jz4780-nand";
+ reg = <1 0 0x1000000>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ecc-engine = <&bch>;
+
+ ingenic,nemc-tAS = <10>;
+ ingenic,nemc-tAH = <5>;
+ ingenic,nemc-tBP = <10>;
+ ingenic,nemc-tAW = <15>;
+ ingenic,nemc-tSTRV = <100>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_nemc>;
+
+ nand@1 {
+ reg = <1>;
+
+ nand-ecc-step-size = <1024>;
+ nand-ecc-strength = <24>;
+ nand-ecc-mode = "hw";
+ nand-on-flash-bbt;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_nemc_cs1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ partition@0 {
+ label = "u-boot-spl";
+ reg = <0x0 0x0 0x0 0x800000>;
+ };
+
+ partition@800000 {
+ label = "u-boot";
+ reg = <0x0 0x800000 0x0 0x200000>;
+ };
+
+ partition@a00000 {
+ label = "u-boot-env";
+ reg = <0x0 0xa00000 0x0 0x200000>;
+ };
+
+ partition@c00000 {
+ label = "boot";
+ reg = <0x0 0xc00000 0x0 0x4000000>;
+ };
+
+ partition@4c00000 {
+ label = "system";
+ reg = <0x0 0x4c00000 0x1 0xfb400000>;
+ };
+ };
+ };
+ };
+ };
--
2.26.2
Convert the ingenic,uart.txt to a new ingenic,uart.yaml file.
A few things were changed in the process:
- the dmas and dma-names properties are now required.
- the ingenic,jz4770-uart and ingenic,jz4775-uart compatible strings now
require the ingenic,jz4760-uart string to be used as fallback, since
the hardware is compatible.
- the ingenic,jz4725b-uart compatible string was added, with a fallback
to ingenic,jz4740-uart.
Signed-off-by: Paul Cercueil <[email protected]>
---
.../bindings/serial/ingenic,uart.txt | 28 ------
.../bindings/serial/ingenic,uart.yaml | 94 +++++++++++++++++++
2 files changed, 94 insertions(+), 28 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/serial/ingenic,uart.txt
create mode 100644 Documentation/devicetree/bindings/serial/ingenic,uart.yaml
diff --git a/Documentation/devicetree/bindings/serial/ingenic,uart.txt b/Documentation/devicetree/bindings/serial/ingenic,uart.txt
deleted file mode 100644
index 24ed8769f4af..000000000000
--- a/Documentation/devicetree/bindings/serial/ingenic,uart.txt
+++ /dev/null
@@ -1,28 +0,0 @@
-* Ingenic SoC UART
-
-Required properties:
-- compatible : One of:
- - "ingenic,jz4740-uart",
- - "ingenic,jz4760-uart",
- - "ingenic,jz4770-uart",
- - "ingenic,jz4775-uart",
- - "ingenic,jz4780-uart",
- - "ingenic,x1000-uart".
-- reg : offset and length of the register set for the device.
-- interrupts : should contain uart interrupt.
-- clocks : phandles to the module & baud clocks.
-- clock-names: tuple listing input clock names.
- Required elements: "baud", "module"
-
-Example:
-
-uart0: serial@10030000 {
- compatible = "ingenic,jz4740-uart";
- reg = <0x10030000 0x100>;
-
- interrupt-parent = <&intc>;
- interrupts = <9>;
-
- clocks = <&ext>, <&cgu JZ4740_CLK_UART0>;
- clock-names = "baud", "module";
-};
diff --git a/Documentation/devicetree/bindings/serial/ingenic,uart.yaml b/Documentation/devicetree/bindings/serial/ingenic,uart.yaml
new file mode 100644
index 000000000000..c023d650e9c1
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/ingenic,uart.yaml
@@ -0,0 +1,94 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/ingenic,uart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic SoCs UART controller devicetree bindings
+
+maintainers:
+ - Paul Cercueil <[email protected]>
+
+properties:
+ $nodename:
+ pattern: "^serial@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - enum:
+ - ingenic,jz4740-uart
+ - ingenic,jz4760-uart
+ - ingenic,jz4780-uart
+ - ingenic,x1000-uart
+ - items:
+ - enum:
+ - ingenic,jz4770-uart
+ - ingenic,jz4775-uart
+ - const: ingenic,jz4760-uart
+ - items:
+ - const: ingenic,jz4725b-uart
+ - const: ingenic,jz4740-uart
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Baud clock
+ - description: UART module clock
+
+ clock-names:
+ items:
+ - const: baud
+ - const: module
+
+ dmas:
+ items:
+ - description: DMA controller phandle and request line for RX
+ - description: DMA controller phandle and request line for TX
+
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - dmas
+ - dma-names
+
+examples:
+ - |
+ #include <dt-bindings/clock/jz4780-cgu.h>
+ #include <dt-bindings/dma/jz4780-dma.h>
+ #include <dt-bindings/gpio/gpio.h>
+ serial@10032000 {
+ compatible = "ingenic,jz4780-uart";
+ reg = <0x10032000 0x100>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <49>;
+
+ clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
+ clock-names = "baud", "module";
+
+ dmas = <&dma JZ4780_DMA_UART2_RX 0xffffffff>,
+ <&dma JZ4780_DMA_UART2_TX 0xffffffff>;
+ dma-names = "rx", "tx";
+
+ bluetooth {
+ compatible = "brcm,bcm4330-bt";
+ reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>;
+ vcc-supply = <&wlan0_power>;
+ device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>;
+ };
+ };
--
2.26.2
Convert the ingenic,lcd.txt to a new ingenic,lcd.yaml file.
In the process, the new ingenic,jz4780-lcd compatible string has been
added.
Signed-off-by: Paul Cercueil <[email protected]>
---
.../bindings/display/ingenic,lcd.txt | 45 -------
.../bindings/display/ingenic,lcd.yaml | 113 ++++++++++++++++++
2 files changed, 113 insertions(+), 45 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/ingenic,lcd.txt
create mode 100644 Documentation/devicetree/bindings/display/ingenic,lcd.yaml
diff --git a/Documentation/devicetree/bindings/display/ingenic,lcd.txt b/Documentation/devicetree/bindings/display/ingenic,lcd.txt
deleted file mode 100644
index 01e3261defb6..000000000000
--- a/Documentation/devicetree/bindings/display/ingenic,lcd.txt
+++ /dev/null
@@ -1,45 +0,0 @@
-Ingenic JZ47xx LCD driver
-
-Required properties:
-- compatible: one of:
- * ingenic,jz4740-lcd
- * ingenic,jz4725b-lcd
- * ingenic,jz4770-lcd
-- reg: LCD registers location and length
-- clocks: LCD pixclock and device clock specifiers.
- The device clock is only required on the JZ4740.
-- clock-names: "lcd_pclk" and "lcd"
-- interrupts: Specifies the interrupt line the LCD controller is connected to.
-
-Example:
-
-panel {
- compatible = "sharp,ls020b1dd01d";
-
- backlight = <&backlight>;
- power-supply = <&vcc>;
-
- port {
- panel_input: endpoint {
- remote-endpoint = <&panel_output>;
- };
- };
-};
-
-
-lcd: lcd-controller@13050000 {
- compatible = "ingenic,jz4725b-lcd";
- reg = <0x13050000 0x1000>;
-
- interrupt-parent = <&intc>;
- interrupts = <31>;
-
- clocks = <&cgu JZ4725B_CLK_LCD>;
- clock-names = "lcd";
-
- port {
- panel_output: endpoint {
- remote-endpoint = <&panel_input>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/display/ingenic,lcd.yaml b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml
new file mode 100644
index 000000000000..8e9c851dc7c5
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml
@@ -0,0 +1,113 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/ingenic,lcd.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic SoCs LCD controller devicetree bindings
+
+maintainers:
+ - Paul Cercueil <[email protected]>
+
+properties:
+ $nodename:
+ pattern: "^lcd-controller@[0-9a-f]+$"
+
+ compatible:
+ enum:
+ - ingenic,jz4740-lcd
+ - ingenic,jz4725b-lcd
+ - ingenic,jz4770-lcd
+ - ingenic,jz4780-lcd
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Module clock
+ - description: Pixel clock
+ minItems: 1
+
+ clock-names:
+ items:
+ - const: lcd
+ - const: lcd_pclk
+ minItems: 1
+
+ port:
+ type: object
+ description:
+ A port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ingenic,jz4740-lcd
+ - ingenic,jz4780-lcd
+then:
+ properties:
+ clocks:
+ minItems: 2
+ clock-names:
+ minItems: 2
+else:
+ properties:
+ clocks:
+ maxItems: 1
+ clock-names:
+ maxItems: 1
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/jz4740-cgu.h>
+ lcd-controller@13050000 {
+ compatible = "ingenic,jz4740-lcd";
+ reg = <0x13050000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <30>;
+
+ clocks = <&cgu JZ4740_CLK_LCD>, <&cgu JZ4740_CLK_LCD_PCLK>;
+ clock-names = "lcd", "lcd_pclk";
+
+ port {
+ endpoint {
+ remote-endpoint = <&panel_input>;
+ };
+ };
+ };
+
+ - |
+ #include <dt-bindings/clock/jz4725b-cgu.h>
+ lcd-controller@13050000 {
+ compatible = "ingenic,jz4725b-lcd";
+ reg = <0x13050000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <31>;
+
+ clocks = <&cgu JZ4725B_CLK_LCD>;
+ clock-names = "lcd";
+
+ port {
+ endpoint {
+ remote-endpoint = <&panel_input>;
+ };
+ };
+ };
--
2.26.2
Hello!
On 26.04.2020 21:58, Paul Cercueil wrote:
> Convert the ingenic,intc.txt doc file to ingenic,intc.yaml.
>
> Some compatible strings now require a fallback, as the controller
> generally works the same across the SoCs families.
>
> Signed-off-by: Paul Cercueil <[email protected]>
[...]
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml
> new file mode 100644
> index 000000000000..28b27e1a6e9d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml
> @@ -0,0 +1,63 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/ingenic,intc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Ingenic SoCs interrupt controller devicetree bindings
> +
> +maintainers:
> + - Paul Cercueil <[email protected]>
> +
> +properties:
> + $nodename:
> + pattern: "^interrupt-controller@[0-9a-f]+$"
> +
> + compatible:
> + oneOf:
> + - enum:
> + - ingenic,jz4740-intc
> + - ingenic,jz4760-intc
> + - ingenic,jz4780-intc
> + - items:
> + - enum:
> + - ingenic,jz4775-intc
> + - ingenic,jz4770-intc
> + - const: ingenic,jz4760-intc
> + - items:
> + - const: ingenic,x1000-intc
> + - const: ingenic,jz4780-intc
> + - items:
> + - const: ingenic,jz4725b-intc
> + - const: ingenic,jz4740-intc
> +
> + "#interrupt-cells":
> + const: 1
Do double quotes work the same as the single ones?
[...]
MBR, Sergei
Hi Sergei,
Le lun. 27 avril 2020 ? 12:11, Sergei Shtylyov
<[email protected]> a ?crit :
> Hello!
>
> On 26.04.2020 21:58, Paul Cercueil wrote:
>
>> Convert the ingenic,intc.txt doc file to ingenic,intc.yaml.
>>
>> Some compatible strings now require a fallback, as the controller
>> generally works the same across the SoCs families.
>>
>> Signed-off-by: Paul Cercueil <[email protected]>
> [...]
>> diff --git
>> a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml
>> b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml
>> new file mode 100644
>> index 000000000000..28b27e1a6e9d
>> --- /dev/null
>> +++
>> b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml
>> @@ -0,0 +1,63 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id:
>> http://devicetree.org/schemas/interrupt-controller/ingenic,intc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Ingenic SoCs interrupt controller devicetree bindings
>> +
>> +maintainers:
>> + - Paul Cercueil <[email protected]>
>> +
>> +properties:
>> + $nodename:
>> + pattern: "^interrupt-controller@[0-9a-f]+$"
>> +
>> + compatible:
>> + oneOf:
>> + - enum:
>> + - ingenic,jz4740-intc
>> + - ingenic,jz4760-intc
>> + - ingenic,jz4780-intc
>> + - items:
>> + - enum:
>> + - ingenic,jz4775-intc
>> + - ingenic,jz4770-intc
>> + - const: ingenic,jz4760-intc
>> + - items:
>> + - const: ingenic,x1000-intc
>> + - const: ingenic,jz4780-intc
>> + - items:
>> + - const: ingenic,jz4725b-intc
>> + - const: ingenic,jz4740-intc
>> +
>> + "#interrupt-cells":
>> + const: 1
>
> Do double quotes work the same as the single ones?
Yes. The only difference is that you can escape characters in double
quotes.
-Paul
>
> [...]
>
> MBR, Sergei
This one patch will need a V2, I messed up with the clocks.
-Paul
Le dim. 26 avril 2020 ? 20:58, Paul Cercueil <[email protected]> a
?crit :
> Convert the ingenic,lcd.txt to a new ingenic,lcd.yaml file.
>
> In the process, the new ingenic,jz4780-lcd compatible string has been
> added.
>
> Signed-off-by: Paul Cercueil <[email protected]>
> ---
> .../bindings/display/ingenic,lcd.txt | 45 -------
> .../bindings/display/ingenic,lcd.yaml | 113
> ++++++++++++++++++
> 2 files changed, 113 insertions(+), 45 deletions(-)
> delete mode 100644
> Documentation/devicetree/bindings/display/ingenic,lcd.txt
> create mode 100644
> Documentation/devicetree/bindings/display/ingenic,lcd.yaml
>
> diff --git
> a/Documentation/devicetree/bindings/display/ingenic,lcd.txt
> b/Documentation/devicetree/bindings/display/ingenic,lcd.txt
> deleted file mode 100644
> index 01e3261defb6..000000000000
> --- a/Documentation/devicetree/bindings/display/ingenic,lcd.txt
> +++ /dev/null
> @@ -1,45 +0,0 @@
> -Ingenic JZ47xx LCD driver
> -
> -Required properties:
> -- compatible: one of:
> - * ingenic,jz4740-lcd
> - * ingenic,jz4725b-lcd
> - * ingenic,jz4770-lcd
> -- reg: LCD registers location and length
> -- clocks: LCD pixclock and device clock specifiers.
> - The device clock is only required on the JZ4740.
> -- clock-names: "lcd_pclk" and "lcd"
> -- interrupts: Specifies the interrupt line the LCD controller is
> connected to.
> -
> -Example:
> -
> -panel {
> - compatible = "sharp,ls020b1dd01d";
> -
> - backlight = <&backlight>;
> - power-supply = <&vcc>;
> -
> - port {
> - panel_input: endpoint {
> - remote-endpoint = <&panel_output>;
> - };
> - };
> -};
> -
> -
> -lcd: lcd-controller@13050000 {
> - compatible = "ingenic,jz4725b-lcd";
> - reg = <0x13050000 0x1000>;
> -
> - interrupt-parent = <&intc>;
> - interrupts = <31>;
> -
> - clocks = <&cgu JZ4725B_CLK_LCD>;
> - clock-names = "lcd";
> -
> - port {
> - panel_output: endpoint {
> - remote-endpoint = <&panel_input>;
> - };
> - };
> -};
> diff --git
> a/Documentation/devicetree/bindings/display/ingenic,lcd.yaml
> b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml
> new file mode 100644
> index 000000000000..8e9c851dc7c5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml
> @@ -0,0 +1,113 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/ingenic,lcd.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Ingenic SoCs LCD controller devicetree bindings
> +
> +maintainers:
> + - Paul Cercueil <[email protected]>
> +
> +properties:
> + $nodename:
> + pattern: "^lcd-controller@[0-9a-f]+$"
> +
> + compatible:
> + enum:
> + - ingenic,jz4740-lcd
> + - ingenic,jz4725b-lcd
> + - ingenic,jz4770-lcd
> + - ingenic,jz4780-lcd
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: Module clock
> + - description: Pixel clock
> + minItems: 1
> +
> + clock-names:
> + items:
> + - const: lcd
> + - const: lcd_pclk
> + minItems: 1
> +
> + port:
> + type: object
> + description:
> + A port node with endpoint definitions as defined in
> + Documentation/devicetree/bindings/media/video-interfaces.txt
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> +
> +if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - ingenic,jz4740-lcd
> + - ingenic,jz4780-lcd
> +then:
> + properties:
> + clocks:
> + minItems: 2
> + clock-names:
> + minItems: 2
> +else:
> + properties:
> + clocks:
> + maxItems: 1
> + clock-names:
> + maxItems: 1
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/jz4740-cgu.h>
> + lcd-controller@13050000 {
> + compatible = "ingenic,jz4740-lcd";
> + reg = <0x13050000 0x1000>;
> +
> + interrupt-parent = <&intc>;
> + interrupts = <30>;
> +
> + clocks = <&cgu JZ4740_CLK_LCD>, <&cgu JZ4740_CLK_LCD_PCLK>;
> + clock-names = "lcd", "lcd_pclk";
> +
> + port {
> + endpoint {
> + remote-endpoint = <&panel_input>;
> + };
> + };
> + };
> +
> + - |
> + #include <dt-bindings/clock/jz4725b-cgu.h>
> + lcd-controller@13050000 {
> + compatible = "ingenic,jz4725b-lcd";
> + reg = <0x13050000 0x1000>;
> +
> + interrupt-parent = <&intc>;
> + interrupts = <31>;
> +
> + clocks = <&cgu JZ4725B_CLK_LCD>;
> + clock-names = "lcd";
> +
> + port {
> + endpoint {
> + remote-endpoint = <&panel_input>;
> + };
> + };
> + };
> --
> 2.26.2
>
On Sun, 26 Apr 2020 20:58:49 +0200, Paul Cercueil wrote:
> Convert the ingenic,cgu.txt doc file to ingenic,cgu.yaml.
>
> The binding documentation has been updated as well. The node can have a
> child node that corresponds to the USB PHY, which happens to be present
> in the middle of the CGU registers.
>
> Signed-off-by: Paul Cercueil <[email protected]>
> ---
> .../devicetree/bindings/clock/ingenic,cgu.txt | 57 --------
> .../bindings/clock/ingenic,cgu.yaml | 122 ++++++++++++++++++
> 2 files changed, 122 insertions(+), 57 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/clock/ingenic,cgu.txt
> create mode 100644 Documentation/devicetree/bindings/clock/ingenic,cgu.yaml
>
Applied, thanks!
On Sun, 26 Apr 2020 20:58:50 +0200, Paul Cercueil wrote:
> Convert the ingenic,intc.txt doc file to ingenic,intc.yaml.
>
> Some compatible strings now require a fallback, as the controller
> generally works the same across the SoCs families.
>
> Signed-off-by: Paul Cercueil <[email protected]>
> ---
> .../interrupt-controller/ingenic,intc.txt | 28 ---------
> .../interrupt-controller/ingenic,intc.yaml | 63 +++++++++++++++++++
> 2 files changed, 63 insertions(+), 28 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml
>
Applied, thanks!
On Sun, Apr 26, 2020 at 08:58:51PM +0200, Paul Cercueil wrote:
> Convert the ingenic,pinctrl.txt doc file to ingenic,pinctrl.yaml.
>
> In the process, some compatible strings now require a fallback, as the
> corresponding SoCs are pin-compatible with their fallback variant.
>
> Signed-off-by: Paul Cercueil <[email protected]>
> ---
> .../bindings/pinctrl/ingenic,pinctrl.txt | 81 ----------
> .../bindings/pinctrl/ingenic,pinctrl.yaml | 138 ++++++++++++++++++
> 2 files changed, 138 insertions(+), 81 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
> create mode 100644 Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
> diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
> new file mode 100644
> index 000000000000..adf462cc2737
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml
> @@ -0,0 +1,138 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/ingenic,pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Ingenic SoCs pin controller devicetree bindings
> +
> +description: >
> + Please refer to pinctrl-bindings.txt in this directory for details of the
> + common pinctrl bindings used by client devices, including the meaning of the
> + phrase "pin configuration node".
> +
> + For the Ingenic SoCs, pin control is tightly bound with GPIO ports. All pins
> + may be used as GPIOs, multiplexed device functions are configured within the
> + GPIO port configuration registers and it is typical to refer to pins using the
> + naming scheme "PxN" where x is a character identifying the GPIO port with
> + which the pin is associated and N is an integer from 0 to 31 identifying the
> + pin within that GPIO port. For example PA0 is the first pin in GPIO port A,
> + and PB31 is the last pin in GPIO port B. The JZ4740, the X1000 and the X1830
> + contains 4 GPIO ports, PA to PD, for a total of 128 pins. The JZ4760, the
> + JZ4770 and the JZ4780 contains 6 GPIO ports, PA to PF, for a total of 192
> + pins.
> +
> +maintainers:
> + - Paul Cercueil <[email protected]>
> +
> +properties:
> + nodename:
> + pattern: "^pin-controller@[0-9a-f]+$"
That would have been more consistent, but 'pinctrl@...' is the standard.
> +
> + compatible:
> + oneOf:
> + - enum:
> + - ingenic,jz4740-pinctrl
> + - ingenic,jz4725b-pinctrl
> + - ingenic,jz4760-pinctrl
> + - ingenic,jz4770-pinctrl
> + - ingenic,jz4780-pinctrl
> + - ingenic,x1000-pinctrl
> + - ingenic,x1500-pinctrl
> + - ingenic,x1830-pinctrl
> + - items:
> + - const: ingenic,jz4760b-pinctrl
> + - const: ingenic,jz4760-pinctrl
> + - items:
> + - const: ingenic,x1000e-pinctrl
> + - const: ingenic,x1000-pinctrl
> +
> + reg:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> +patternProperties:
> + "^gpio@[0-9]$":
> + type: object
> + properties:
> + compatible:
> + enum:
> + - ingenic,jz4740-gpio
> + - ingenic,jz4725b-gpio
> + - ingenic,jz4760-gpio
> + - ingenic,jz4770-gpio
> + - ingenic,jz4780-gpio
> + - ingenic,x1000-gpio
> + - ingenic,x1500-gpio
> + - ingenic,x1830-gpio
> +
> + reg:
> + items:
> + - description: The GPIO bank number
> +
> + gpio-controller: true
> +
> + "#gpio-cells":
> + const: 2
> +
> + gpio-ranges:
> + maxItems: 1
> +
> + interrupt-controller: true
> +
> + "#interrupt-cells":
> + const: 2
> + description:
> + Refer to ../interrupt-controller/interrupts.txt for more details.
> +
> + interrupts:
> + maxItems: 1
> +
> + required:
> + - compatible
> + - reg
> + - gpio-controller
> + - "#gpio-cells"
> + - interrupts
> + - interrupt-controller
> + - "#interrupt-cells"
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - "#address-cells"
> + - "#size-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + pin-controller@10010000 {
> + compatible = "ingenic,jz4770-pinctrl";
> + reg = <0x10010000 0x600>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio@0 {
> + compatible = "ingenic,jz4770-gpio";
> + reg = <0>;
> +
> + gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> +
> + interrupt-parent = <&intc>;
> + interrupts = <17>;
> + };
> + };
What about pinctrl child nodes?
> --
> 2.26.2
>
On Sun, Apr 26, 2020 at 08:58:52PM +0200, Paul Cercueil wrote:
> Convert the ingenic,jz4780-nemc.txt doc file to ingenic,nemc.yaml.
>
> The ingenic,jz4725b-nemc compatible string was added in the process,
> with a fallback to ingenic,jz4740-nemc.
>
> Signed-off-by: Paul Cercueil <[email protected]>
> ---
> .../ingenic,jz4780-nemc.txt | 76 ---------------
> .../ingenic,nemc-client.yaml | 45 +++++++++
> .../memory-controllers/ingenic,nemc.yaml | 95 +++++++++++++++++++
> 3 files changed, 140 insertions(+), 76 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt
> create mode 100644 Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-client.yaml
> create mode 100644 Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml
>
> diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt b/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt
> deleted file mode 100644
> index 59b8dcc118ee..000000000000
> --- a/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt
> +++ /dev/null
> @@ -1,76 +0,0 @@
> -* Ingenic JZ4780 NAND/external memory controller (NEMC)
> -
> -This file documents the device tree bindings for the NEMC external memory
> -controller in Ingenic JZ4780
> -
> -Required properties:
> -- compatible: Should be set to one of:
> - "ingenic,jz4740-nemc" (JZ4740)
> - "ingenic,jz4780-nemc" (JZ4780)
> -- reg: Should specify the NEMC controller registers location and length.
> -- clocks: Clock for the NEMC controller.
> -- #address-cells: Must be set to 2.
> -- #size-cells: Must be set to 1.
> -- ranges: A set of ranges for each bank describing the physical memory layout.
> - Each should specify the following 4 integer values:
> -
> - <cs number> 0 <physical address of mapping> <size of mapping>
> -
> -Each child of the NEMC node describes a device connected to the NEMC.
> -
> -Required child node properties:
> -- reg: Should contain at least one register specifier, given in the following
> - format:
> -
> - <cs number> <offset> <size>
> -
> - Multiple registers can be specified across multiple banks. This is needed,
> - for example, for packaged NAND devices with multiple dies. Such devices
> - should be grouped into a single node.
> -
> -Optional child node properties:
> -- ingenic,nemc-bus-width: Specifies the bus width in bits. Defaults to 8 bits.
> -- ingenic,nemc-tAS: Address setup time in nanoseconds.
> -- ingenic,nemc-tAH: Address hold time in nanoseconds.
> -- ingenic,nemc-tBP: Burst pitch time in nanoseconds.
> -- ingenic,nemc-tAW: Access wait time in nanoseconds.
> -- ingenic,nemc-tSTRV: Static memory recovery time in nanoseconds.
> -
> -If a child node references multiple banks in its "reg" property, the same value
> -for all optional parameters will be configured for all banks. If any optional
> -parameters are omitted, they will be left unchanged from whatever they are
> -configured to when the NEMC device is probed (which may be the reset value as
> -given in the hardware reference manual, or a value configured by the boot
> -loader).
> -
> -Example (NEMC node with a NAND child device attached at CS1):
> -
> -nemc: nemc@13410000 {
> - compatible = "ingenic,jz4780-nemc";
> - reg = <0x13410000 0x10000>;
> -
> - #address-cells = <2>;
> - #size-cells = <1>;
> -
> - ranges = <1 0 0x1b000000 0x1000000
> - 2 0 0x1a000000 0x1000000
> - 3 0 0x19000000 0x1000000
> - 4 0 0x18000000 0x1000000
> - 5 0 0x17000000 0x1000000
> - 6 0 0x16000000 0x1000000>;
> -
> - clocks = <&cgu JZ4780_CLK_NEMC>;
> -
> - nand: nand@1 {
> - compatible = "ingenic,jz4780-nand";
> - reg = <1 0 0x1000000>;
> -
> - ingenic,nemc-tAS = <10>;
> - ingenic,nemc-tAH = <5>;
> - ingenic,nemc-tBP = <10>;
> - ingenic,nemc-tAW = <15>;
> - ingenic,nemc-tSTRV = <100>;
> -
> - ...
> - };
> -};
> diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-client.yaml b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-client.yaml
> new file mode 100644
> index 000000000000..682e6f7e74fa
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-client.yaml
> @@ -0,0 +1,45 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc-client.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title:
> + Ingenic SoCs NAND / External Memory Controller (NEMC)
> + client-specific properties
> +
> +maintainers:
> + - Paul Cercueil <[email protected]>
> +
> +description:
> + This document lists the various properties that child nodes of the NEMC node
> + can use.
> +
> +properties:
What about 'reg'? That should be required.
> + ingenic,nemc-bus-width:
> + allOf:
> + - $ref: /schemas/types.yaml#/definitions/uint32
> + - enum: [8, 16]
> + description: Specifies the bus width in bits.
> +
> + ingenic,nemc-tAS:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Address setup time in nanoseconds.
> +
> + ingenic,nemc-tAH:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Address hold time in nanoseconds.
> +
> + ingenic,nemc-tBP:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Burst pitch time in nanoseconds.
> +
> + ingenic,nemc-tAW:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Address wait time in nanoseconds.
> +
> + ingenic,nemc-tSTRV:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Static memory recovery time in nanoseconds.
I think I'd just combine this into 1 file.
> +
> +...
> diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml
> new file mode 100644
> index 000000000000..c7fd28462fd8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml
> @@ -0,0 +1,95 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Ingenic SoCs NAND / External Memory Controller (NEMC) devicetree bindings
> +
> +maintainers:
> + - Paul Cercueil <[email protected]>
> +
> +properties:
> + $nodename:
> + pattern: "^memory-controller@[0-9a-f]+$"
> +
> + compatible:
> + oneOf:
> + - enum:
> + - ingenic,jz4740-nemc
> + - ingenic,jz4780-nemc
> + - items:
> + - const: ingenic,jz4725b-nemc
> + - const: ingenic,jz4740-nemc
> +
> + "#address-cells":
> + const: 2
> +
> + "#size-cells":
> + const: 1
> +
> + ranges: true
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> +patternProperties:
> + "^(nand-controller|ethernet)@[0-9]+$":
Presumably you could have other types of child nodes?
> + type: object
> + allOf:
> + - $ref: ingenic,nemc-client.yaml#
> +
> +required:
> + - compatible
> + - "#address-cells"
> + - "#size-cells"
> + - ranges
> + - reg
> + - clocks
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/jz4780-cgu.h>
> + #include <dt-bindings/gpio/gpio.h>
> + nemc: memory-controller@13410000 {
> + compatible = "ingenic,jz4780-nemc";
> + reg = <0x13410000 0x10000>;
> + #address-cells = <2>;
> + #size-cells = <1>;
> + ranges = <1 0 0x1b000000 0x1000000>,
> + <2 0 0x1a000000 0x1000000>,
> + <3 0 0x19000000 0x1000000>,
> + <4 0 0x18000000 0x1000000>,
> + <5 0 0x17000000 0x1000000>,
> + <6 0 0x16000000 0x1000000>;
> +
> + clocks = <&cgu JZ4780_CLK_NEMC>;
> +
> + ethernet@6 {
> + compatible = "davicom,dm9000";
> + davicom,no-eeprom;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pins_nemc_cs6>;
> +
> + reg = <6 0 1>, /* addr */
> + <6 2 1>; /* data */
> +
> + ingenic,nemc-tAS = <15>;
> + ingenic,nemc-tAH = <10>;
> + ingenic,nemc-tBP = <20>;
> + ingenic,nemc-tAW = <50>;
> + ingenic,nemc-tSTRV = <100>;
> +
> + reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
> + vcc-supply = <ð0_power>;
> +
> + interrupt-parent = <&gpe>;
> + interrupts = <19 4>;
> + };
> + };
> --
> 2.26.2
>
On Sun, Apr 26, 2020 at 08:58:53PM +0200, Paul Cercueil wrote:
> Convert the ingenic,jz4780-nand.txt doc file to ingenic,nand.yaml.
>
> Signed-off-by: Paul Cercueil <[email protected]>
> ---
> .../bindings/mtd/ingenic,jz4780-nand.txt | 92 ------------
> .../devicetree/bindings/mtd/ingenic,nand.yaml | 133 ++++++++++++++++++
> 2 files changed, 133 insertions(+), 92 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
> create mode 100644 Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
>
> diff --git a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
> deleted file mode 100644
> index c02259353327..000000000000
> --- a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
> +++ /dev/null
> @@ -1,92 +0,0 @@
> -* Ingenic JZ4780 NAND/ECC
> -
> -This file documents the device tree bindings for NAND flash devices on the
> -JZ4780. NAND devices are connected to the NEMC controller (described in
> -memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must
> -be children of the NEMC node.
> -
> -Required NAND controller device properties:
> -- compatible: Should be one of:
> - * ingenic,jz4740-nand
> - * ingenic,jz4725b-nand
> - * ingenic,jz4780-nand
> -- reg: For each bank with a NAND chip attached, should specify a bank number,
> - an offset of 0 and a size of 0x1000000 (i.e. the whole NEMC bank).
> -
> -Optional NAND controller device properties:
> -- ecc-engine: To make use of the hardware ECC controller, this
> - property must contain a phandle for the ECC controller node. The required
> - properties for this node are described below. If this is not specified,
> - software ECC will be used instead.
> -
> -Optional children nodes:
> -- Individual NAND chips are children of the NAND controller node.
> -
> -Required children node properties:
> -- reg: An integer ranging from 1 to 6 representing the CS line to use.
> -
> -Optional children node properties:
> -- nand-ecc-step-size: ECC block size in bytes.
> -- nand-ecc-strength: ECC strength (max number of correctable bits).
> -- nand-ecc-mode: String, operation mode of the NAND ecc mode. "hw" by default
> -- nand-on-flash-bbt: boolean to enable on flash bbt option, if not present false
> -- rb-gpios: GPIO specifier for the busy pin.
> -- wp-gpios: GPIO specifier for the write protect pin.
> -
> -Optional child node of NAND chip nodes:
> -- partitions: see Documentation/devicetree/bindings/mtd/partition.txt
> -
> -Example:
> -
> -nemc: nemc@13410000 {
> - ...
> -
> - nandc: nand-controller@1 {
> - compatible = "ingenic,jz4780-nand";
> - reg = <1 0 0x1000000>; /* Bank 1 */
> -
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - ecc-engine = <&bch>;
> -
> - nand@1 {
> - reg = <1>;
> -
> - nand-ecc-step-size = <1024>;
> - nand-ecc-strength = <24>;
> - nand-ecc-mode = "hw";
> - nand-on-flash-bbt;
> -
> - rb-gpios = <&gpa 20 GPIO_ACTIVE_LOW>;
> - wp-gpios = <&gpf 22 GPIO_ACTIVE_LOW>;
> -
> - partitions {
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ...
> - }
> - };
> - };
> -};
> -
> -The ECC controller is a separate SoC component used for error correction on
> -NAND devices. The following is a description of the device properties for a
> -ECC controller.
> -
> -Required ECC properties:
> -- compatible: Should be one of:
> - * ingenic,jz4740-ecc
> - * ingenic,jz4725b-bch
> - * ingenic,jz4780-bch
> -- reg: Should specify the ECC controller registers location and length.
> -- clocks: Clock for the ECC controller.
> -
> -Example:
> -
> -bch: bch@134d0000 {
> - compatible = "ingenic,jz4780-bch";
> - reg = <0x134d0000 0x10000>;
> -
> - clocks = <&cgu JZ4780_CLK_BCH>;
> -};
> diff --git a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
> new file mode 100644
> index 000000000000..0e4cb1b55385
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
> @@ -0,0 +1,133 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mtd/ingenic,nand.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Ingenic SoCs NAND controller devicetree bindings
> +
> +maintainers:
> + - Paul Cercueil <[email protected]>
> +
> +allOf:
> + - $ref: ../memory-controllers/ingenic,nemc-client.yaml#
You don't need this here because the schema is already applied with the
parent's schema.
> + - $ref: nand-controller.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - ingenic,jz4740-nand
> + - ingenic,jz4725b-nand
> + - ingenic,jz4780-nand
> +
> + reg:
> + items:
> + - description: Bank number, offset and size of first attached NAND chip
> + - description: Bank number, offset and size of second attached NAND chip
> + - description: Bank number, offset and size of third attached NAND chip
> + - description: Bank number, offset and size of fourth attached NAND chip
> + minItems: 1
> +
> + ecc-engine: true
> +
> +patternProperties:
> + "^nand@[a-f0-9]$":
> + type: object
> + properties:
> + rb-gpios:
> + description: GPIO specifier for the busy pin.
> + maxItems: 1
> +
> + wp-gpios:
> + description: GPIO specifier for the write-protect pin.
> + maxItems: 1
> +
> + "^partitions$":
This is at the wrong level. It should be under 'nand@...' node.
It is also not a pattern.
> + type: object
> + description:
> + Node containing description of fixed partitions.
> + See Documentation/devicetree/bindings/mtd/partition.txt
> +
> +required:
> + - compatible
> + - reg
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/jz4780-cgu.h>
> + nemc: memory-controller@13410000 {
> + compatible = "ingenic,jz4780-nemc";
> + reg = <0x13410000 0x10000>;
> + #address-cells = <2>;
> + #size-cells = <1>;
> + ranges = <1 0 0x1b000000 0x1000000>,
> + <2 0 0x1a000000 0x1000000>,
> + <3 0 0x19000000 0x1000000>,
> + <4 0 0x18000000 0x1000000>,
> + <5 0 0x17000000 0x1000000>,
> + <6 0 0x16000000 0x1000000>;
> +
> + clocks = <&cgu JZ4780_CLK_NEMC>;
> +
> + nand-controller@1 {
> + compatible = "ingenic,jz4780-nand";
> + reg = <1 0 0x1000000>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ecc-engine = <&bch>;
> +
> + ingenic,nemc-tAS = <10>;
> + ingenic,nemc-tAH = <5>;
> + ingenic,nemc-tBP = <10>;
> + ingenic,nemc-tAW = <15>;
> + ingenic,nemc-tSTRV = <100>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pins_nemc>;
> +
> + nand@1 {
> + reg = <1>;
> +
> + nand-ecc-step-size = <1024>;
> + nand-ecc-strength = <24>;
> + nand-ecc-mode = "hw";
> + nand-on-flash-bbt;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pins_nemc_cs1>;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + partition@0 {
> + label = "u-boot-spl";
> + reg = <0x0 0x0 0x0 0x800000>;
> + };
> +
> + partition@800000 {
> + label = "u-boot";
> + reg = <0x0 0x800000 0x0 0x200000>;
> + };
> +
> + partition@a00000 {
> + label = "u-boot-env";
> + reg = <0x0 0xa00000 0x0 0x200000>;
> + };
> +
> + partition@c00000 {
> + label = "boot";
> + reg = <0x0 0xc00000 0x0 0x4000000>;
> + };
> +
> + partition@4c00000 {
> + label = "system";
> + reg = <0x0 0x4c00000 0x1 0xfb400000>;
> + };
> + };
> + };
> + };
> + };
> --
> 2.26.2
>
On Sun, 26 Apr 2020 20:58:54 +0200, Paul Cercueil wrote:
> Convert the i2c-jz4780.txt file to ingenic,i2c.yaml.
>
> Two things were changed in the process:
> - the clock-frequency property can now only be set to the two values
> that can be set by the hardware;
> - the dmas and dma-names properties are now required.
>
> Signed-off-by: Paul Cercueil <[email protected]>
> ---
> .../devicetree/bindings/i2c/i2c-jz4780.txt | 33 --------
> .../devicetree/bindings/i2c/ingenic,i2c.yaml | 83 +++++++++++++++++++
> 2 files changed, 83 insertions(+), 33 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-jz4780.txt
> create mode 100644 Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml
>
Applied, thanks!
On Tue, Apr 28, 2020 at 04:12:21PM +0200, Paul Cercueil wrote:
> This one patch will need a V2, I messed up with the clocks.
Looks fine otherwise.
>
> -Paul
>
>
> Le dim. 26 avril 2020 ? 20:58, Paul Cercueil <[email protected]> a ?crit
> :
> > Convert the ingenic,lcd.txt to a new ingenic,lcd.yaml file.
> >
> > In the process, the new ingenic,jz4780-lcd compatible string has been
> > added.
> >
> > Signed-off-by: Paul Cercueil <[email protected]>
> > ---
> > .../bindings/display/ingenic,lcd.txt | 45 -------
> > .../bindings/display/ingenic,lcd.yaml | 113 ++++++++++++++++++
> > 2 files changed, 113 insertions(+), 45 deletions(-)
> > delete mode 100644
> > Documentation/devicetree/bindings/display/ingenic,lcd.txt
> > create mode 100644
> > Documentation/devicetree/bindings/display/ingenic,lcd.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/ingenic,lcd.txt
> > b/Documentation/devicetree/bindings/display/ingenic,lcd.txt
> > deleted file mode 100644
> > index 01e3261defb6..000000000000
> > --- a/Documentation/devicetree/bindings/display/ingenic,lcd.txt
> > +++ /dev/null
> > @@ -1,45 +0,0 @@
> > -Ingenic JZ47xx LCD driver
> > -
> > -Required properties:
> > -- compatible: one of:
> > - * ingenic,jz4740-lcd
> > - * ingenic,jz4725b-lcd
> > - * ingenic,jz4770-lcd
> > -- reg: LCD registers location and length
> > -- clocks: LCD pixclock and device clock specifiers.
> > - The device clock is only required on the JZ4740.
> > -- clock-names: "lcd_pclk" and "lcd"
> > -- interrupts: Specifies the interrupt line the LCD controller is
> > connected to.
> > -
> > -Example:
> > -
> > -panel {
> > - compatible = "sharp,ls020b1dd01d";
> > -
> > - backlight = <&backlight>;
> > - power-supply = <&vcc>;
> > -
> > - port {
> > - panel_input: endpoint {
> > - remote-endpoint = <&panel_output>;
> > - };
> > - };
> > -};
> > -
> > -
> > -lcd: lcd-controller@13050000 {
> > - compatible = "ingenic,jz4725b-lcd";
> > - reg = <0x13050000 0x1000>;
> > -
> > - interrupt-parent = <&intc>;
> > - interrupts = <31>;
> > -
> > - clocks = <&cgu JZ4725B_CLK_LCD>;
> > - clock-names = "lcd";
> > -
> > - port {
> > - panel_output: endpoint {
> > - remote-endpoint = <&panel_input>;
> > - };
> > - };
> > -};
> > diff --git a/Documentation/devicetree/bindings/display/ingenic,lcd.yaml
> > b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml
> > new file mode 100644
> > index 000000000000..8e9c851dc7c5
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml
> > @@ -0,0 +1,113 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/ingenic,lcd.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Ingenic SoCs LCD controller devicetree bindings
> > +
> > +maintainers:
> > + - Paul Cercueil <[email protected]>
> > +
> > +properties:
> > + $nodename:
> > + pattern: "^lcd-controller@[0-9a-f]+$"
> > +
> > + compatible:
> > + enum:
> > + - ingenic,jz4740-lcd
> > + - ingenic,jz4725b-lcd
> > + - ingenic,jz4770-lcd
> > + - ingenic,jz4780-lcd
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + clocks:
> > + items:
> > + - description: Module clock
> > + - description: Pixel clock
> > + minItems: 1
> > +
> > + clock-names:
> > + items:
> > + - const: lcd
> > + - const: lcd_pclk
> > + minItems: 1
> > +
> > + port:
> > + type: object
> > + description:
> > + A port node with endpoint definitions as defined in
> > + Documentation/devicetree/bindings/media/video-interfaces.txt
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - clocks
> > + - clock-names
> > +
> > +if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - ingenic,jz4740-lcd
> > + - ingenic,jz4780-lcd
> > +then:
> > + properties:
> > + clocks:
> > + minItems: 2
> > + clock-names:
> > + minItems: 2
> > +else:
> > + properties:
> > + clocks:
> > + maxItems: 1
> > + clock-names:
> > + maxItems: 1
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/jz4740-cgu.h>
> > + lcd-controller@13050000 {
> > + compatible = "ingenic,jz4740-lcd";
> > + reg = <0x13050000 0x1000>;
> > +
> > + interrupt-parent = <&intc>;
> > + interrupts = <30>;
> > +
> > + clocks = <&cgu JZ4740_CLK_LCD>, <&cgu JZ4740_CLK_LCD_PCLK>;
> > + clock-names = "lcd", "lcd_pclk";
> > +
> > + port {
> > + endpoint {
> > + remote-endpoint = <&panel_input>;
> > + };
> > + };
> > + };
> > +
> > + - |
> > + #include <dt-bindings/clock/jz4725b-cgu.h>
> > + lcd-controller@13050000 {
> > + compatible = "ingenic,jz4725b-lcd";
> > + reg = <0x13050000 0x1000>;
> > +
> > + interrupt-parent = <&intc>;
> > + interrupts = <31>;
> > +
> > + clocks = <&cgu JZ4725B_CLK_LCD>;
> > + clock-names = "lcd";
> > +
> > + port {
> > + endpoint {
> > + remote-endpoint = <&panel_input>;
> > + };
> > + };
> > + };
> > --
> > 2.26.2
> >
>
>
On Sun, 26 Apr 2020 20:58:55 +0200, Paul Cercueil wrote:
> Convert the ingenic,uart.txt to a new ingenic,uart.yaml file.
>
> A few things were changed in the process:
> - the dmas and dma-names properties are now required.
> - the ingenic,jz4770-uart and ingenic,jz4775-uart compatible strings now
> require the ingenic,jz4760-uart string to be used as fallback, since
> the hardware is compatible.
> - the ingenic,jz4725b-uart compatible string was added, with a fallback
> to ingenic,jz4740-uart.
>
> Signed-off-by: Paul Cercueil <[email protected]>
> ---
> .../bindings/serial/ingenic,uart.txt | 28 ------
> .../bindings/serial/ingenic,uart.yaml | 94 +++++++++++++++++++
> 2 files changed, 94 insertions(+), 28 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/serial/ingenic,uart.txt
> create mode 100644 Documentation/devicetree/bindings/serial/ingenic,uart.yaml
>
Applied, thanks!