2020-04-27 23:33:01

by Drew Fustini

[permalink] [raw]
Subject: [PATCH] arm: dts: am33xx-l4: add gpio-line-names to gpio controllers

Add gpio-line-names properties to the gpio controller nodes. The names
correspond to the AM335x pin names which are also the muxmode 0 signal
names. Refer to "Table 4-2. Pin Attributes" in the TI AM335x Sitara
Processors datasheet:

http://www.ti.com/lit/ds/symlink/am3358.pdf


Signed-off-by: Drew Fustini <[email protected]>
---
arch/arm/boot/dts/am33xx-l4.dtsi | 134 +++++++++++++++++++++++++++++++
1 file changed, 134 insertions(+)

diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi
index 5ed7f3c58c0f..1ac574ebfe74 100644
--- a/arch/arm/boot/dts/am33xx-l4.dtsi
+++ b/arch/arm/boot/dts/am33xx-l4.dtsi
@@ -157,6 +157,39 @@
#interrupt-cells = <2>;
reg = <0x0 0x1000>;
interrupts = <96>;
+ gpio-line-names =
+ "MDIO_DATA",
+ "MDIO_CLK",
+ "SPI0_SCLK",
+ "SPI0_D0",
+ "SPI0_D1",
+ "SPI0_CS0",
+ "SPI0_CS1",
+ "ECAP0_IN_PWM0_OUT",
+ "LCD_DATA12",
+ "LCD_DATA13",
+ "LCD_DATA14",
+ "LCD_DATA15",
+ "UART1_CTSN",
+ "UART1_RTSN",
+ "UART1_RXD",
+ "UART1_TXD",
+ "GMII1_TXD3",
+ "GMII1_TXD2",
+ "USB0_DRVVBUS",
+ "XDMA_EVENT_INTR0",
+ "XDMA_EVENT_INTR1",
+ "GMII1_TXD1",
+ "GPMC_AD8",
+ "GPMC_AD9",
+ "NC",
+ "NC",
+ "GPMC_AD10",
+ "GPMC_AD11",
+ "GMII1_TXD0",
+ "RMII1_REFCLK",
+ "GPMC_WAIT0",
+ "GPMC_WPN";
};
};

@@ -1304,6 +1337,39 @@
#interrupt-cells = <2>;
reg = <0x0 0x1000>;
interrupts = <98>;
+ gpio-line-names =
+ "GPMC_AD0",
+ "GPMC_AD1",
+ "GPMC_AD2",
+ "GPMC_AD3",
+ "GPMC_AD4",
+ "GPMC_AD5",
+ "GPMC_AD6",
+ "GPMC_AD7",
+ "UART0_CTSN",
+ "UART0_RTSN",
+ "UART0_RXD",
+ "UART0_TXD",
+ "GPMC_AD12",
+ "GPMC_AD13",
+ "GPMC_AD14",
+ "GPMC_AD15",
+ "GPMC_A0",
+ "GPMC_A1",
+ "GPMC_A2",
+ "GPMC_A3",
+ "GPMC_A4",
+ "GPMC_A5",
+ "GPMC_A6",
+ "GPMC_A7",
+ "GPMC_A8",
+ "GPMC_A9",
+ "GPMC_A10",
+ "GPMC_A11",
+ "GPMC_BE1N",
+ "GPMC_CSN0",
+ "GPMC_CSN1",
+ "GPMC_CSN2";
};
};

@@ -1706,6 +1772,40 @@
#interrupt-cells = <2>;
reg = <0x0 0x1000>;
interrupts = <32>;
+ gpio-line-names =
+ "GPMC_CSN3",
+ "GPMC_CLK",
+ "GPMC_ADVN_ALE",
+ "GPMC_OEN_REN",
+ "GPMC_WEN",
+ "GPMC_BE0N_CLE",
+ "LCD_DATA0",
+ "LCD_DATA1",
+ "LCD_DATA2",
+ "LCD_DATA3",
+ "LCD_DATA4",
+ "LCD_DATA5",
+ "LCD_DATA6",
+ "LCD_DATA7",
+ "LCD_DATA8",
+ "LCD_DATA9",
+ "LCD_DATA10",
+ "LCD_DATA11",
+ "GMII1_RXD3",
+ "GMII1_RXD2",
+ "GMII1_RXD1",
+ "GMII1_RXD0",
+ "LCD_VSYNC",
+ "LCD_HSYNC",
+ "LCD_PCLK",
+ "LCD_AC_BIAS_EN",
+ "MMC0_DAT3",
+ "MMC0_DAT2",
+ "MMC0_DAT1",
+ "MMC0_DAT0",
+ "MMC0_CLK",
+ "MMC0_CMD";
+
};
};

@@ -1739,6 +1839,40 @@
#interrupt-cells = <2>;
reg = <0x0 0x1000>;
interrupts = <62>;
+ gpio-line-names =
+ "GMII1_COL",
+ "GMII1_CRS",
+ "GMII1_RXER",
+ "GMII1_TXEN",
+ "GMII1_RXDV",
+ "I2C0_SDA",
+ "I2C0_SCL",
+ "EMU0",
+ "EMU1",
+ "GMII1_TXCLK",
+ "GMII1_RXCLK",
+ "NC",
+ "NC",
+ "USB1_DRVVBUS",
+ "MCASP0_ACLKX",
+ "MCASP0_FSX",
+ "MCASP0_AXR0",
+ "MCASP0_AHCLKR",
+ "MCASP0_ACLKR",
+ "MCASP0_FSR",
+ "MCASP0_AXR1",
+ "MCASP0_AHCLKX",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC";
+
};
};

--
2.20.1


2020-04-28 07:39:33

by Grygorii Strashko

[permalink] [raw]
Subject: Re: [PATCH] arm: dts: am33xx-l4: add gpio-line-names to gpio controllers



On 28/04/2020 02:31, Drew Fustini wrote:
> Add gpio-line-names properties to the gpio controller nodes. The names
> correspond to the AM335x pin names which are also the muxmode 0 signal
> names. Refer to "Table 4-2. Pin Attributes" in the TI AM335x Sitara
> Processors datasheet:
>
> http://www.ti.com/lit/ds/symlink/am3358.pdf
>
>
> Signed-off-by: Drew Fustini <[email protected]>
> ---
> arch/arm/boot/dts/am33xx-l4.dtsi | 134 +++++++++++++++++++++++++++++++
> 1 file changed, 134 insertions(+)
>
> diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi
> index 5ed7f3c58c0f..1ac574ebfe74 100644
> --- a/arch/arm/boot/dts/am33xx-l4.dtsi
> +++ b/arch/arm/boot/dts/am33xx-l4.dtsi
> @@ -157,6 +157,39 @@
> #interrupt-cells = <2>;
> reg = <0x0 0x1000>;
> interrupts = <96>;
> + gpio-line-names =
> + "MDIO_DATA",
> + "MDIO_CLK",
> + "SPI0_SCLK",
> + "SPI0_D0",
> + "SPI0_D1",
> + "SPI0_CS0",
> + "SPI0_CS1",
> + "ECAP0_IN_PWM0_OUT",
> + "LCD_DATA12",
> + "LCD_DATA13",
> + "LCD_DATA14",
> + "LCD_DATA15",
> + "UART1_CTSN",
> + "UART1_RTSN",
> + "UART1_RXD",
> + "UART1_TXD",
> + "GMII1_TXD3",
> + "GMII1_TXD2",
> + "USB0_DRVVBUS",
> + "XDMA_EVENT_INTR0",
> + "XDMA_EVENT_INTR1",
> + "GMII1_TXD1",
> + "GPMC_AD8",
> + "GPMC_AD9",
> + "NC",
> + "NC",
> + "GPMC_AD10",
> + "GPMC_AD11",
> + "GMII1_TXD0",
> + "RMII1_REFCLK",
> + "GPMC_WAIT0",
> + "GPMC_WPN";
> };
This misuse GPIO DT bindings:
"
Optionally, a GPIO controller may have a "gpio-line-names" property. This is
an array of strings defining the names of the GPIO lines going out of the
GPIO controller. This name should be the most meaningful producer name
for the system, such as a rail name indicating the usage. Package names
such as pin name are discouraged: such lines have opaque names (since they
are by definition generic purpose) and such names are usually not very
helpful. For example "MMC-CD", "Red LED Vdd" and "ethernet reset" are
reasonable line names as they describe what the line is used for. "GPIO0"
is not a good name to give to a GPIO line. Placeholders are discouraged:
rather use the "" (blank string) if the use of the GPIO line is undefined
in your design. The names are assigned starting from line offset 0 from
left to right from the passed array. An incomplete array (where the number
of passed named are less than ngpios) will still be used up until the last
provided valid line index.
"


Additional note. On other TI SoCs like am437x the same gpio line can be routed to more
than one pin (but only one pin can be used).
gpio0_0 GPIO IO -> A17, D16


--
Best regards,
grygorii

2020-04-29 12:59:11

by Drew Fustini

[permalink] [raw]
Subject: Re: [PATCH] arm: dts: am33xx-l4: add gpio-line-names to gpio controllers

On Tue, Apr 28, 2020 at 10:37:43AM +0300, Grygorii Strashko wrote:
>
>
> On 28/04/2020 02:31, Drew Fustini wrote:
> > Add gpio-line-names properties to the gpio controller nodes. The names
> > correspond to the AM335x pin names which are also the muxmode 0 signal
> > names. Refer to "Table 4-2. Pin Attributes" in the TI AM335x Sitara
> > Processors datasheet:
> This misuse GPIO DT bindings:
> "
> Optionally, a GPIO controller may have a "gpio-line-names" property. This is
> an array of strings defining the names of the GPIO lines going out of the
> GPIO controller. This name should be the most meaningful producer name
> for the system, such as a rail name indicating the usage. Package names
> such as pin name are discouraged: such lines have opaque names (since they
> are by definition generic purpose) and such names are usually not very
> helpful. For example "MMC-CD", "Red LED Vdd" and "ethernet reset" are
> reasonable line names as they describe what the line is used for. "GPIO0"
> is not a good name to give to a GPIO line. Placeholders are discouraged:
> rather use the "" (blank string) if the use of the GPIO line is undefined
> in your design. The names are assigned starting from line offset 0 from
> left to right from the passed array. An incomplete array (where the number
> of passed named are less than ngpios) will still be used up until the last
> provided valid line index.
> "

Thank you for pointing out that "Package names such as pin name are
discouraged". That is what I was doing in that patch which I now
realize is incorrect.

The goal to adding the gpio-line-names was to have gpioinfo provide
helpful information to a user on the BeagleBone. Currently this is all
that appears when booting 5.7-rc2 on a BegaleBone:

debian@beaglebone:~$ gpioinfo
gpiochip0 - 32 lines:
line 0: unnamed unused input active-high
line 1: unnamed unused input active-high
line 2: unnamed unused input active-high
line 3: unnamed unused input active-high
line 4: unnamed unused input active-high
line 5: unnamed unused input active-high
line 6: unnamed "cd" input active-low [used]
line 7: unnamed unused input active-high
line 8: unnamed unused input active-high
line 9: unnamed unused input active-high
line 10: unnamed unused input active-high
line 11: unnamed unused input active-high
line 12: unnamed unused input active-high
line 13: unnamed unused input active-high
line 14: unnamed unused input active-high
line 15: unnamed unused input active-high
line 16: unnamed unused input active-high
line 17: unnamed unused input active-high
line 18: unnamed unused input active-high
line 19: unnamed unused input active-high
line 20: unnamed unused input active-high
line 21: unnamed unused input active-high
line 22: unnamed unused input active-high
line 23: unnamed unused input active-high
line 24: unnamed unused input active-high
line 25: unnamed unused input active-high
line 26: unnamed unused input active-high
line 27: unnamed unused input active-high
line 28: unnamed unused input active-high
line 29: unnamed unused input active-high
line 30: unnamed unused input active-high
line 31: unnamed unused input active-high
gpiochip1 - 32 lines:
line 0: unnamed unused input active-high
line 1: unnamed unused input active-high
line 2: unnamed unused input active-high
line 3: unnamed unused input active-high
line 4: unnamed unused input active-high
line 5: unnamed unused input active-high
line 6: unnamed unused input active-high
line 7: unnamed unused input active-high
line 8: unnamed unused input active-high
line 9: unnamed unused input active-high
line 10: unnamed unused input active-high
line 11: unnamed unused input active-high
line 12: unnamed unused input active-high
line 13: unnamed unused input active-high
line 14: unnamed unused input active-high
line 15: unnamed unused input active-high
line 16: unnamed unused input active-high
line 17: unnamed unused input active-high
line 18: unnamed unused input active-high
line 19: unnamed unused input active-high
line 20: unnamed unused input active-high
line 21: unnamed "beaglebone:green:usr0" output active-high [used]
line 22: unnamed "beaglebone:green:usr1" output active-high [used]
line 23: unnamed "beaglebone:green:usr2" output active-high [used]
line 24: unnamed "beaglebone:green:usr3" output active-high [used]
line 25: unnamed unused input active-high
line 26: unnamed unused input active-high
line 27: unnamed unused input active-high
line 28: unnamed unused input active-high
line 29: unnamed unused input active-high
line 30: unnamed unused input active-high
line 31: unnamed unused input active-high
gpiochip2 - 32 lines:
line 0: unnamed unused input active-high
line 1: unnamed unused input active-high
line 2: unnamed unused input active-high
line 3: unnamed unused input active-high
line 4: unnamed unused input active-high
line 5: unnamed unused input active-high
line 6: unnamed unused input active-high
line 7: unnamed unused input active-high
line 8: unnamed unused input active-high
line 9: unnamed unused input active-high
line 10: unnamed unused input active-high
line 11: unnamed unused input active-high
line 12: unnamed unused input active-high
line 13: unnamed unused input active-high
line 14: unnamed unused input active-high
line 15: unnamed unused input active-high
line 16: unnamed unused input active-high
line 17: unnamed unused input active-high
line 18: unnamed unused input active-high
line 19: unnamed unused input active-high
line 20: unnamed unused input active-high
line 21: unnamed unused input active-high
line 22: unnamed unused input active-high
line 23: unnamed unused input active-high
line 24: unnamed unused input active-high
line 25: unnamed unused input active-high
line 26: unnamed unused input active-high
line 27: unnamed unused input active-high
line 28: unnamed unused input active-high
line 29: unnamed unused input active-high
line 30: unnamed unused input active-high
line 31: unnamed unused input active-high
gpiochip3 - 32 lines:
line 0: unnamed unused input active-high
line 1: unnamed unused input active-high
line 2: unnamed unused input active-high
line 3: unnamed unused input active-high
line 4: unnamed unused input active-high
line 5: unnamed unused input active-high
line 6: unnamed unused input active-high
line 7: unnamed unused input active-high
line 8: unnamed unused input active-high
line 9: unnamed unused input active-high
line 10: unnamed unused input active-high
line 11: unnamed unused input active-high
line 12: unnamed unused input active-high
line 13: unnamed unused input active-high
line 14: unnamed unused input active-high
line 15: unnamed unused input active-high
line 16: unnamed unused input active-high
line 17: unnamed unused input active-high
line 18: unnamed unused input active-high
line 19: unnamed unused input active-high
line 20: unnamed unused input active-high
line 21: unnamed unused input active-high
line 22: unnamed unused input active-high
line 23: unnamed unused input active-high
line 24: unnamed unused input active-high
line 25: unnamed unused input active-high
line 26: unnamed unused input active-high
line 27: unnamed unused input active-high
line 28: unnamed unused input active-high
line 29: unnamed unused input active-high
line 30: unnamed unused input active-high
line 31: unnamed unused input active-high

I discussed it with Robert Nelson and Jason Kridner and the idea came up
that using the beagle pin header labels would be more useful than the
AM3358 pin names.

> Additional note. On other TI SoCs like am437x the same gpio line can be routed to more
> than one pin (but only one pin can be used).
> gpio0_0 GPIO IO -> A17, D16

Thank you for that insights.

Instead of am33xx-l4.dtsi, I am thinking of adding a gpio-line-names
property in: source/arch/arm/boot/dts/am335x-bone-common.dtsi

For gpiochip0, line 0 and line 1 would be "" as they are not connected
to P8/P9 header. line 2 would be labeled "P9_22", line 3 would be
"P9_21", etc. I'll post a complete patch for am335x-bone-common.dtsi
and the gpioinfo output to demonstrate the usefulness.


thanks,
drew