changes since v1:
- fixed some indentation
- fixed a typo in RPMCC
- added Tested-bys
Konrad Dybcio (7):
pinctrl: qcom: spmi-gpio: Add pm660(l) compatibility
Documentation: Document pm660(l) SPMI GPIOs compatible
soc: qcom: socinfo: Add socinfo entry for SDM630
clk: qcom: smd: Add support for SDM660 rpm clocks
arm64: dts: qcom: pm660(l): Add base dts files
arm64: dts: qcom: sdm630: Add sdm630 dts file
arm64: dts: qcom: Add support for Sony Xperia XA2/Plus/Ultra (Nile
platform)
Martin Botka (1):
arm64: dts: qcom: Add support for Sony Xperia 10/10 Plus (Ganges
platform)
.../devicetree/bindings/clock/qcom,rpmcc.txt | 1 +
.../bindings/pinctrl/qcom,pmic-gpio.txt | 2 +
arch/arm64/boot/dts/qcom/Makefile | 5 +
arch/arm64/boot/dts/qcom/pm660.dtsi | 60 ++
arch/arm64/boot/dts/qcom/pm660l.dtsi | 46 +
arch/arm64/boot/dts/qcom/sdm630-pins.dtsi | 268 +++++
.../qcom/sdm630-sony-xperia-ganges-kirin.dts | 13 +
.../dts/qcom/sdm630-sony-xperia-ganges.dtsi | 40 +
.../sdm630-sony-xperia-nile-discovery.dts | 13 +
.../qcom/sdm630-sony-xperia-nile-pioneer.dts | 13 +
.../qcom/sdm630-sony-xperia-nile-voyager.dts | 20 +
.../dts/qcom/sdm630-sony-xperia-nile.dtsi | 135 +++
arch/arm64/boot/dts/qcom/sdm630.dtsi | 991 ++++++++++++++++++
.../sdm636-sony-xperia-ganges-mermaid.dts | 20 +
drivers/clk/qcom/clk-smd-rpm.c | 77 ++
drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 4 +
drivers/soc/qcom/socinfo.c | 1 +
include/dt-bindings/clock/qcom,rpmcc.h | 10 +
18 files changed, 1719 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/pm660.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/pm660l.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/sdm630-pins.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts
create mode 100644 arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dts
create mode 100644 arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dts
create mode 100644 arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dts
create mode 100644 arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/sdm630.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
--
2.27.0
Add rpm smd clocks, PMIC and bus clocks which are required on
SDM630/660 (and APQ variants) for clients to vote on.
Signed-off-by: Konrad Dybcio <[email protected]>
---
.../devicetree/bindings/clock/qcom,rpmcc.txt | 1 +
drivers/clk/qcom/clk-smd-rpm.c | 77 +++++++++++++++++++
include/dt-bindings/clock/qcom,rpmcc.h | 10 +++
3 files changed, 88 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
index 90a1349bc713..2ced7807d574 100644
--- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
+++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
@@ -20,6 +20,7 @@ Required properties :
"qcom,rpmcc-msm8996", "qcom,rpmcc"
"qcom,rpmcc-msm8998", "qcom,rpmcc"
"qcom,rpmcc-qcs404", "qcom,rpmcc"
+ "qcom,rpmcc-sdm660", "qcom,rpmcc"
- #clock-cells : shall contain 1
diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
index 52f63ad787ba..4ae9e79e602e 100644
--- a/drivers/clk/qcom/clk-smd-rpm.c
+++ b/drivers/clk/qcom/clk-smd-rpm.c
@@ -766,15 +766,92 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8998 = {
.num_clks = ARRAY_SIZE(msm8998_clks),
};
+/* sdm660 */
+DEFINE_CLK_SMD_RPM_BRANCH(sdm660, bi_tcxo, bi_tcxo_a, QCOM_SMD_RPM_MISC_CLK, 0,
+ 19200000);
+DEFINE_CLK_SMD_RPM(sdm660, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
+DEFINE_CLK_SMD_RPM(sdm660, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
+DEFINE_CLK_SMD_RPM(sdm660, cnoc_periph_clk, cnoc_periph_a_clk,
+ QCOM_SMD_RPM_BUS_CLK, 0);
+DEFINE_CLK_SMD_RPM(sdm660, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0);
+DEFINE_CLK_SMD_RPM(sdm660, mmssnoc_axi_clk, mmssnoc_axi_a_clk,
+ QCOM_SMD_RPM_MMAXI_CLK, 0);
+DEFINE_CLK_SMD_RPM(sdm660, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0);
+DEFINE_CLK_SMD_RPM(sdm660, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0);
+DEFINE_CLK_SMD_RPM(sdm660, aggre2_noc_clk, aggre2_noc_a_clk,
+ QCOM_SMD_RPM_AGGR_CLK, 2);
+DEFINE_CLK_SMD_RPM_QDSS(sdm660, qdss_clk, qdss_a_clk,
+ QCOM_SMD_RPM_MISC_CLK, 1);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, rf_clk1, rf_clk1_a, 4);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, div_clk1, div_clk1_a, 11);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, ln_bb_clk1, ln_bb_clk1_a, 1);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, ln_bb_clk2, ln_bb_clk2_a, 2);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, ln_bb_clk3, ln_bb_clk3_a, 3);
+
+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(sdm660, rf_clk1_pin, rf_clk1_a_pin, 4);
+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(sdm660, ln_bb_clk1_pin,
+ ln_bb_clk1_pin_a, 1);
+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(sdm660, ln_bb_clk2_pin,
+ ln_bb_clk2_pin_a, 2);
+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(sdm660, ln_bb_clk3_pin,
+ ln_bb_clk3_pin_a, 3);
+static struct clk_smd_rpm *sdm660_clks[] = {
+ [RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo,
+ [RPM_SMD_XO_A_CLK_SRC] = &sdm660_bi_tcxo_a,
+ [RPM_SMD_SNOC_CLK] = &sdm660_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &sdm660_snoc_a_clk,
+ [RPM_SMD_CNOC_CLK] = &sdm660_cnoc_clk,
+ [RPM_SMD_CNOC_A_CLK] = &sdm660_cnoc_a_clk,
+ [RPM_SMD_CNOC_PERIPH_CLK] = &sdm660_cnoc_periph_clk,
+ [RPM_SMD_CNOC_PERIPH_A_CLK] = &sdm660_cnoc_periph_a_clk,
+ [RPM_SMD_BIMC_CLK] = &sdm660_bimc_clk,
+ [RPM_SMD_BIMC_A_CLK] = &sdm660_bimc_a_clk,
+ [RPM_SMD_MMSSNOC_AXI_CLK] = &sdm660_mmssnoc_axi_clk,
+ [RPM_SMD_MMSSNOC_AXI_CLK_A] = &sdm660_mmssnoc_axi_a_clk,
+ [RPM_SMD_IPA_CLK] = &sdm660_ipa_clk,
+ [RPM_SMD_IPA_A_CLK] = &sdm660_ipa_a_clk,
+ [RPM_SMD_CE1_CLK] = &sdm660_ce1_clk,
+ [RPM_SMD_CE1_A_CLK] = &sdm660_ce1_a_clk,
+ [RPM_SMD_AGGR2_NOC_CLK] = &sdm660_aggre2_noc_clk,
+ [RPM_SMD_AGGR2_NOC_A_CLK] = &sdm660_aggre2_noc_a_clk,
+ [RPM_SMD_QDSS_CLK] = &sdm660_qdss_clk,
+ [RPM_SMD_QDSS_A_CLK] = &sdm660_qdss_a_clk,
+ [RPM_SMD_RF_CLK1] = &sdm660_rf_clk1,
+ [RPM_SMD_RF_CLK1_A] = &sdm660_rf_clk1_a,
+ [RPM_SMD_DIV_CLK1] = &sdm660_div_clk1,
+ [RPM_SMD_DIV_A_CLK1] = &sdm660_div_clk1_a,
+ [RPM_SMD_LN_BB_CLK] = &sdm660_ln_bb_clk1,
+ [RPM_SMD_LN_BB_A_CLK] = &sdm660_ln_bb_clk1_a,
+ [RPM_SMD_LN_BB_CLK2] = &sdm660_ln_bb_clk2,
+ [RPM_SMD_LN_BB_CLK2_A] = &sdm660_ln_bb_clk2_a,
+ [RPM_SMD_LN_BB_CLK3] = &sdm660_ln_bb_clk3,
+ [RPM_SMD_LN_BB_CLK3_A] = &sdm660_ln_bb_clk3_a,
+ [RPM_SMD_RF_CLK1_PIN] = &sdm660_rf_clk1_pin,
+ [RPM_SMD_RF_CLK1_A_PIN] = &sdm660_rf_clk1_a_pin,
+ [RPM_SMD_LN_BB_CLK1_PIN] = &sdm660_ln_bb_clk1_pin,
+ [RPM_SMD_LN_BB_CLK1_A_PIN] = &sdm660_ln_bb_clk1_pin_a,
+ [RPM_SMD_LN_BB_CLK2_PIN] = &sdm660_ln_bb_clk2_pin,
+ [RPM_SMD_LN_BB_CLK2_A_PIN] = &sdm660_ln_bb_clk2_pin_a,
+ [RPM_SMD_LN_BB_CLK3_PIN] = &sdm660_ln_bb_clk3_pin,
+ [RPM_SMD_LN_BB_CLK3_A_PIN] = &sdm660_ln_bb_clk3_pin_a,
+};
+
+static const struct rpm_smd_clk_desc rpm_clk_sdm660 = {
+ .clks = sdm660_clks,
+ .num_clks = ARRAY_SIZE(sdm660_clks),
+};
+
static const struct of_device_id rpm_smd_clk_match_table[] = {
{ .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 },
{ .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 },
{ .compatible = "qcom,rpmcc-msm8976", .data = &rpm_clk_msm8976 },
{ .compatible = "qcom,rpmcc-msm8996", .data = &rpm_clk_msm8996 },
{ .compatible = "qcom,rpmcc-msm8998", .data = &rpm_clk_msm8998 },
+ { .compatible = "qcom,rpmcc-sdm660", .data = &rpm_clk_sdm660 },
{ .compatible = "qcom,rpmcc-qcs404", .data = &rpm_clk_qcs404 },
{ }
};
+
MODULE_DEVICE_TABLE(of, rpm_smd_clk_match_table);
static struct clk_hw *qcom_smdrpm_clk_hw_get(struct of_phandle_args *clkspec,
diff --git a/include/dt-bindings/clock/qcom,rpmcc.h b/include/dt-bindings/clock/qcom,rpmcc.h
index ae74c43c485d..d1afa634b58d 100644
--- a/include/dt-bindings/clock/qcom,rpmcc.h
+++ b/include/dt-bindings/clock/qcom,rpmcc.h
@@ -133,5 +133,15 @@
#define RPM_SMD_RF_CLK3_A 87
#define RPM_SMD_RF_CLK3_PIN 88
#define RPM_SMD_RF_CLK3_A_PIN 89
+#define RPM_SMD_MMSSNOC_AXI_CLK 90
+#define RPM_SMD_MMSSNOC_AXI_CLK_A 91
+#define RPM_SMD_CNOC_PERIPH_CLK 92
+#define RPM_SMD_CNOC_PERIPH_A_CLK 93
+#define RPM_SMD_LN_BB_CLK3 94
+#define RPM_SMD_LN_BB_CLK3_A 95
+#define RPM_SMD_LN_BB_CLK1_PIN 96
+#define RPM_SMD_LN_BB_CLK1_A_PIN 97
+#define RPM_SMD_LN_BB_CLK2_PIN 98
+#define RPM_SMD_LN_BB_CLK2_A_PIN 99
#endif
--
2.27.0
From: Martin Botka <[email protected]>
Add device tree support for the Sony Xperia 10 and 10
Plus smartphones. They are all based on the Sony Ganges
platform (sdm630/636) and share a lot of common code.
The differences are really minor, so a Ganges-common DTSI
has been created to reduce clutter.
10 - Kirin
10 Plus - Mermaid
This platform is based on SoMC Nile, but there are some
major differences when it comes to pin configuration and
panel setup (among others).
The boards currently support:
* Screen console
* SDHCI
* I2C
* pstore log dump
* GPIO keys
* PSCI idle states
Signed-off-by: Martin Botka <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Tested-by: Martin Botka <[email protected]>
---
arch/arm64/boot/dts/qcom/Makefile | 2 +
.../qcom/sdm630-sony-xperia-ganges-kirin.dts | 13 ++++++
.../dts/qcom/sdm630-sony-xperia-ganges.dtsi | 40 +++++++++++++++++++
.../sdm636-sony-xperia-ganges-mermaid.dts | 20 ++++++++++
4 files changed, 75 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts
create mode 100644 arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 1cad7cb07574..c98bafe03a96 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -16,9 +16,11 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-hp-envy-x2.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8998-lenovo-miix-630.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8998-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-voyager.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sdm636-sony-xperia-ganges-mermaid.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-lavender.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb
diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts
new file mode 100644
index 000000000000..246710a01046
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2020, Martin Botka
+ */
+
+/dts-v1/;
+
+#include "sdm630-sony-xperia-ganges.dtsi"
+
+/ {
+ model = "SoMC Kirin-RoW";
+ compatible = "sony,kirin-row", "qcom,sdm630", "qcom,sdm630-mtp";
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi
new file mode 100644
index 000000000000..ea051b3d14b8
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2020, Martin Botka
+ */
+
+/dts-v1/;
+
+/* Ganges is very similar to Nile, but
+ * there are some differences that will need
+ * to be addresed when more peripherals are
+ * enabled upstream. Hence the separate DTSI.
+ */
+#include "sdm630-sony-xperia-nile.dtsi"
+
+/ {
+ chosen {
+ framebuffer@9d400000 {
+ reg = <0 0x9d400000 0 (2520 * 1080 * 4)>;
+ height = <2520>;
+ };
+ };
+
+ soc {
+
+ i2c@c175000 {
+ status = "okay";
+
+ /* Novatek touchscreen */
+ };
+
+ /* Yes, this is intentional.
+ * Ganges devices only use gpio-keys for
+ * Volume Down, but currently there's an
+ * issue with it that has to be resolved.
+ * Until then, let's not make the kernel panic
+ */
+ /delete-node/ gpio-keys;
+ };
+
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
new file mode 100644
index 000000000000..96b7782d58de
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2020, Martin Botka
+ */
+
+/dts-v1/;
+
+/* Mermaid uses sdm636, but it's different ever so slightly
+ * that we can ignore it for the time being. Sony also commonizes
+ * the Ganges platform as a whole in downstream kernels.
+ */
+#include "sdm630-sony-xperia-ganges.dtsi"
+
+/ {
+ model = "SoMC Mermaid-RoW";
+ compatible = "sony,mermaid-row", "qcom,sdm636", "qcom,sdm636-mtp";
+
+ qcom,msm-id = <345 0>;
+ qcom,pmic-id = <0x1001b 0x101011a 0x00 0x00 0x1001b 0x201011a 0x00 0x00 0x1001b 0x102001a 0x00 0x00>;
+};
--
2.27.0
Quoting Konrad Dybcio (2020-06-22 00:57:42)
> Add rpm smd clocks, PMIC and bus clocks which are required on
> SDM630/660 (and APQ variants) for clients to vote on.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
Just minor nits. Please resend without the other dts and SoC things and
trim the Cc list way down. Thanks.
> ---
> .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 +
> drivers/clk/qcom/clk-smd-rpm.c | 77 +++++++++++++++++++
> include/dt-bindings/clock/qcom,rpmcc.h | 10 +++
> 3 files changed, 88 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
> index 90a1349bc713..2ced7807d574 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
> +++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
> @@ -20,6 +20,7 @@ Required properties :
> "qcom,rpmcc-msm8996", "qcom,rpmcc"
> "qcom,rpmcc-msm8998", "qcom,rpmcc"
> "qcom,rpmcc-qcs404", "qcom,rpmcc"
> + "qcom,rpmcc-sdm660", "qcom,rpmcc"
This one looks right, but indented incorrectly?
>
> - #clock-cells : shall contain 1
>
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 52f63ad787ba..4ae9e79e602e 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -766,15 +766,92 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8998 = {
> .num_clks = ARRAY_SIZE(msm8998_clks),
> };
>
> +/* sdm660 */
> +DEFINE_CLK_SMD_RPM_BRANCH(sdm660, bi_tcxo, bi_tcxo_a, QCOM_SMD_RPM_MISC_CLK, 0,
> + 19200000);
> +DEFINE_CLK_SMD_RPM(sdm660, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
> +DEFINE_CLK_SMD_RPM(sdm660, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
> +DEFINE_CLK_SMD_RPM(sdm660, cnoc_periph_clk, cnoc_periph_a_clk,
> + QCOM_SMD_RPM_BUS_CLK, 0);
> +DEFINE_CLK_SMD_RPM(sdm660, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0);
> +DEFINE_CLK_SMD_RPM(sdm660, mmssnoc_axi_clk, mmssnoc_axi_a_clk,
> + QCOM_SMD_RPM_MMAXI_CLK, 0);
> +DEFINE_CLK_SMD_RPM(sdm660, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0);
> +DEFINE_CLK_SMD_RPM(sdm660, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0);
> +DEFINE_CLK_SMD_RPM(sdm660, aggre2_noc_clk, aggre2_noc_a_clk,
> + QCOM_SMD_RPM_AGGR_CLK, 2);
> +DEFINE_CLK_SMD_RPM_QDSS(sdm660, qdss_clk, qdss_a_clk,
> + QCOM_SMD_RPM_MISC_CLK, 1);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, rf_clk1, rf_clk1_a, 4);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, div_clk1, div_clk1_a, 11);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, ln_bb_clk1, ln_bb_clk1_a, 1);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, ln_bb_clk2, ln_bb_clk2_a, 2);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, ln_bb_clk3, ln_bb_clk3_a, 3);
> +
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(sdm660, rf_clk1_pin, rf_clk1_a_pin, 4);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(sdm660, ln_bb_clk1_pin,
> + ln_bb_clk1_pin_a, 1);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(sdm660, ln_bb_clk2_pin,
> + ln_bb_clk2_pin_a, 2);
> +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(sdm660, ln_bb_clk3_pin,
> + ln_bb_clk3_pin_a, 3);
> +static struct clk_smd_rpm *sdm660_clks[] = {
> + [RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo,
> + [RPM_SMD_XO_A_CLK_SRC] = &sdm660_bi_tcxo_a,
> + [RPM_SMD_SNOC_CLK] = &sdm660_snoc_clk,
> + [RPM_SMD_SNOC_A_CLK] = &sdm660_snoc_a_clk,
> + [RPM_SMD_CNOC_CLK] = &sdm660_cnoc_clk,
> + [RPM_SMD_CNOC_A_CLK] = &sdm660_cnoc_a_clk,
> + [RPM_SMD_CNOC_PERIPH_CLK] = &sdm660_cnoc_periph_clk,
> + [RPM_SMD_CNOC_PERIPH_A_CLK] = &sdm660_cnoc_periph_a_clk,
> + [RPM_SMD_BIMC_CLK] = &sdm660_bimc_clk,
> + [RPM_SMD_BIMC_A_CLK] = &sdm660_bimc_a_clk,
> + [RPM_SMD_MMSSNOC_AXI_CLK] = &sdm660_mmssnoc_axi_clk,
> + [RPM_SMD_MMSSNOC_AXI_CLK_A] = &sdm660_mmssnoc_axi_a_clk,
> + [RPM_SMD_IPA_CLK] = &sdm660_ipa_clk,
> + [RPM_SMD_IPA_A_CLK] = &sdm660_ipa_a_clk,
> + [RPM_SMD_CE1_CLK] = &sdm660_ce1_clk,
> + [RPM_SMD_CE1_A_CLK] = &sdm660_ce1_a_clk,
> + [RPM_SMD_AGGR2_NOC_CLK] = &sdm660_aggre2_noc_clk,
> + [RPM_SMD_AGGR2_NOC_A_CLK] = &sdm660_aggre2_noc_a_clk,
> + [RPM_SMD_QDSS_CLK] = &sdm660_qdss_clk,
> + [RPM_SMD_QDSS_A_CLK] = &sdm660_qdss_a_clk,
> + [RPM_SMD_RF_CLK1] = &sdm660_rf_clk1,
> + [RPM_SMD_RF_CLK1_A] = &sdm660_rf_clk1_a,
> + [RPM_SMD_DIV_CLK1] = &sdm660_div_clk1,
> + [RPM_SMD_DIV_A_CLK1] = &sdm660_div_clk1_a,
> + [RPM_SMD_LN_BB_CLK] = &sdm660_ln_bb_clk1,
> + [RPM_SMD_LN_BB_A_CLK] = &sdm660_ln_bb_clk1_a,
> + [RPM_SMD_LN_BB_CLK2] = &sdm660_ln_bb_clk2,
> + [RPM_SMD_LN_BB_CLK2_A] = &sdm660_ln_bb_clk2_a,
> + [RPM_SMD_LN_BB_CLK3] = &sdm660_ln_bb_clk3,
> + [RPM_SMD_LN_BB_CLK3_A] = &sdm660_ln_bb_clk3_a,
> + [RPM_SMD_RF_CLK1_PIN] = &sdm660_rf_clk1_pin,
> + [RPM_SMD_RF_CLK1_A_PIN] = &sdm660_rf_clk1_a_pin,
> + [RPM_SMD_LN_BB_CLK1_PIN] = &sdm660_ln_bb_clk1_pin,
> + [RPM_SMD_LN_BB_CLK1_A_PIN] = &sdm660_ln_bb_clk1_pin_a,
> + [RPM_SMD_LN_BB_CLK2_PIN] = &sdm660_ln_bb_clk2_pin,
> + [RPM_SMD_LN_BB_CLK2_A_PIN] = &sdm660_ln_bb_clk2_pin_a,
> + [RPM_SMD_LN_BB_CLK3_PIN] = &sdm660_ln_bb_clk3_pin,
> + [RPM_SMD_LN_BB_CLK3_A_PIN] = &sdm660_ln_bb_clk3_pin_a,
> +};
> +
> +static const struct rpm_smd_clk_desc rpm_clk_sdm660 = {
> + .clks = sdm660_clks,
> + .num_clks = ARRAY_SIZE(sdm660_clks),
> +};
> +
> static const struct of_device_id rpm_smd_clk_match_table[] = {
> { .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 },
> { .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 },
> { .compatible = "qcom,rpmcc-msm8976", .data = &rpm_clk_msm8976 },
> { .compatible = "qcom,rpmcc-msm8996", .data = &rpm_clk_msm8996 },
> { .compatible = "qcom,rpmcc-msm8998", .data = &rpm_clk_msm8998 },
> + { .compatible = "qcom,rpmcc-sdm660", .data = &rpm_clk_sdm660 },
Should come last, because s comes after q.
> { .compatible = "qcom,rpmcc-qcs404", .data = &rpm_clk_qcs404 },
> { }
> };
> +
Drop this diff.
> MODULE_DEVICE_TABLE(of, rpm_smd_clk_match_table);
>
> static struct clk_hw *qcom_smdrpm_clk_hw_get(struct of_phandle_args *clkspec,
On Mon 22 Jun 00:57 PDT 2020, Konrad Dybcio wrote:
> From: Martin Botka <[email protected]>
>
> Add device tree support for the Sony Xperia 10 and 10
> Plus smartphones. They are all based on the Sony Ganges
> platform (sdm630/636) and share a lot of common code.
> The differences are really minor, so a Ganges-common DTSI
> has been created to reduce clutter.
>
> 10 - Kirin
> 10 Plus - Mermaid
>
> This platform is based on SoMC Nile, but there are some
> major differences when it comes to pin configuration and
> panel setup (among others).
>
> The boards currently support:
> * Screen console
> * SDHCI
> * I2C
> * pstore log dump
> * GPIO keys
> * PSCI idle states
>
> Signed-off-by: Martin Botka <[email protected]>
> Signed-off-by: Konrad Dybcio <[email protected]>
> Tested-by: Martin Botka <[email protected]>
Same comments as on patch 7 regarding the model, but apart from that
this looks good.
Happy to see these patches on the list, keep up the good work!
Regards,
Bjorn
> ---
> arch/arm64/boot/dts/qcom/Makefile | 2 +
> .../qcom/sdm630-sony-xperia-ganges-kirin.dts | 13 ++++++
> .../dts/qcom/sdm630-sony-xperia-ganges.dtsi | 40 +++++++++++++++++++
> .../sdm636-sony-xperia-ganges-mermaid.dts | 20 ++++++++++
> 4 files changed, 75 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts
> create mode 100644 arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi
> create mode 100644 arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 1cad7cb07574..c98bafe03a96 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -16,9 +16,11 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-hp-envy-x2.dtb
> dtb-$(CONFIG_ARCH_QCOM) += msm8998-lenovo-miix-630.dtb
> dtb-$(CONFIG_ARCH_QCOM) += msm8998-mtp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-voyager.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += sdm636-sony-xperia-ganges-mermaid.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-lavender.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts
> new file mode 100644
> index 000000000000..246710a01046
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts
> @@ -0,0 +1,13 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2020, Martin Botka
> + */
> +
> +/dts-v1/;
> +
> +#include "sdm630-sony-xperia-ganges.dtsi"
> +
> +/ {
> + model = "SoMC Kirin-RoW";
> + compatible = "sony,kirin-row", "qcom,sdm630", "qcom,sdm630-mtp";
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi
> new file mode 100644
> index 000000000000..ea051b3d14b8
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges.dtsi
> @@ -0,0 +1,40 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2020, Martin Botka
> + */
> +
> +/dts-v1/;
> +
> +/* Ganges is very similar to Nile, but
> + * there are some differences that will need
> + * to be addresed when more peripherals are
> + * enabled upstream. Hence the separate DTSI.
> + */
> +#include "sdm630-sony-xperia-nile.dtsi"
> +
> +/ {
> + chosen {
> + framebuffer@9d400000 {
> + reg = <0 0x9d400000 0 (2520 * 1080 * 4)>;
> + height = <2520>;
> + };
> + };
> +
> + soc {
> +
> + i2c@c175000 {
> + status = "okay";
> +
> + /* Novatek touchscreen */
> + };
> +
> + /* Yes, this is intentional.
> + * Ganges devices only use gpio-keys for
> + * Volume Down, but currently there's an
> + * issue with it that has to be resolved.
> + * Until then, let's not make the kernel panic
> + */
> + /delete-node/ gpio-keys;
> + };
> +
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
> new file mode 100644
> index 000000000000..96b7782d58de
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
> @@ -0,0 +1,20 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2020, Martin Botka
> + */
> +
> +/dts-v1/;
> +
> +/* Mermaid uses sdm636, but it's different ever so slightly
> + * that we can ignore it for the time being. Sony also commonizes
> + * the Ganges platform as a whole in downstream kernels.
> + */
> +#include "sdm630-sony-xperia-ganges.dtsi"
> +
> +/ {
> + model = "SoMC Mermaid-RoW";
> + compatible = "sony,mermaid-row", "qcom,sdm636", "qcom,sdm636-mtp";
> +
> + qcom,msm-id = <345 0>;
> + qcom,pmic-id = <0x1001b 0x101011a 0x00 0x00 0x1001b 0x201011a 0x00 0x00 0x1001b 0x102001a 0x00 0x00>;
> +};
> --
> 2.27.0
>