2020-06-22 08:39:34

by Zhao Qiang

Subject: [RESEND PATCH 1/2] arm64: dts: lx2160a: add dspi controller DT nodes

From: Chuanhua Han <[email protected]>

Add the dspi support on lx2160

Signed-off-by: Chuanhua Han <[email protected]>
Signed-off-by: Bao Xiaowei <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Zhao Qiang <[email protected]>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 39 ++++++++++++++++++++++++++
1 file changed, 39 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index abaeb58..f56172f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -777,6 +777,45 @@
status = "disabled";
};

+ dspi0: spi@2100000 {
+ compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2100000 0x0 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 7>;
+ clock-names = "dspi";
+ spi-num-chipselects = <5>;
+ bus-num = <0>;
+ status = "disabled";
+ };
+
+ dspi1: spi@2110000 {
+ compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2110000 0x0 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 7>;
+ clock-names = "dspi";
+ spi-num-chipselects = <5>;
+ bus-num = <1>;
+ status = "disabled";
+ };
+
+ dspi2: spi@2120000 {
+ compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2120000 0x0 0x10000>;
+ interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 7>;
+ clock-names = "dspi";
+ spi-num-chipselects = <5>;
+ bus-num = <2>;
+ status = "disabled";
+ };
+
esdhc0: esdhc@2140000 {
compatible = "fsl,esdhc";
reg = <0x0 0x2140000 0x0 0x10000>;
--
2.7.4

2020-06-22 08:40:06

by Zhao Qiang

Subject: [RESEND PATCH 2/2] arm64: dts: lx2160a: add DT node for all DSPI controller

From: Chuanhua Han <[email protected]>

Add device tree node for first flash (CS0) connected
to all dspi controller.

Signed-off-by: Chuanhua Han <[email protected]>
Signed-off-by: Wasim Khan <[email protected]>
Signed-off-by: Zhao Qiang <[email protected]>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 36 +++++++++++++++++++++++
1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
index 3b88e1e..2d1fe6c 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
@@ -35,6 +35,42 @@
status = "okay";
};

+&dspi0 {
+ status = "okay";
+
+ dflash0: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&dspi1 {
+ status = "okay";
+
+ dflash1: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&dspi2 {
+ status = "okay";
+
+ dflash2: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
&esdhc0 {
status = "okay";
};
--
2.7.4

2020-07-11 14:24:30

by Shawn Guo

Subject: Re: [RESEND PATCH 1/2] arm64: dts: lx2160a: add dspi controller DT nodes

On Mon, Jun 22, 2020 at 04:31:08PM +0800, Qiang Zhao wrote:
> From: Chuanhua Han <[email protected]>
>
> Add the dspi support on lx2160
>
> Signed-off-by: Chuanhua Han <[email protected]>
> Signed-off-by: Bao Xiaowei <[email protected]>
> Signed-off-by: Hou Zhiqiang <[email protected]>
> Signed-off-by: Zhao Qiang <[email protected]>

When you resend patches, please state why. Should I drop the patches
I just applied and pick up this version instead?

Shawn

> ---
> arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 39 ++++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index abaeb58..f56172f 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -777,6 +777,45 @@
> status = "disabled";
> };
>
> + dspi0: spi@2100000 {
> + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0 0x2100000 0x0 0x10000>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clockgen 4 7>;
> + clock-names = "dspi";
> + spi-num-chipselects = <5>;
> + bus-num = <0>;
> + status = "disabled";
> + };
> +
> + dspi1: spi@2110000 {
> + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0 0x2110000 0x0 0x10000>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clockgen 4 7>;
> + clock-names = "dspi";
> + spi-num-chipselects = <5>;
> + bus-num = <1>;
> + status = "disabled";
> + };
> +
> + dspi2: spi@2120000 {
> + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0 0x2120000 0x0 0x10000>;
> + interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clockgen 4 7>;
> + clock-names = "dspi";
> + spi-num-chipselects = <5>;
> + bus-num = <2>;
> + status = "disabled";
> + };
> +
> esdhc0: esdhc@2140000 {
> compatible = "fsl,esdhc";
> reg = <0x0 0x2140000 0x0 0x10000>;
> --
> 2.7.4
>

2020-07-13 02:44:39

by Zhao Qiang

Subject: RE: [RESEND PATCH 1/2] arm64: dts: lx2160a: add dspi controller DT nodes

On Sat, July 11, 2020 at 22:23PM +0800, Shawn Guo <[email protected]> wrote:

> -----Original Message-----
> From: Shawn Guo <[email protected]>
> Sent: 2020??7??11?? 22:23
> To: Qiang Zhao <[email protected]>
> Cc: [email protected]; [email protected]; Leo Li
> <[email protected]>; Chuanhua Han <[email protected]>
> Subject: Re: [RESEND PATCH 1/2] arm64: dts: lx2160a: add dspi controller DT
> nodes
>
> On Mon, Jun 22, 2020 at 04:31:08PM +0800, Qiang Zhao wrote:
> > From: Chuanhua Han <[email protected]>
> >
> > Add the dspi support on lx2160
> >
> > Signed-off-by: Chuanhua Han <[email protected]>
> > Signed-off-by: Bao Xiaowei <[email protected]>
> > Signed-off-by: Hou Zhiqiang <[email protected]>
> > Signed-off-by: Zhao Qiang <[email protected]>
>
> When you resend patches, please state why. Should I drop the patches I just
> applied and pick up this version instead?
>
Sorry for that, I resend just because I forgot to add myself in cc list.

>
> > ---
> > arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 39
> > ++++++++++++++++++++++++++
> > 1 file changed, 39 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > index abaeb58..f56172f 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > @@ -777,6 +777,45 @@
> > status = "disabled";
> > };
> >
> > + dspi0: spi@2100000 {
> > + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x0 0x2100000 0x0 0x10000>;
> > + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clockgen 4 7>;
> > + clock-names = "dspi";
> > + spi-num-chipselects = <5>;
> > + bus-num = <0>;
> > + status = "disabled";
> > + };
> > +
> > + dspi1: spi@2110000 {
> > + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x0 0x2110000 0x0 0x10000>;
> > + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clockgen 4 7>;
> > + clock-names = "dspi";
> > + spi-num-chipselects = <5>;
> > + bus-num = <1>;
> > + status = "disabled";
> > + };
> > +
> > + dspi2: spi@2120000 {
> > + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x0 0x2120000 0x0 0x10000>;
> > + interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clockgen 4 7>;
> > + clock-names = "dspi";
> > + spi-num-chipselects = <5>;
> > + bus-num = <2>;
> > + status = "disabled";
> > + };
> > +
> > esdhc0: esdhc@2140000 {
> > compatible = "fsl,esdhc";
> > reg = <0x0 0x2140000 0x0 0x10000>;
> > --
> > 2.7.4
> >

Best Regards
Qiang Zhao