This patch series improves the existing implementation of the Clock
Management Unit for the Actions Semi S500 SoC, by adding support for
some missing clocks, like DMAC and GPIO.
Additionally, it enables the UART nodes in the common owl-s500 DTS to
use the clock provided by the CMU. That means the S500 based SBCs can
now get rid of their (fake) UART fixed clock and, as a matter of fact,
this has been already done here for RoseapplePi, the new board which
is going to be supported (hopefully) via the following patchset:
https://lore.kernel.org/lkml/[email protected]/
Eventually, the patchset adds support for the Actions Semi S500 SoC's
DMA controller and Reset Management Unit. Please note the already
existing Actions Semi Owl SoCs DMA driver seems to be fully compatible
with S500, even though this is not explicitly mentioned in the source
code. For the moment, I have just enabled the DMA controller node in
owl-s500 DTS using the "actions,s900-dma" compatible string.
In the upcoming patch series I will provide a pinctrl driver and enable
access to MMC and I2C.
Thanks,
Cristi
Cristian Ciocaltea (11):
clk: actions: Fix h_clk for Actions S500 SoC
arm: dts: owl-s500: Add Clock Management Unit
arm: dts: owl-s500: Set UART clock refs from CMU
arm: dts: owl-s500-roseapplepi: Use UART clock from CMU
dt-bindings: clock: Add APB, DMAC, GPIO bindings for Actions S500 SoC
clk: actions: Add APB, DMAC, GPIO clock support for Actions S500 SoC
arm: dts: owl-s500: Add DMA controller
dt-bindings: reset: Add binding constants for Actions S500 RMU
clk: actions: Add Actions S500 SoC Reset Management Unit support
arm: dts: owl-s500: Add Reset Controller support
MAINTAINERS: Add reset binding entry for Actions Semi Owl SoCs
MAINTAINERS | 1 +
arch/arm/boot/dts/owl-s500-roseapplepi.dts | 7 --
arch/arm/boot/dts/owl-s500.dtsi | 37 ++++++++
drivers/clk/actions/owl-s500.c | 91 ++++++++++++++++++-
include/dt-bindings/clock/actions,s500-cmu.h | 77 ++++++++--------
.../dt-bindings/reset/actions,s500-reset.h | 67 ++++++++++++++
6 files changed, 235 insertions(+), 45 deletions(-)
create mode 100644 include/dt-bindings/reset/actions,s500-reset.h
--
2.27.0
Add Clock Management Unit for Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea <[email protected]>
---
arch/arm/boot/dts/owl-s500.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 1dbe4e8b38ac..5d5ad9db549b 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -5,6 +5,7 @@
* Copyright (c) 2016-2017 Andreas Färber
*/
+#include <dt-bindings/clock/actions,s500-cmu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/owl-s500-powergate.h>
@@ -70,6 +71,12 @@ hosc: hosc {
#clock-cells = <0>;
};
+ losc: losc {
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ #clock-cells = <0>;
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -169,6 +176,13 @@ uart6: serial@b012c000 {
status = "disabled";
};
+ cmu: clock-controller@b0160000 {
+ compatible = "actions,s500-cmu";
+ reg = <0xb0160000 0x8000>;
+ clocks = <&hosc>, <&losc>;
+ #clock-cells = <1>;
+ };
+
timer: timer@b0168000 {
compatible = "actions,s500-timer";
reg = <0xb0168000 0x8000>;
--
2.27.0
On Mon, Jun 22, 2020 at 01:13:31AM -0700, Stephen Boyd wrote:
> Quoting Cristian Ciocaltea (2020-06-17 09:48:00)
> > This patch series improves the existing implementation of the Clock
> > Management Unit for the Actions Semi S500 SoC, by adding support for
> > some missing clocks, like DMAC and GPIO.
> >
> > Additionally, it enables the UART nodes in the common owl-s500 DTS to
> > use the clock provided by the CMU. That means the S500 based SBCs can
> > now get rid of their (fake) UART fixed clock and, as a matter of fact,
> > this has been already done here for RoseapplePi, the new board which
> > is going to be supported (hopefully) via the following patchset:
> > https://lore.kernel.org/lkml/[email protected]/
> >
> > Eventually, the patchset adds support for the Actions Semi S500 SoC's
> > DMA controller and Reset Management Unit. Please note the already
> > existing Actions Semi Owl SoCs DMA driver seems to be fully compatible
> > with S500, even though this is not explicitly mentioned in the source
> > code. For the moment, I have just enabled the DMA controller node in
> > owl-s500 DTS using the "actions,s900-dma" compatible string.
> >
> > In the upcoming patch series I will provide a pinctrl driver and enable
> > access to MMC and I2C.
> >
>
> Can you please untangle this from the DTS changes? The clk driver
> changes will go through the clk tree and the DTS changes will go through
> arm-soc. Please send them as separate patch series to the respective
> maintainers.
Hi Stephen,
Thank you for reviewing!
I will submit v2 having the DTS related changes removed from this patch
series.
Regards,
Cristi