In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved,
so remove it from GPC node.
Signed-off-by: Anson Huang <[email protected]>
---
arch/arm/boot/dts/imx6qdl.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index b047403..deb09df 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -871,8 +871,7 @@
reg = <0x020dc000 0x4000>;
interrupt-controller;
#interrupt-cells = <3>;
- interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
- <0 90 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&intc>;
clocks = <&clks IMX6QDL_CLK_IPG>;
clock-names = "ipg";
--
2.7.4
On Mon, Jun 01, 2020 at 03:54:29PM +0800, Anson Huang wrote:
> In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved,
> so remove it from GPC node.
>
> Signed-off-by: Anson Huang <[email protected]>
Applied, thanks.