From: Biwen Li <[email protected]>
The patch adds ftm_alarm0 DT node for Soc LX2160A
FlexTimer1 module is used to wakeup the system in deep sleep
Signed-off-by: Biwen Li <[email protected]>
---
Change in v2:
- use generic name
- use definition
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index abaeb58..d571b7d 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -16,6 +16,10 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ rtc1 = &ftm_alarm0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -888,6 +892,20 @@
timeout-sec = <30>;
};
+ rcpm: power-controller@1e34040 {
+ compatible = "fsl,lx2160a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1e34040 0x0 0x1c>;
+ #fsl,rcpm-wakeup-cells = <7>;
+ little-endian;
+ };
+
+ ftm_alarm0: timer@2800000 {
+ compatible = "fsl,lx2160a-ftm-alarm";
+ reg = <0x0 0x2800000 0x0 0x10000>;
+ fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
usb0: usb@3100000 {
compatible = "snps,dwc3";
reg = <0x0 0x3100000 0x0 0x10000>;
--
2.7.4
From: Biwen Li <[email protected]>
The patch add ftm_alarm0 DT node
- add rcpm node
- add ftm_alarm0 node
- aliases ftm_alarm0 as rtc1
Signed-off-by: Biwen Li <[email protected]>
---
Change in v2:
- use generic name
arch/arm/boot/dts/ls1021a.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 760a68c..5af45ef 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -66,6 +66,7 @@
serial4 = &lpuart4;
serial5 = &lpuart5;
sysclk = &sysclk;
+ rtc1 = &ftm_alarm0;
};
cpus {
@@ -1002,5 +1003,19 @@
big-endian;
};
+ rcpm: power-controller@1ee2140 {
+ compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1ee2140 0x0 0x8>;
+ #fsl,rcpm-wakeup-cells = <2>;
+ };
+
+ ftm_alarm0: timer0@29d0000 {
+ compatible = "fsl,ls1021a-ftm-alarm";
+ reg = <0x0 0x29d0000 0x0 0x10000>;
+ reg-names = "ftm";
+ fsl,rcpm-wakeup = <&rcpm 0x20000 0x0>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ big-endian;
+ };
};
};
--
2.7.4
From: Biwen Li <[email protected]>
The patch adds ftm_alarm0 DT node for LS1028ARDB board
FlexTimer1 module is used to wakeup the system
Signed-off-by: Biwen Li <[email protected]>
---
Change in v2:
- use generic name
- use definition
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 055f114..7bcb225 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -17,6 +17,10 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ rtc1 = &ftm_alarm0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -983,6 +987,19 @@
};
};
};
+
+ rcpm: power-controller@1e34040 {
+ compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1e34040 0x0 0x1c>;
+ #fsl,rcpm-wakeup-cells = <7>;
+ };
+
+ ftm_alarm0: timer@2800000 {
+ compatible = "fsl,ls1028a-ftm-alarm";
+ reg = <0x0 0x2800000 0x0 0x10000>;
+ fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
malidp0: display@f080000 {
--
2.7.4
From: Biwen Li <[email protected]>
The patch adds ftm_alarm0 DT node
- add new rcpm node
- add ftm_alarm0 node
- aliases ftm_alarm0 as rtc1
Signed-off-by: Biwen Li <[email protected]>
---
Change in v2:
- use generic name
- use definition
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 15 +++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 14 ++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 15 +++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 14 ++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 14 ++++++++++++++
5 files changed, 72 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 006e544..4742efe 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -22,6 +22,7 @@
rtic-c = &rtic_c;
rtic-d = &rtic_d;
sec-mon = &sec_mon;
+ rtc1 = &ftm_alarm0;
};
cpus {
@@ -512,6 +513,20 @@
<0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
+
+ rcpm: power-controller@1ee2140 {
+ compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1ee2140 0x0 0x4>;
+ #fsl,rcpm-wakeup-cells = <1>;
+ };
+
+ ftm_alarm0: timer@29d0000 {
+ compatible = "fsl,ls1012a-ftm-alarm";
+ reg = <0x0 0x29d0000 0x0 0x10000>;
+ fsl,rcpm-wakeup = <&rcpm 0x20000>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ big-endian;
+ };
};
firmware {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 3b641bd..55ceae7 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -27,6 +27,7 @@
ethernet4 = &enet4;
ethernet5 = &enet5;
ethernet6 = &enet6;
+ rtc1 = &ftm_alarm0;
};
cpus {
@@ -829,6 +830,19 @@
big-endian;
};
+ rcpm: power-controller@1ee2140 {
+ compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1ee2140 0x0 0x4>;
+ #fsl,rcpm-wakeup-cells = <1>;
+ };
+
+ ftm_alarm0: timer@29d0000 {
+ compatible = "fsl,ls1043a-ftm-alarm";
+ reg = <0x0 0x29d0000 0x0 0x10000>;
+ fsl,rcpm-wakeup = <&rcpm 0x20000>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ big-endian;
+ };
};
firmware {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index d4c1da3..3c92c21 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -28,6 +28,7 @@
ethernet5 = &enet5;
ethernet6 = &enet6;
ethernet7 = &enet7;
+ rtc1 = &ftm_alarm0;
};
cpus {
@@ -765,6 +766,20 @@
queue-sizes = <64 64>;
big-endian;
};
+
+ rcpm: power-controller@1ee2140 {
+ compatible = "fsl,ls1046a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1ee2140 0x0 0x4>;
+ #fsl,rcpm-wakeup-cells = <1>;
+ };
+
+ ftm_alarm0: timer@29d0000 {
+ compatible = "fsl,ls1046a-ftm-alarm";
+ reg = <0x0 0x29d0000 0x0 0x10000>;
+ fsl,rcpm-wakeup = <&rcpm 0x20000>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ big-endian;
+ };
};
reserved-memory {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 36a7995..169f474 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -18,6 +18,7 @@
aliases {
crypto = &crypto;
+ rtc1 = &ftm_alarm0;
};
cpus {
@@ -781,6 +782,19 @@
};
};
};
+
+ rcpm: power-controller@1e34040 {
+ compatible = "fsl,ls1088a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1e34040 0x0 0x18>;
+ #fsl,rcpm-wakeup-cells = <6>;
+ };
+
+ ftm_alarm0: timer@2800000 {
+ compatible = "fsl,ls1088a-ftm-alarm";
+ reg = <0x0 0x2800000 0x0 0x10000>;
+ fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
firmware {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 3944ef1..0c74021 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -24,6 +24,7 @@
serial1 = &serial1;
serial2 = &serial2;
serial3 = &serial3;
+ rtc1 = &ftm_alarm0;
};
cpu: cpus {
@@ -763,6 +764,19 @@
reg = <0x0 0x04000000 0x0 0x01000000>;
interrupts = <0 12 4>;
};
+
+ rcpm: power-controller@1e34040 {
+ compatible = "fsl,ls208xa-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1e34040 0x0 0x18>;
+ #fsl,rcpm-wakeup-cells = <6>;
+ };
+
+ ftm_alarm0: timer@2800000 {
+ compatible = "fsl,ls208xa-ftm-alarm";
+ reg = <0x0 0x2800000 0x0 0x10000>;
+ fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
ddr1: memory-controller@1080000 {
--
2.7.4
On Sun, Jun 14, 2020 at 10:32:05PM +0800, Biwen Li wrote:
> From: Biwen Li <[email protected]>
>
> The patch adds ftm_alarm0 DT node
> - add new rcpm node
> - add ftm_alarm0 node
> - aliases ftm_alarm0 as rtc1
>
> Signed-off-by: Biwen Li <[email protected]>
> ---
> Change in v2:
> - use generic name
> - use definition
>
> arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 15 +++++++++++++++
> arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 14 ++++++++++++++
> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 15 +++++++++++++++
> arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 14 ++++++++++++++
> arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 14 ++++++++++++++
> 5 files changed, 72 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> index 006e544..4742efe 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> @@ -22,6 +22,7 @@
> rtic-c = &rtic_c;
> rtic-d = &rtic_d;
> sec-mon = &sec_mon;
> + rtc1 = &ftm_alarm0;
Sorry. I did not catch it during v1 review. But we want to keep them
sort alphabetically.
Shawn
> };
>
> cpus {
> @@ -512,6 +513,20 @@
> <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
> status = "disabled";
> };
> +
> + rcpm: power-controller@1ee2140 {
> + compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1+";
> + reg = <0x0 0x1ee2140 0x0 0x4>;
> + #fsl,rcpm-wakeup-cells = <1>;
> + };
> +
> + ftm_alarm0: timer@29d0000 {
> + compatible = "fsl,ls1012a-ftm-alarm";
> + reg = <0x0 0x29d0000 0x0 0x10000>;
> + fsl,rcpm-wakeup = <&rcpm 0x20000>;
> + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
> + big-endian;
> + };
> };
>
> firmware {
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> index 3b641bd..55ceae7 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> @@ -27,6 +27,7 @@
> ethernet4 = &enet4;
> ethernet5 = &enet5;
> ethernet6 = &enet6;
> + rtc1 = &ftm_alarm0;
> };
>
> cpus {
> @@ -829,6 +830,19 @@
> big-endian;
> };
>
> + rcpm: power-controller@1ee2140 {
> + compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1+";
> + reg = <0x0 0x1ee2140 0x0 0x4>;
> + #fsl,rcpm-wakeup-cells = <1>;
> + };
> +
> + ftm_alarm0: timer@29d0000 {
> + compatible = "fsl,ls1043a-ftm-alarm";
> + reg = <0x0 0x29d0000 0x0 0x10000>;
> + fsl,rcpm-wakeup = <&rcpm 0x20000>;
> + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
> + big-endian;
> + };
> };
>
> firmware {
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> index d4c1da3..3c92c21 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> @@ -28,6 +28,7 @@
> ethernet5 = &enet5;
> ethernet6 = &enet6;
> ethernet7 = &enet7;
> + rtc1 = &ftm_alarm0;
> };
>
> cpus {
> @@ -765,6 +766,20 @@
> queue-sizes = <64 64>;
> big-endian;
> };
> +
> + rcpm: power-controller@1ee2140 {
> + compatible = "fsl,ls1046a-rcpm", "fsl,qoriq-rcpm-2.1+";
> + reg = <0x0 0x1ee2140 0x0 0x4>;
> + #fsl,rcpm-wakeup-cells = <1>;
> + };
> +
> + ftm_alarm0: timer@29d0000 {
> + compatible = "fsl,ls1046a-ftm-alarm";
> + reg = <0x0 0x29d0000 0x0 0x10000>;
> + fsl,rcpm-wakeup = <&rcpm 0x20000>;
> + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
> + big-endian;
> + };
> };
>
> reserved-memory {
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> index 36a7995..169f474 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> @@ -18,6 +18,7 @@
>
> aliases {
> crypto = &crypto;
> + rtc1 = &ftm_alarm0;
> };
>
> cpus {
> @@ -781,6 +782,19 @@
> };
> };
> };
> +
> + rcpm: power-controller@1e34040 {
> + compatible = "fsl,ls1088a-rcpm", "fsl,qoriq-rcpm-2.1+";
> + reg = <0x0 0x1e34040 0x0 0x18>;
> + #fsl,rcpm-wakeup-cells = <6>;
> + };
> +
> + ftm_alarm0: timer@2800000 {
> + compatible = "fsl,ls1088a-ftm-alarm";
> + reg = <0x0 0x2800000 0x0 0x10000>;
> + fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>;
> + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> + };
> };
>
> firmware {
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
> index 3944ef1..0c74021 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
> @@ -24,6 +24,7 @@
> serial1 = &serial1;
> serial2 = &serial2;
> serial3 = &serial3;
> + rtc1 = &ftm_alarm0;
> };
>
> cpu: cpus {
> @@ -763,6 +764,19 @@
> reg = <0x0 0x04000000 0x0 0x01000000>;
> interrupts = <0 12 4>;
> };
> +
> + rcpm: power-controller@1e34040 {
> + compatible = "fsl,ls208xa-rcpm", "fsl,qoriq-rcpm-2.1+";
> + reg = <0x0 0x1e34040 0x0 0x18>;
> + #fsl,rcpm-wakeup-cells = <6>;
> + };
> +
> + ftm_alarm0: timer@2800000 {
> + compatible = "fsl,ls208xa-ftm-alarm";
> + reg = <0x0 0x2800000 0x0 0x10000>;
> + fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0>;
> + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> + };
> };
>
> ddr1: memory-controller@1080000 {
> --
> 2.7.4
>
> > Signed-off-by: Biwen Li <[email protected]>
> > ---
> > Change in v2:
> > - use generic name
> > - use definition
> >
> > arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 15 +++++++++++++++
> > arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 14 ++++++++++++++
> > arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 15 +++++++++++++++
> > arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 14 ++++++++++++++
> > arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 14 ++++++++++++++
> > 5 files changed, 72 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> > index 006e544..4742efe 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> > @@ -22,6 +22,7 @@
> > rtic-c = &rtic_c;
> > rtic-d = &rtic_d;
> > sec-mon = &sec_mon;
> > + rtc1 = &ftm_alarm0;
>
> Sorry. I did not catch it during v1 review. But we want to keep them sort
> alphabetically.
Okay, got it, i will sort them in v3.