2020-07-10 09:43:49

by Zhenyu Ye

Subject: [PATCH v1] arm64: tlb: don't set the ttl value in flush_tlb_page_nosync

flush_tlb_page_nosync() may be called from pmd level, so we
can not set the ttl = 3 here.

The callstack is as follows:

pmdp_set_access_flags
ptep_set_access_flags
flush_tlb_fix_spurious_fault
flush_tlb_page
flush_tlb_page_nosync

Reported-by: Catalin Marinas <[email protected]>
Fixes: e735b98a5fe0 ("arm64: Add tlbi_user_level TLB invalidation helper")
Signed-off-by: Zhenyu Ye <[email protected]>
---
arch/arm64/include/asm/tlbflush.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index edfec8139ef8..7528c84a94ef 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -252,9 +252,8 @@ static inline void flush_tlb_page_nosync(struct vm_area_struct *vma,
unsigned long addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm));

dsb(ishst);
- /* This function is only called on a small page */
- __tlbi_level(vale1is, addr, 3);
- __tlbi_user_level(vale1is, addr, 3);
+ __tlbi(vale1is, addr);
+ __tlbi_user(vale1is, addr);
}

static inline void flush_tlb_page(struct vm_area_struct *vma,
--
2.19.1

2020-07-10 15:29:47

by Catalin Marinas

Subject: Re: [PATCH v1] arm64: tlb: don't set the ttl value in flush_tlb_page_nosync

On Fri, 10 Jul 2020 17:41:58 +0800, Zhenyu Ye wrote:
> flush_tlb_page_nosync() may be called from pmd level, so we
> can not set the ttl = 3 here.
>
> The callstack is as follows:
>
> pmdp_set_access_flags
> ptep_set_access_flags
> flush_tlb_fix_spurious_fault
> flush_tlb_page
> flush_tlb_page_nosync

Applied to arm64 (for-next/tlbi), thanks!

[1/1] arm64: tlb: don't set the ttl value in flush_tlb_page_nosync
https://git.kernel.org/arm64/c/61c11656b67b

--
Catalin