Add specific compatible string for Marvell usage due to errata of
accessing 64bits registers of ARM SMMU, in AP806.
AP806 SoC uses the generic ARM-MMU500, and there's no specific
implementation of Marvell, this compatible is used for errata only.
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Hanna Hawa <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
Signed-off-by: Tomasz Nowicki <[email protected]>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index d7ceb4c34423..156b38924a00 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -38,6 +38,10 @@ properties:
- qcom,sc7180-smmu-500
- qcom,sdm845-smmu-500
- const: arm,mmu-500
+ - description: Marvell SoCs implementing "arm,mmu-500"
+ items:
+ - const: marvell,ap806-smmu-500
+ - const: arm,mmu-500
- items:
- const: arm,mmu-500
- const: arm,smmu-v2
--
2.17.1
On 2020-07-15 08:06, Tomasz Nowicki wrote:
> Add specific compatible string for Marvell usage due to errata of
> accessing 64bits registers of ARM SMMU, in AP806.
>
> AP806 SoC uses the generic ARM-MMU500, and there's no specific
> implementation of Marvell, this compatible is used for errata only.
Reviewed-by: Robin Murphy <[email protected]>
Presumably Will can pick up these first 3 patches for 5.9 and #4 can go
via arm-soc.
Robin.
> Reviewed-by: Rob Herring <[email protected]>
> Signed-off-by: Hanna Hawa <[email protected]>
> Signed-off-by: Gregory CLEMENT <[email protected]>
> Signed-off-by: Tomasz Nowicki <[email protected]>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index d7ceb4c34423..156b38924a00 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -38,6 +38,10 @@ properties:
> - qcom,sc7180-smmu-500
> - qcom,sdm845-smmu-500
> - const: arm,mmu-500
> + - description: Marvell SoCs implementing "arm,mmu-500"
> + items:
> + - const: marvell,ap806-smmu-500
> + - const: arm,mmu-500
> - items:
> - const: arm,mmu-500
> - const: arm,smmu-v2
>
On 15.07.2020 12:36, Robin Murphy wrote:
> On 2020-07-15 08:06, Tomasz Nowicki wrote:
>> Add specific compatible string for Marvell usage due to errata of
>> accessing 64bits registers of ARM SMMU, in AP806.
>>
>> AP806 SoC uses the generic ARM-MMU500, and there's no specific
>> implementation of Marvell, this compatible is used for errata only.
>
> Reviewed-by: Robin Murphy <[email protected]>
>
> Presumably Will can pick up these first 3 patches for 5.9 and #4 can go
> via arm-soc.
Thanks Robin for review and valuable comments.
Tomasz