The burst length can be adjusted according to the transmission
length to improve the transmission rate
Signed-off-by: Jon Lin <[email protected]>
---
drivers/spi/spi-rockchip.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index 9b8a5e1233c0..63593a5b87fa 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -384,6 +384,19 @@ static void rockchip_spi_dma_txcb(void *data)
spi_finalize_current_transfer(ctlr);
}
+static u32 rockchip_spi_calc_burst_size(u32 data_len)
+{
+ u32 i;
+
+ /* burst size: 1, 2, 4, 8 */
+ for (i = 1; i < 8; i <<= 1) {
+ if (data_len & i)
+ break;
+ }
+
+ return i;
+}
+
static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
struct spi_controller *ctlr, struct spi_transfer *xfer)
{
@@ -397,7 +410,8 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
.direction = DMA_DEV_TO_MEM,
.src_addr = rs->dma_addr_rx,
.src_addr_width = rs->n_bytes,
- .src_maxburst = 1,
+ .src_maxburst = rockchip_spi_calc_burst_size(xfer->len /
+ rs->n_bytes),
};
dmaengine_slave_config(ctlr->dma_rx, &rxconf);
@@ -525,7 +539,8 @@ static void rockchip_spi_config(struct rockchip_spi *rs,
writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR);
writel_relaxed(rs->fifo_len / 2, rs->regs + ROCKCHIP_SPI_DMATDLR);
- writel_relaxed(0, rs->regs + ROCKCHIP_SPI_DMARDLR);
+ writel_relaxed(rockchip_spi_calc_burst_size(xfer->len / rs->n_bytes) - 1,
+ rs->regs + ROCKCHIP_SPI_DMARDLR);
writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR);
/* the hardware only supports an even clock divisor, so
--
2.17.1
On Wed, 22 Jul 2020 at 10:41, Jon Lin <[email protected]> wrote:
>
> The burst length can be adjusted according to the transmission
> length to improve the transmission rate
>
> Signed-off-by: Jon Lin <[email protected]>
For the whole series you can add
Reviewed-by: Emil Renner Berthing <[email protected]>
Tested-by: Emil Renner Berthing <[email protected]>
> ---
> drivers/spi/spi-rockchip.c | 19 +++++++++++++++++--
> 1 file changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
> index 9b8a5e1233c0..63593a5b87fa 100644
> --- a/drivers/spi/spi-rockchip.c
> +++ b/drivers/spi/spi-rockchip.c
> @@ -384,6 +384,19 @@ static void rockchip_spi_dma_txcb(void *data)
> spi_finalize_current_transfer(ctlr);
> }
>
> +static u32 rockchip_spi_calc_burst_size(u32 data_len)
> +{
> + u32 i;
> +
> + /* burst size: 1, 2, 4, 8 */
> + for (i = 1; i < 8; i <<= 1) {
> + if (data_len & i)
> + break;
> + }
> +
> + return i;
> +}
> +
> static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
> struct spi_controller *ctlr, struct spi_transfer *xfer)
> {
> @@ -397,7 +410,8 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
> .direction = DMA_DEV_TO_MEM,
> .src_addr = rs->dma_addr_rx,
> .src_addr_width = rs->n_bytes,
> - .src_maxburst = 1,
> + .src_maxburst = rockchip_spi_calc_burst_size(xfer->len /
> + rs->n_bytes),
> };
>
> dmaengine_slave_config(ctlr->dma_rx, &rxconf);
> @@ -525,7 +539,8 @@ static void rockchip_spi_config(struct rockchip_spi *rs,
> writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR);
>
> writel_relaxed(rs->fifo_len / 2, rs->regs + ROCKCHIP_SPI_DMATDLR);
> - writel_relaxed(0, rs->regs + ROCKCHIP_SPI_DMARDLR);
> + writel_relaxed(rockchip_spi_calc_burst_size(xfer->len / rs->n_bytes) - 1,
> + rs->regs + ROCKCHIP_SPI_DMARDLR);
> writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR);
>
> /* the hardware only supports an even clock divisor, so
> --
> 2.17.1
>
>
>
>
> _______________________________________________
> Linux-rockchip mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
On Wed, 22 Jul 2020 16:37:35 +0800, Jon Lin wrote:
> The burst length can be adjusted according to the transmission
> length to improve the transmission rate
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
Thanks!
[1/3] spi: rockchip: Config spi rx dma burst size depend on xfer length
commit: 4d9ca632c847ab88f2f7e7e2747aea966f1390ce
[2/3] spi: rockchip: Support 64-location deep FIFOs
commit: 13a96935e6f66bafb6da92791120546a4bf20889
[3/3] spi: rockchip: Fix error in SPI slave pio read
commit: 4294e4accf8d695ea5605f6b189008b692e3e82c
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark